CN212569635U

CN212569635U - VPX computer motherboard based on processor chip flies to ten

Info

Publication number: CN212569635U
Application number: CN202021107103.5U
Authority: CN
Inventors: 曾超; 吴建波; 周芳; 刘立言; 刘舰; 唐校兵; 程望盛; 黄振中; 李友如
Original assignee: Great Wall Ocean Information System Co ltd
Current assignee: Great Wall Ocean Information System Co ltd
Priority date: 2020-06-15
Filing date: 2020-06-15
Publication date: 2021-02-19
Anticipated expiration: 2030-06-15

Abstract

The utility model discloses a VPX computer motherboard based on processor chip soars, include: the main board comprises a main board body, a main CPU chip, a slave CPU chip and a bridge chip, wherein the main CPU chip, the slave CPU chip and the bridge chip are arranged on the main board body; the main CPU chip is connected with the slave CPU chip through a PCIE3.0x16 bus so as to interact with the slave CPU chip in data, and the main CPU chip is connected with the bridge chip through a PCIE3.0x4 bus so as to lead out an external interface through the bridge chip. This novel PCIE slave unit of following CPU chip as main CPU chip of VPX computer motherboard has realized the integration of two CPU chips on the computer motherboard, has promoted the throughput of computer motherboard by a wide margin, satisfies the throughput and the requirement of secret ability of fields such as information-based system, data center, cloud computing center big data to the computer.

Description

VPX computer motherboard based on processor chip flies to ten

Technical Field

The utility model relates to the technical field of computers, especially, relate to a VPX computer motherboard based on processor chip flies.

Background

With the development of information technology, higher requirements are put forward on the processing capacity of information data and the safety and confidentiality of information, the requirement for adopting an autonomous platform server is continuously expanded, and the requirement for a main board under a specific environment is higher and higher. In order to meet the requirements of professional application fields on computer processing capacity, the use of dual-core or multi-core CPUs instead of single-core CPUs is a necessary trend for future development of information fields.

At present, a multi-CPU design applied to most of computer products in China adopts a foreign CPU chip, and because a back door is reserved on the chip, the foreign CPU chip is applied to a domestic computer system, and the safety and confidentiality of information are difficult to ensure. Meanwhile, part of the CPU chips are incompatible with the domestic computer system. However, domestic CPU chips temporarily do not have a dedicated interconnection bus between integrated CPUs. Therefore, how to overcome the defect that the interconnection bus special for the CPU is not integrated on the basis of the domestic CPU chip is a technical problem to be solved in the field of computer mainboards based on the domestic multi-CPU chip.

Novel content

In order to solve the technical problem, the utility model provides a VPX computer motherboard based on processor chip that soars.

According to one aspect of the present invention, a VPX computer motherboard based on a soar processor chip is provided, which includes a motherboard body, a main CPU chip, a slave CPU chip and a bridge chip arranged on the motherboard body; the main CPU chip is connected with the slave CPU chip through a PCIE3.0x16 bus so as to interact with the slave CPU chip in data, and the main CPU chip is connected with the bridge chip through a PCIE3.0x4 bus so as to lead out an external interface through the bridge chip.

Optionally, the master CPU chip is connected with the slave CPU chip and the bridge chip to form a PCI Express structure; a PCIE interface of the main CPU chip is set to be in a root controller mode; a PCIE interface of the slave CPU chip is set to be in an endpoint device mode; setting a chip interface of the bridge chip into an endpoint device mode; the slave CPU chip and the bridge chip are end point devices of the main CPU chip and perform data interaction with the main CPU chip.

Optionally, the CPU chip is a FT-2000+ CPU chip, and the bridge chip is a megachip ZX-200 bridge chip.

Alternatively, the motherboard is a 6U VPX architecture.

The novel VPX computer mainboard has the advantages of simple structure, reasonable design, good universality and simple development, and solves the problem that the FT-2000+ CPU chip does not have a circuit for realizing special interconnection among chips.

This novel PCIE slave unit of following CPU chip as main CPU chip of VPX computer motherboard has realized the integration of two CPU chips on the computer motherboard, has promoted the throughput of computer motherboard by a wide margin.

This neotype VPX computer motherboard improves the throughput to the data of computer mainframe, satisfies the throughput and the requirement of secret ability of fields such as information-based system, data center, cloud computing center big data to the computer.

This novel CPU chip of VPX computer motherboard adopts domestic Feiteng CPU chip, can be with domestic computer system fitting piece, satisfies the high-speed calculation and the control demand that the localization required, has also improved the reliability of mainboard simultaneously, is applicable to harsh service environment demands such as for military use server.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the invention without limitation to the invention. In the drawings:

fig. 1 is a schematic chip connection diagram of a VPX computer motherboard based on a FT processor chip according to the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without any creative effort, shall fall within the protection scope of the present invention. It should be noted that, in the embodiments and examples of the present application, the feature vectors may be arbitrarily combined with each other without conflict.

With the development of information technology, higher requirements are put forward on the attention of information security and confidentiality, the requirement of adopting an autonomous platform server is continuously expanded, and the requirement on a mainboard is higher and higher in a specific environment. In order to meet the requirements of professional application fields on computer processing capacity, the use of dual-core or multi-core CPUs instead of single-core CPUs is a necessary trend for future development of information fields.

At present, a multi-CPU design applied to most of computer products in China adopts a foreign CPU chip, and because a back door is reserved on the chip, the foreign CPU chip is applied to a domestic computer system, and the safety and confidentiality of information are difficult to ensure. Meanwhile, part of the CPU chips are incompatible with the domestic computer system. However, domestic CPU chips do not have lines for realizing dedicated interconnection between chips.

The application provides a VPX computer motherboard based on treater chip of soaring, including mainboard body, main CPU chip, follow CPU chip and the bridge chip of setting on the mainboard body. The main CPU chip is connected with the slave CPU chip through a PCIE3.0x16 bus so as to interact with the slave CPU chip in data, and the main CPU chip is connected with the bridge chip through a PCIE3.0x4 bus so as to lead out an external interface through the bridge chip.

According to the computer mainboard, the main CPU chip and the auxiliary CPU chips are interconnected through PCIE3.0x16, the problem that a special interconnection line between the chips is not achieved through Feiteng FT-2000+ chips is solved, the main CPU chip serves as a main management and calculation unit of the computer mainboard, the auxiliary CPU chip serves as a PCIE slave device of the main CPU chip, extra calculation resources are provided for the main CPU chip, integration of double CPU chips on the computer mainboard is achieved, and the processing capacity of the computer mainboard is greatly improved.

As shown in fig. 1, the master CPU chip, the slave CPU chip, and the bridge chip are connected to form a PCI Express structure. The PCIE0 controller and the PCIE1 controller port inside the main CPU chip are configured in a root complex (root complex) mode; the PCIE0 controller and the PCIE1 controller port inside the CPU chip are configured in an endpoint device (endpoint device) mode; and the PCIE interface at the upper end of the bridge chip is configured in an endpoint device mode. The PCIE0 controller of the main CPU chip and the PCIE0 controller of the slave CPU chip are interconnected by an X16 bus, and the PCIE1 controller of the main CPU chip and the PCIE interface at the upper end of the bridge chip are interconnected by an X4 bus.

The main CPU chip is a main management and calculation unit of the host, the slave CPU chip and the bridge chip are endpoint devices of the main CPU chip and perform data interaction with the main CPU chip, the slave CPU chip manages the slave CPU chip and the bridge chip, the PCIE slave device with the slave CPU chip as the main CPU chip provides extra calculation resources for the main CPU chip, the main CPU chip is connected with the bridge chip and further leads out an external interface through the bridge chip, and the main CPU chip manages the external information/data interaction of a computer mainboard through managing the bridge chip.

The CPU chip of the computer mainboard is FT-2000+ CPU chip, and the bridge chip is McZX-200 bridge chip. The FT-2000+ CPU chip is compatible with an ARMv8 system structure, adopts a parallel system structure on a multi-core chip, integrates 64 autonomous high-performance computing cores of the FT, and has peak performance as high as 0.56 TFlops. The Feiteng autonomous high-performance computing core and the high-efficiency network on chip are integrated, and the performance is superior. The CPU chip of the computer mainboard adopts the FT-2000+ type Feiteng CPU chip, the problem that no special interconnection bus is integrated on the FT-2000+ CPU chip is solved, multi-CPU interconnection is achieved, processing performance is improved, and the requirements of fields such as an information system, a data center and a cloud computing center on the processing capacity of a computer main body can be met.

As an example, the computer mainboard adopts a standard 6U VPX framework, so that the reliability of the mainboard is improved, and the applicable environment of the computer mainboard is expanded.

This novel adaptation operating system of VPX computer motherboard is homemade operating system, can satisfy each field to operating system's high security demand. The adaptive operating system of the computer mainboard of the application is preferably a domestic kylin Linux operating system.

Wherein, this neotype VPX computer motherboard's mainboard body still includes the memory, and the memory is DDR4 general memory that each CPU chip supported, for example, the mainboard memory can be board-mounted memory granule, and direct mount is on the mainboard.

As an example, a memory slot is further disposed on the motherboard, and the master CPU chip and the slave CPU chip are respectively plugged into the memory slot and connected with the memory in the memory slot.

The main board body is provided with a bridge piece interface, a domestic mega-chip ZX-200 bridge piece chip is selected, the bridge piece interface is a general interface of a computer main board, and the bridge piece interface chip is arranged in the bridge piece interface of the main board body. For example, the USB interface, SATA storage interface, PCIE interface, network card interface, UART interface, etc. may be used.

The application realizes the 6U VPX framework computer mainboard based on the FT-2000+ processor chip design, integrates 2 CPU chips, expands the computing capacity of the mainboard, meets the high-performance computing and control requirements of the localization requirements, adopts VPX construction, also improves the reliability of the mainboard, and is suitable for harsh use environment requirements of military servers and the like.

The above embodiments are merely to illustrate the technical solution of the present invention, not to limit the same, and the present invention is described in detail with reference to the preferred embodiments. It will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the true spirit and scope of the novel concept as defined by the appended claims.

Claims

1. A VPX computer mainboard based on a Feiteng processor chip is characterized by comprising a mainboard body, a main CPU chip, a slave CPU chip and a bridge chip, wherein the main CPU chip, the slave CPU chip and the bridge chip are arranged on the mainboard body; the main CPU chip is connected with the slave CPU chip through a PCIE3.0x16 bus so as to interact with the slave CPU chip in data, and the main CPU chip is connected with the bridge chip through a PCIE3.0x4 bus so as to lead out an external interface through the bridge chip.

2. The Feiteng processor chip-based VPX computer motherboard of claim 1, wherein said master CPU chip is connected with said slave CPU chip and said bridge chip to form a PCI Express fabric;

the PCIE interface of the main CPU chip is configured to be in a root controller mode;

the PCIE interface of the slave CPU chip is configured to be in an endpoint device mode;

a PCIE interface of the bridge chip is configured to be in an endpoint device mode;

the slave CPU chip and the bridge chip are end point devices of the main CPU chip and perform data interaction with the main CPU chip.

3. The Feiteng processor chip-based VPX computer motherboard of claim 1, wherein the type of said CPU chip is Feiteng FT-2000A + CPU chip, and the type of said bridge chip is Mega-core ZX-200 bridge chip.

4. The Feiteng processor chip based VPX computer motherboard of claim 1, wherein said motherboard is a 6U VPX fabric.