CN212527324U - Semiconductor wafer surface grinding protection sheet - Google Patents
Semiconductor wafer surface grinding protection sheet Download PDFInfo
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- CN212527324U CN212527324U CN202020070363.3U CN202020070363U CN212527324U CN 212527324 U CN212527324 U CN 212527324U CN 202020070363 U CN202020070363 U CN 202020070363U CN 212527324 U CN212527324 U CN 212527324U
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- semiconductor wafer
- base material
- wafer surface
- layer
- middle layer
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Abstract
The utility model discloses a semiconductor wafer surface grinding protection sheet, which comprises a base material; an intermediate layer is arranged on the base material; a surface adhesion layer is arranged on the middle layer; the base material is made of polyester and polyamide materials, and the thickness of the base material is 1-1000 um; the middle layer is a thermoplastic solid high molecular polymer, and the Vicat softening point temperature of the middle layer is tested, and the softening temperature is 50-80 ℃ under the applied pressure of 0.45MPa according to the ASTM D1525 standard; the surface adhesion layer is made of acrylic or polyurethane polymer and copolymer thereof; semiconductor wafer surface grinding screening glass provide good unsmooth absorption protection when semiconductor wafer grinds, prevent to damage semiconductor wafer.
Description
Technical Field
The utility model relates to a semiconductor wafer surface grinding protection plate which provides good concave-convex absorption protection when the semiconductor wafer is ground.
Background
In a step of polishing a non-circuit-formed surface in a manufacturing step of a semiconductor device using a semiconductor wafer, a semiconductor wafer protective sheet is attached to the circuit-formed surface of the semiconductor wafer in order to prevent damage to the circuit-formed surface of the semiconductor wafer.
Since not only the circuit but also the semiconductor bump and the like are formed on the circuit-formed surface of the semiconductor wafer with a large height difference, when the semiconductor wafer surface protection sheet is attached, if a gap is formed between the semiconductor wafer protection sheet and the circuit-formed surface of the semiconductor wafer, stress distribution is generated inside the semiconductor wafer surface when the non-circuit-formed surface of the semiconductor wafer is polished, and the semiconductor wafer is easily broken when polished to a thin thickness; therefore, there is a strong demand for the provision of a semiconductor wafer surface protective sheet having good conformability to unevenness.
Therefore, a grinding protection sheet for the surface of a semiconductor wafer, which provides good concave-convex absorption protection during grinding of the semiconductor wafer, is developed.
Disclosure of Invention
The present invention is directed to overcome the deficiencies of the prior art and to provide a semiconductor wafer surface polishing protection sheet that provides good concave-convex absorption protection during the polishing of semiconductor wafers.
In order to achieve the above purpose, the utility model adopts the technical scheme that: a semiconductor wafer surface grinding protection sheet comprises a substrate; an intermediate layer is arranged on the base material; a surface adhesion layer is arranged on the middle layer; the base material is made of polyester and polyamide materials, and the thickness of the base material is 1-1000 um; the middle layer is a thermoplastic solid high molecular polymer, and the Vicat softening point temperature of the middle layer is tested, and the softening temperature is 50-80 ℃ under the applied pressure of 0.45MPa according to the ASTM D1525 standard; the surface adhesive layer is made of acrylic or polyurethane polymer and copolymer thereof.
Preferably, the thermoplastic solid high molecular polymer has a Vicat softening point temperature test, and a softening temperature of 60-70 ℃ under an applied pressure of 0.45MPa according to ASTM D1525 standard.
Preferably, the thermoplastic solid high molecular polymer has a Vicat softening point temperature test, and a softening temperature of 65-75 ℃ under an applied pressure of 0.45MPa according to ASTM D1525 standard.
Because of above-mentioned technical scheme's application, compared with the prior art, the utility model have the following advantage:
semiconductor wafer surface grinding screening glass provide good unsmooth absorption protection when semiconductor wafer grinds, prevent to damage semiconductor wafer.
Drawings
The technical scheme of the utility model is further explained by combining the attached drawings as follows:
FIG. 1 is a schematic view of a semiconductor wafer surface polishing protection sheet according to the present invention;
FIG. 2 is an enlarged view of the semiconductor wafer surface polishing protective sheet according to the present invention in an applied state;
FIG. 3 is a first test report of a semiconductor wafer surface polishing protection sheet according to the present invention;
FIG. 4 is a second test report of a semiconductor wafer surface polishing protection sheet according to the present invention;
FIG. 5 is a rheometer test report for the intermediate layer of My A/My B factory of a semiconductor wafer surface abrasive protective sheet according to the invention;
FIG. 6 is a rheometer test report for the other brand middle layer of the semiconductor wafer surface abrasive protective sheet of the present invention;
FIG. 7 is a rheometer test report for the intermediate layer of my Mill-C of a semiconductor wafer surface abrasive protective sheet according to the invention;
FIG. 8 is a rheometer test report for the intermediate layer of my Mill-D of a semiconductor wafer surface abrasive protective sheet according to the invention;
wherein: 1. a semiconductor wafer surface protection sheet; 11. a substrate; 12. an intermediate layer; 13. a surface adhesive layer; 2. a semiconductor wafer; 21. a circuit surface; 22. a concave-convex block; 23. and a back grinding layer.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Referring to fig. 1-2, a semiconductor wafer surface polishing protective sheet 1 according to the present invention comprises a substrate 11; an intermediate layer 12 is arranged on the substrate 11; a surface adhesion layer 13 is arranged on the middle layer 12; the base material is made of polyester and polyamide materials, and the thickness of the base material is 1-1000 um.
The intermediate layer 12 is a thermoplastic solid high molecular polymer, and the vicat softening point temperature test thereof suggests that the softening point under the applied pressure of 0.45MPa according to ASTM D1525 standard is 50-80 ℃, preferably 60-70 ℃, more preferably 65-75 ℃, if the softening point is lower than 50 ℃, the layer is easy to soften too much and flow and exude during the grinding process, which may cause the problem of wafer surface sticking, and if the softening point is higher than 80 ℃, the concave-convex absorption effect on the wafer surface circuit is not obvious.
The surface adhesive layer is made of acrylic or polyurethane polymer and copolymer thereof.
As shown in fig. 2, the semiconductor wafer 2 includes a body, a back-grinding layer 23 is disposed on a lower surface of the body, and a circuit surface 21 is disposed on an upper surface of the body; the circuit surface 21 is provided with a concave-convex block 22; when in application, the surface adhesive layer 13 is adhered to the circuit surface 21, and is ground by special grinding equipment, and after the grinding is finished, the grinding protection sheet 1 on the surface of the semiconductor wafer is torn off; the temperature during the polishing process of the conventional semiconductor wafer process is between 40-80 ℃, so the material of the intermediate layer is used for the Vicat softening point temperature test, and the softening point under the pressure of 0.45MPa according to ASTM D1525 standard is recommended to be 50-80 ℃, preferably 60-70 ℃, more preferably 65-75 ℃, so as to provide the temperature condition for softening the intermediate layer when the temperature generated during the wafer polishing process provides a better buffer effect to prevent the generation of internal stress after the wafer polishing.
The applicant has performed the tests detailed in figures 3-8.
Because of above-mentioned technical scheme's application, compared with the prior art, the utility model have the following advantage:
semiconductor wafer surface grinding screening glass provide good unsmooth absorption protection when semiconductor wafer grinds, prevent to damage semiconductor wafer.
The above embodiments are only for illustrating the technical concept and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and the protection scope of the present invention can not be limited thereby, and all equivalent changes or modifications made according to the spirit of the present invention should be covered by the protection scope of the present invention.
Claims (3)
1. A semiconductor wafer surface grinding protection sheet is characterized in that: comprises a substrate; an intermediate layer is arranged on the base material; a surface adhesion layer is arranged on the middle layer; the thickness of the base material is 1-1000 um; the middle layer is a thermoplastic solid high molecular polymer, and the Vicat softening point temperature of the middle layer is 50-80 ℃ under the applied pressure of 0.45MPa according to the ASTM D1525 standard.
2. The protective sheet for grinding the surface of a semiconductor wafer according to claim 1, wherein: the thermoplastic solid high molecular polymer has a Vicat softening point temperature test, and the softening temperature is 60-70 ℃ under the applied pressure of 0.45MPa according to the ASTM D1525 standard.
3. The protective sheet for grinding the surface of a semiconductor wafer according to claim 1, wherein: the thermoplastic solid high molecular polymer has a Vicat softening point temperature test, and the softening temperature is 65-75 ℃ under the applied pressure of 0.45MPa according to the ASTM D1525 standard.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020070363.3U CN212527324U (en) | 2020-01-14 | 2020-01-14 | Semiconductor wafer surface grinding protection sheet |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020070363.3U CN212527324U (en) | 2020-01-14 | 2020-01-14 | Semiconductor wafer surface grinding protection sheet |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212527324U true CN212527324U (en) | 2021-02-12 |
Family
ID=74525726
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020070363.3U Expired - Fee Related CN212527324U (en) | 2020-01-14 | 2020-01-14 | Semiconductor wafer surface grinding protection sheet |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212527324U (en) |
-
2020
- 2020-01-14 CN CN202020070363.3U patent/CN212527324U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20210212 Termination date: 20220114 |