CN212463157U - Amplifier and receiver - Google Patents
Amplifier and receiver Download PDFInfo
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- CN212463157U CN212463157U CN202020721937.9U CN202020721937U CN212463157U CN 212463157 U CN212463157 U CN 212463157U CN 202020721937 U CN202020721937 U CN 202020721937U CN 212463157 U CN212463157 U CN 212463157U
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Abstract
The utility model discloses a receiver, include: a first amplifier, a passive mixer and a filter; the first amplifier comprises a first switching tube, a second switching tube and a resistor; the source electrode of the first switching tube is connected with a power supply, the drain electrode of the first switching tube is connected with the drain electrode of the second switching tube, and the grid electrode of the first switching tube is used as the input end of the amplifier; the source electrode of the second switching tube is connected with the ground, the grid electrode of the second switching tube is connected with the input end, and the drain electrode of the second switching tube is used as the output end of the amplifier; the resistor is connected between the input end and the output end in a bridging mode. The utility model provides a receiver not only realizes the broadband and matches and improve the front end linearity.
Description
Technical Field
The utility model relates to a wireless communication field especially relates to an amplifier and receiver among the wireless communication field.
Background
The receiver is responsible for receiving high-frequency wireless signals and simultaneously down-converts the signals to a low-frequency band, the receiver is widely applied to various wireless chip products, and the receiver results play an important role in the performance of the radio frequency front end. Conventional receiver architecture as shown in fig. 1, the main body portion generally includes three circuits: low noise amplifier, active mixer and filter. The rf input signal is amplified step by step through the stages, which results in the following disadvantages: the signal may be compressed when amplified, resulting in signal distortion, which affects overall linearity. On the other hand, the conventional low noise amplifier can only receive a narrow-band signal, and as shown in fig. 2, its input impedance is represented by formula 1:
Z-jwL +1/jwC + gmn L/C formula 1
Wherein w is angular frequency, L is inductance, C is capacitance, and gmn is transconductance of the switching tube MN. The input impedance of the low noise amplifier is a function of the frequency w, that is, impedance matching can be achieved only for a certain frequency point, that is, narrow-band matching.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is to provide an amplifier and receiver not only realize the broadband and match and improve the front end linearity.
In order to solve the above problem, the present invention further provides an amplifier, including:
the circuit comprises a first switching tube, a second switching tube and a resistor;
the source electrode of the first switching tube is connected with a power supply, the drain electrode of the first switching tube is connected with the drain electrode of the second switching tube, and the grid electrode of the first switching tube is used as the input end of the amplifier;
the source electrode of the second switching tube is connected with the ground, the grid electrode of the second switching tube is connected with the input end, and the drain electrode of the second switching tube is used as the output end of the amplifier;
the resistor is bridged between the input end and the output end;
the first switch tube is a PMOS tube; the second switch tube is an NMOS tube.
In an exemplary embodiment, the amplifier further has the following features:
the input impedance Z1 of the amplifier is:
Z1＝R/Glna
wherein, Glna is the gain of the amplifier, and R is the resistance value of the resistor.
In an exemplary embodiment, the amplifier further has the following features:
the Glna is 20 DB.
In order to solve the above problem, the present invention further provides a receiver, including:
a first amplifier, a passive mixer and a filter;
the output end of the first amplifier is connected with the input end of the passive mixer;
the output end of the passive mixer is connected with the input end of the filter;
the input end of the first amplifier is used as the input end of the receiver;
the output end of the filter is used as the output end of the receiver;
the first amplifier comprises a first switching tube, a second switching tube and a resistor;
the source electrode of the first switching tube is connected with a power supply, the drain electrode of the first switching tube is connected with the drain electrode of the second switching tube, and the grid electrode of the first switching tube is used as the input end of the amplifier;
the source electrode of the second switching tube is connected with the ground, the grid electrode of the second switching tube is connected with the input end, and the drain electrode of the second switching tube is used as the output end of the amplifier;
the resistor is bridged between the input end and the output end;
the first switch tube is a PMOS tube; the second switch tube is an NMOS tube.
In an exemplary embodiment, the receiver further comprises:
the passive mixer comprises a first capacitor, a crystal oscillator and a third switching tube;
one end of the first capacitor is used as the input end of the passive mixer and is connected with the output end of the first amplifier;
the other end of the first capacitor is connected with a source electrode of the third switching tube;
the crystal oscillator is connected with the grid electrode of the third switching tube;
and the drain electrode of the third switching tube is used as the output end of the passive mixer and is connected with the input end of the filter.
In an exemplary embodiment, the receiver further comprises:
the filter comprises a second capacitor, a feedback resistor and a second amplifier;
the second capacitor, the feedback resistor and the second amplifier are connected in parallel;
the input end of the second amplifier is used as the input end of the filter and is connected with the drain electrode of the third switching tube;
the output end of the second amplifier is used as the output end of the receiver.
In an exemplary embodiment, the receiver further comprises:
the input impedance Z1 of the first amplifier is:
Z1＝R/Glna
wherein Glna is a gain of the first amplifier, and R is a resistance value of the resistor.
In an exemplary embodiment, the receiver further comprises:
the output impedance of the first amplifier is Z2 ═ Rf/Glpf;
wherein, the Rf is the feedback resistance of the filter, and the Glpf is the gain of the second amplifier.
In an exemplary embodiment, the receiver further comprises:
the capacitance value of the first capacitor is 2 pF.
In an exemplary embodiment, the receiver further comprises:
the crystal oscillator is a square wave crystal oscillator.
To sum up, the embodiment of the utility model provides an amplifier has adopted the broadband structure based on the phase inverter structure rather than the narrowband structure, has realized broadband impedance matching. An embodiment of the utility model provides a receiver, amplifier have adopted the broadband structure rather than the narrowband structure based on the phase inverter structure, and the mixer has adopted passive structure rather than active structure for the signal has become little behind the amplifier, has pushed away last level wave filter with signal amplification, has realized broadband impedance match, has reduced signal distortion, has improved front end linearity.
Drawings
Fig. 1 is a block diagram of a conventional receiver.
Fig. 2 is a circuit diagram of a conventional low noise amplifier.
Fig. 3 is a circuit diagram of an amplifier according to a first embodiment of the present invention.
Fig. 4 is a block diagram of a receiver according to a second embodiment of the present invention.
Fig. 5 is a circuit diagram of a receiver according to a second embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.
Example one
Fig. 3 is a circuit diagram of an amplifier according to a first embodiment of the present invention, as shown in fig. 3, the amplifier according to the first embodiment includes: the circuit comprises a first switching tube, a second switching tube and a resistor;
the source electrode of the first switching tube is connected with a power supply, the drain electrode of the first switching tube is connected with the drain electrode of the second switching tube, and the grid electrode of the first switching tube is used as the input end of the amplifier;
the source electrode of the second switching tube is connected with the ground, the grid electrode of the second switching tube is connected with the input end, and the drain electrode of the second switching tube is used as the output end of the amplifier;
the resistor is bridged between the input end and the output end;
the first switch tube is a PMOS tube; the second switch tube is an NMOS tube.
In an exemplary embodiment, the input impedance Z1 of the amplifier may be:
Z1＝R/Glna
wherein, Glna is the gain of the amplifier, and R is the resistance value of the resistor. Where Glna is typically around 20dB, (gmn + gmp) (ron// rop), where gmn and gmp represent transconductance for NMOS and PMOS, respectively, and ron and rop represent output impedance for NMOS and PMOS, respectively. Glna is the Gain of lna as a whole, G is the first letter of Gain english Gain, lna is an abbreviation for low noise amplifier.
Since there are no frequency dependent components in the amplifier, the input impedance of the amplifier is constant rather than a function of frequency, i.e., a wideband impedance match is achieved and the amplifier can receive a wideband input signal.
Example two
Fig. 4 is a block diagram of a receiver according to a second embodiment of the present invention, and fig. 5 is a circuit diagram of a receiver according to a second embodiment of the present invention. The receiver shown in fig. 4 and 5, comprises:
a first amplifier, a passive mixer and a filter;
the output end of the first amplifier is connected with the input end of the passive mixer;
the output end of the passive mixer is connected with the input end of the filter;
the input end of the first amplifier is used as the input end of the receiver;
the output end of the filter is used as the output end of the receiver;
the first amplifier comprises a first switching tube, a second switching tube and a resistor;
the source electrode of the first switching tube is connected with a power supply, the drain electrode of the first switching tube is connected with the drain electrode of the second switching tube, and the grid electrode of the first switching tube is used as the input end of the amplifier;
the source electrode of the second switching tube is connected with the ground, the grid electrode of the second switching tube is connected with the input end, and the drain electrode of the second switching tube is used as the output end of the amplifier;
the resistor is bridged between the input end and the output end;
the first switch tube is a PMOS tube; the second switch tube is an NMOS tube.
In an exemplary embodiment, the passive mixer includes a first capacitor, a crystal oscillator, and a third switch tube;
one end of the first capacitor is used as the input end of the passive mixer and is connected with the output end of the first amplifier; the first capacitor is used for separating a direct current point of the low noise amplifier and a direct current point of the filter.
The other end of the first capacitor is connected with a source electrode of the third switching tube;
the crystal oscillator is connected with the grid electrode of the third switching tube;
and the drain electrode of the third switching tube is used as the output end of the passive mixer and is connected with the input end of the filter.
In an exemplary embodiment, the filter includes a second capacitor, a feedback resistor, and a second amplifier;
the second capacitor, the feedback resistor and the second amplifier are connected in parallel;
the input end of the second amplifier is used as the input end of the filter and is connected with the drain electrode of the third switching tube;
here, the third switch tube may be an NMOS tube or a PMOS tube.
The output end of the second amplifier is used as the output end of the receiver.
In an exemplary embodiment, the input impedance Z1 of the first amplifier is:
Z1＝R/Glna
wherein Glna is a gain of the first amplifier, and R is a resistance value of the resistor.
In an exemplary embodiment, the output impedance of the first amplifier (i.e., the output impedance seen from the low noise amplifier) may be Z2 Rf/Glpf; wherein, the Rf is the feedback resistance of the filter, and the Glpf is the gain of the second amplifier. Glpf is the Gain of the overall lpf, G is the first letter of Gain english Gain, and lpf is the english abbreviation of low pass filter. The amplifier typically has a much higher gain than the feedback resistor, so the impedance has a small value, e.g., 40DB gain (Glpf), and the output impedance is only 10 ohms when Rf is 1000. Therefore, the output signal of the low noise amplifier is smaller, thereby reducing the compression of the signal and improving the linearity of the receiver.
In an exemplary embodiment, the capacitance value of the first capacitor may be 2pF, and may be determined by itself according to the situation.
In an exemplary embodiment, the crystal oscillator may be a square wave crystal oscillator.
After the radio frequency signal is input into the low noise amplifier, two tubes of the amplifier are conducted simultaneously to convert the input radio frequency voltage into output current, and the output current signal is very small. The current signal is down-converted to a low-frequency signal by a passive mixer, and is converted to a final output amplification signal by a feedback resistor Rf of a filter lpf.
It will be understood by those skilled in the art that all or part of the steps of the above methods may be implemented by instructing the relevant hardware through a program, and the program may be stored in a computer readable storage medium, such as a read-only memory, a magnetic or optical disk, and the like. Alternatively, all or part of the steps of the above embodiments may be implemented using one or more integrated circuits. Accordingly, each module/unit in the above embodiments may be implemented in the form of hardware, and may also be implemented in the form of a software functional module. The present invention is not limited to any specific form of hardware or software combination.
The foregoing is only a preferred embodiment of the present invention, and of course, many other embodiments of the invention can be devised without departing from the spirit and scope thereof, and it will be apparent to those skilled in the art that various changes and modifications can be made herein without departing from the spirit and scope of the invention, and it is intended that all such changes and modifications shall fall within the scope of the appended claims.
Claims (10)
1. An amplifier, comprising:
the circuit comprises a first switching tube, a second switching tube and a resistor;
the source electrode of the first switching tube is connected with a power supply, the drain electrode of the first switching tube is connected with the drain electrode of the second switching tube, and the grid electrode of the first switching tube is used as the input end of the amplifier;
the source electrode of the second switching tube is connected with the ground, the grid electrode of the second switching tube is connected with the input end, and the drain electrode of the second switching tube is used as the output end of the amplifier;
the resistor is bridged between the input end and the output end;
the first switch tube is a PMOS tube; the second switch tube is an NMOS tube.
2. The amplifier of claim 1, wherein the input impedance Z1 of the amplifier is:
Z1＝R/Glna
wherein, Glna is the gain of the amplifier, and R is the resistance value of the resistor.
3. The amplifier of claim 2, comprising:
the Glna is 20 DB.
4. A receiver, comprising:
a first amplifier, a passive mixer and a filter;
the output end of the first amplifier is connected with the input end of the passive mixer;
the output end of the passive mixer is connected with the input end of the filter;
the input end of the first amplifier is used as the input end of the receiver;
the output end of the filter is used as the output end of the receiver;
the first amplifier comprises a first switching tube, a second switching tube and a resistor;
the source electrode of the first switching tube is connected with a power supply, the drain electrode of the first switching tube is connected with the drain electrode of the second switching tube, and the grid electrode of the first switching tube is used as the input end of the amplifier;
the source electrode of the second switching tube is connected with the ground, the grid electrode of the second switching tube is connected with the input end, and the drain electrode of the second switching tube is used as the output end of the amplifier;
the resistor is bridged between the input end and the output end;
the first switch tube is a PMOS tube; the second switch tube is an NMOS tube.
5. The receiver of claim 4, wherein:
the passive mixer comprises a first capacitor, a crystal oscillator and a third switching tube;
one end of the first capacitor is used as the input end of the passive mixer and is connected with the output end of the first amplifier;
the other end of the first capacitor is connected with a source electrode of the third switching tube;
the crystal oscillator is connected with the grid electrode of the third switching tube;
and the drain electrode of the third switching tube is used as the output end of the passive mixer and is connected with the input end of the filter.
6. The receiver of claim 5, wherein:
the filter comprises a second capacitor, a feedback resistor and a second amplifier;
the second capacitor, the feedback resistor and the second amplifier are connected in parallel;
the input end of the second amplifier is used as the input end of the filter and is connected with the drain electrode of the third switching tube;
the output end of the second amplifier is used as the output end of the receiver.
7. The receiver of claim 4, wherein:
the input impedance Z1 of the first amplifier is:
Z1＝R/Glna
wherein Glna is a gain of the first amplifier, and R is a resistance value of the resistor.
8. The receiver of claim 6, wherein:
the output impedance of the first amplifier is Z2 ═ Rf/Glpf;
wherein, the Rf is the feedback resistance of the filter, and the Glpf is the gain of the second amplifier.
9. The receiver of claim 5, wherein:
the capacitance value of the first capacitor is 2 pF.
10. The receiver of claim 5, wherein:
the crystal oscillator is a square wave crystal oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020721937.9U CN212463157U (en) | 2020-05-06 | 2020-05-06 | Amplifier and receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020721937.9U CN212463157U (en) | 2020-05-06 | 2020-05-06 | Amplifier and receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212463157U true CN212463157U (en) | 2021-02-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020721937.9U Active CN212463157U (en) | 2020-05-06 | 2020-05-06 | Amplifier and receiver |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212463157U (en) |
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2020
- 2020-05-06 CN CN202020721937.9U patent/CN212463157U/en active Active
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Address after: 201210 whole floor, 8th floor, No. 1, Lane 500, shengxia Road, China (Shanghai) pilot Free Trade Zone, Pudong New Area, Shanghai Patentee after: Core and material (Shanghai) Technology Co.,Ltd. Patentee after: Hexin Xingtong Technology (Beijing) Co., Ltd Address before: 200122 3rd floor, building 8, Lane 912, Bibo Road, Pudong New Area, Shanghai Patentee before: UNICORECOMM (SHANGHAI) TECHNOLOGY CO.,LTD. Patentee before: Hexin Xingtong Technology (Beijing) Co., Ltd |