CN212426170U - Carrying disc for LED wafer manufacturing process - Google Patents

Carrying disc for LED wafer manufacturing process Download PDF

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Publication number
CN212426170U
CN212426170U CN202021673369.6U CN202021673369U CN212426170U CN 212426170 U CN212426170 U CN 212426170U CN 202021673369 U CN202021673369 U CN 202021673369U CN 212426170 U CN212426170 U CN 212426170U
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China
Prior art keywords
wafer placing
wafer
placing groove
peripheral
central
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林志园
洪金居
陈火宾
肖遥
程伟
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Xiamen Qianzhao Semiconductor Technology Co ltd
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Xiamen Qianzhao Semiconductor Technology Co ltd
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Abstract

The utility model provides a carrying disc for LED wafer processing procedure, which comprises a carrying disc; the carrying disc is provided with a wafer placing surface, the wafer placing surface is provided with a wafer placing groove, and the wafer placing groove comprises a central wafer placing groove and a plurality of peripheral wafer placing grooves; each peripheral wafer placing groove is arranged around the central wafer placing groove; each peripheral wafer placing groove is provided with a baffle plate, and the baffle plate is positioned at the flat edges of the peripheral wafer placing grooves and the carrying disc; the utility model is provided with the peripheral wafer slots connected with the edge of the carrying disc, thereby increasing the number of the wafer slots and improving the productivity; meanwhile, two adjacent peripheral wafer placing grooves are mutually close to each other and form a gap inclined plane with the edge of the carrying disc, and the inclined planes can improve the temperature field and the flow field of the edge area of the carrying disc, improve the efficiency of depositing mixed gas and solve the problem of poor uniformity of peripheral wafers.

Description

Carrying disc for LED wafer manufacturing process
Technical Field
The utility model belongs to the technical field of the semiconductor, more specifically say, relate to a carry dish for LED wafer processing procedure.
Background
Group III-V nitrides have excellent physical properties such as a large forbidden band width, a high breakdown electric field, and a high electron saturation mobility due to the characteristics of direct band gap semiconductors, and have attracted much attention in the electrical and optical fields. Among them, light emitting diodes using GaN as a main material have been developed in a great deal in illumination, display, and digital. Research shows that a layer of AlN buffer layer is evaporated on a sapphire substrate by adopting Physical Vapor Deposition (PVD), and then the GaN material is extended to remarkably improve the quality of the GaN-based LED crystal, so that the performance of an LED device is remarkably improved. The processing technology of combining the graphical sapphire substrate with the evaporation of the AlN buffer layer has become a mainstream process method of an LED chip factory.
With the increasing market competition pressure of LED chips, manufacturers reduce the cost in a large scale by increasing the production capacity, and evaporate an AlN buffer layer on a patterned sapphire substrate to form an important substrate material for LED wafer production, wherein the processing capacity of the AlN buffer layer restricts the increase of the LED wafer production capacity. The PVD carrying disc is used as a processing carrier of the AlN buffer layer, and the number of the substrates which can be carried directly determines the processing capacity of the AlN buffer layer of the PVD single RUN.
Fig. 1 shows a schematic diagram of an existing blade of a PVD apparatus (e.g., model a230), fig. 2 shows a schematic diagram of a first wafer, and fig. 3 shows a schematic diagram of a second wafer, in the wafer placing surface of the existing blade shown in fig. 1, a plurality of peripheral wafer placing grooves 3 are arranged around a central wafer placing groove 2, the central wafer placing groove 2 can place 1 first wafer Ya, and each peripheral wafer placing groove 3 can place 5 second wafers Yb. The output of the carrying tray shown in fig. 1 in unit time is fixed, the space for improving the productivity is limited, if the area of the carrying tray is increased, the machine cannot work normally, the corresponding machine hardware is required to be modified, and the input cost is high; and the problem of insufficient evaporation coating is easy to occur on the wafer close to the edge of the carrying disc.
SUMMERY OF THE UTILITY MODEL
In view of this, the present invention provides a tray for LED wafer process, which solves the problems of low capacity and insufficient evaporation of wafer in the prior art without increasing the size of the tray and modifying other hardware of the PVD machine.
In order to achieve the above object, the utility model adopts the following technical scheme:
a carrier plate for LED wafer processing comprises:
a carrier disc;
the wafer placing surface is round;
the wafer placing surface is provided with a wafer placing groove, and the wafer placing groove comprises a central wafer placing groove and a plurality of peripheral wafer placing grooves; each peripheral wafer placing groove is arranged in a surrounding mode by taking the central wafer placing groove as a center; each peripheral wafer placing groove is provided with a baffle plate, and the baffle plate is positioned at the flat edges of the peripheral wafer placing grooves and the carrying disc;
the central wafer placing groove is formed in the center of the wafer placing surface and comprises a first central wafer placing groove and a second central wafer placing groove which are arranged in a concentric circle; the first central wafer placing groove and the second central wafer placing groove are used for matching wafers with different sizes, and the first central wafer placing groove and the second central wafer placing groove have height difference;
two adjacent peripheral wafer standing grooves are close to each other, and form a clearance inclined plane with the edge of the carrying disc.
Preferably, the edge of the carrying disc is horizontally arranged on part of the circumference of the wafer placing surface and is connected with the flat edge; the width of the edge of the boat (W1) is 0.5mm to 3mm, inclusive.
Preferably, the angle of inclination of the clearance bevel to the horizontal is 0 ° to 8 °, inclusive.
Preferably, the bottom surface of the groove of the wafer placing groove is horizontally arranged; the groove bottom surfaces of the second central wafer placing groove and the peripheral wafer placing grooves are in the same horizontal plane and are higher than the horizontal position of the groove bottom surface of the first central wafer placing groove.
Preferably, the length (L1) of the baffle is 0.5mm to 30mm, inclusive; the width (W2) of the baffle is 0.5mm to 3mm, inclusive; the baffle and the edge of the carrying disc are at the same horizontal height; the baffle is integrally formed with the edge of the boat.
Preferably, grooves are formed in two sides of the baffle, and the bottom surfaces of the grooves and the bottom surface of the peripheral wafer placing groove are on the same horizontal plane.
Preferably, stress release ports are formed at the junctions of the adjacent peripheral wafer placing grooves and the junctions of the peripheral wafer placing grooves and the second central wafer placing groove; the bottom surface of the stress release port, the bottom surfaces of the peripheral wafer placing grooves and the bottom surface of the second central wafer placing groove are on the same horizontal plane.
Preferably, the stress relief vent has a length of 0mm to 20mm, inclusive.
Preferably, a taking and placing opening is arranged at the edge of the wafer placing groove, the radius of the taking and placing opening is 0mm to 20mm, and the radius does not include an end point value.
Preferably, the size of the first central wafer placing groove is matched with that of the first wafer; the sizes of the second central wafer placing groove and the peripheral wafer placing groove are matched with those of a second wafer; the wafer reference edge of the second wafer is placed towards the baffle plate; 7 second wafers can be placed on the wafer placing surface.
Through the technical scheme, the following effects are achieved:
1. the utility model provides a carry dish for LED wafer processing procedure sets up and carries each peripheral wafer that the dish edge links to each other and puts the groove to suitably reduce peripheral wafer and put the groove area, increased the quantity of wafer standing groove, improved and carried a dish utilization ratio, under the condition that does not increase and carry a dish size and do not reform transform other hardware of PVD board, promoted the productivity.
2. Furthermore, the baffle is arranged on each peripheral wafer placing groove, the baffle is positioned at the flat edge of the peripheral wafer placing groove and the carrying disc, and the wafer reference edge of the second wafer is placed towards the baffle, so that the problems of insufficient evaporation coating and uneven wafer surface of the wafer close to the edge of the carrying disc can be avoided, the wafer yield is improved, the position of the wafer reference edge can be prevented from being misplaced during operation, and the fool-proof effect is achieved.
3. Furthermore, the grooves are formed in the two sides of the baffle plate, so that the peripheral wafer placing groove can be provided with a moving space when the second wafer is placed on the peripheral wafer placing groove, and the phenomenon that the second wafer is clamped on the groove wall of the peripheral wafer placing groove and cannot be horizontally placed, and the wafer evaporation is uneven is avoided.
4. Furthermore, two adjacent peripheral wafer placing grooves are mutually close to each other, a gap inclined plane is formed between each two adjacent peripheral wafer placing grooves and the edge of the carrying disc, the inclination angle between each gap inclined plane and the horizontal plane is 0-8 degrees, end point values are not included, the temperature field and the flow field of the peripheral wafer placing grooves close to the edge area of the carrying disc can be improved by introducing the inclined planes, the thickness of the inclined plane area of the carrying disc is lower than that of the middle area of the carrying disc, when the heating plate under the carrying disc is used for heating, the inclined plane area of the carrying disc is heated more quickly, and the mixed; the inclined surface of the carrier plate reduces the air flow interference, the mixed gas is splashed to the area along with the air flow, the gas loss can be reduced, and the wafers in the edge area of the carrier plate are easier to deposit. Through the gap inclined plane, the efficiency of depositing the nitride material is improved, and the problem that the thickness and the material uniformity of peripheral wafers are poor due to slow deposition of mixed gas in the edge area close to the carrying disc is solved.
5. Further, the central wafer placing grooves comprise a first central wafer placing groove and a second central wafer placing groove which are arranged in a concentric circle; the first central wafer placing groove and the second central wafer placing groove are used for matching wafers of different sizes, the second central wafer placing groove can be used for placing second wafers for volume production, the first central wafer placing groove can be used for placing first wafers as observation pieces, and the central wafer placing groove can be used for placing wafers of different sizes according to different requirements.
6. Furthermore, the baffle and the edge of the carrying disc are arranged at the same horizontal height, so that a contact surface with an annular pressure ring of the physical vapor deposition equipment can be increased, and the risk that the disc surface of the carrying disc is separated from the carrying disc fixing device due to the fact that the contact surface is too small is reduced, the wafer is not in a sputtering area, and the wafer yield is influenced.
7. Furthermore, stress release ports are formed at the junctions of the adjacent peripheral wafer placing grooves and the junctions of the peripheral wafer placing grooves and the second central wafer placing groove; can effectively release stress, prevent that the clearance between wafer standing groove and the wafer is little, the coating by vaporization in-process leads to carrying the dish quotation to crack because of thermal stress, promotes and carries a dish life-span.
8. Furthermore, the wafer placing groove is provided with the taking and placing opening, so that the wafer is conveniently taken and placed, and the efficiency is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a schematic view of a conventional boat;
FIG. 2 is a schematic view of a first wafer;
FIG. 3 is a schematic view of a second wafer;
fig. 4 is a schematic view of a carrier plate for an LED wafer manufacturing process according to an embodiment of the present invention;
FIG. 5 is a schematic view of a central wafer positioning slot;
FIG. 6 is an enlarged view of a portion of FIG. 4 at A;
FIG. 7 is a side view of FIG. 6;
FIG. 8 is a schematic cross-sectional view of the boat shown in FIG. 4 along line EE;
FIG. 9 is an enlarged partial view of the portion B shown in FIG. 4;
fig. 10 is a schematic view of the carrier plate according to an embodiment of the present invention applied to a physical vapor deposition apparatus.
The symbols in the drawings illustrate that:
1. a carrying tray; 2. a central wafer placing groove; 3. a peripheral wafer placing groove; ya, a first wafer; yb, second wafer.
2a, a first central wafer placing groove; 2b, a second central wafer placing groove; 04. the center of a circle; 05. flattening edges; 06. the edge of the carrying disc; 07. a clearance bevel; 08. a baffle plate; 09. a stress relief port; 10. a taking and placing port; 11. a cavity; 12. a base; 13. heating plates; 14. an annular compression ring; 15. a sputtering device; yb-1, wafer reference edge; w1, width of the edge of the boat; w2, width of baffle; l1, length of baffle; theta, included angle.
Detailed Description
For the content of the present invention to be clearer, the content of the present invention will be further explained with reference to the attached drawings. The present invention is not limited to this specific embodiment. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In this embodiment, as shown in fig. 4, a carrier plate for LED wafer manufacturing process includes:
a carrier tray 1;
the carrying disc 1 is provided with a wafer placing surface which is round;
the wafer placing surface is provided with a wafer placing groove, and the wafer placing groove comprises a central wafer placing groove 2 and a plurality of peripheral wafer placing grooves 3; each peripheral wafer placing groove 3 is arranged around the central wafer placing groove 2 as the center; each peripheral wafer placing groove 3 is provided with a baffle 08, and the baffle 08 is positioned at the peripheral wafer placing groove 3 and the flat edge 05 of the carrying disc 1;
the central wafer placing groove 2 is arranged at the central position of the wafer placing surface, as shown in fig. 5, the central wafer placing groove 2 includes a first central wafer placing groove 2a and a second central wafer placing groove 2b which are concentrically arranged; the centers of the concentric circles are shown as 04 in fig. 4, the first central wafer placing groove 2a and the second central wafer placing groove 2b are used for matching wafers with different sizes, and the first central wafer placing groove 2a and the second central wafer placing groove 2b have a height difference;
as shown in fig. 2 and 3, the size of the first central wafer placing groove 2a matches with the size of the first wafer Ya; the sizes of the second central wafer placing groove 2b and the peripheral wafer placing groove 3 are matched with the size of the second wafer Yb; the wafer reference edge Yb-1 of the second wafer Yb is placed towards the baffle 08; 7 second wafers Yb can be placed on the wafer placement surface.
Two adjacent peripheral wafer-holding grooves 3 are adjacent to each other and form a clearance bevel 07 with the edge 06 of the boat.
A taking and placing opening 10 is arranged at the edge of the wafer placing groove, the radius of the taking and placing opening 10 is 0 mm-20 mm, and end point values are not included.
The edge 06 of the carrying disc is horizontally arranged on the partial circumference of the wafer placing surface and is connected with the flat edge 05; as shown in FIG. 6, the width W1 of the edge of the blade is 0.5mm to 3mm, inclusive.
The length L1 of the baffle is 0.5mm to 30mm, inclusive; the width W2 of the baffle is 0.5mm to 3mm, inclusive; as shown in fig. 7, the baffle 08 is at the same level as the boat edge 06; the baffle 08 is formed integrally with the carrier disc edge 06.
Two sides of the baffle 08 are provided with grooves, and the bottom surfaces of the grooves and the bottom surface of the peripheral wafer placing groove 3 are on the same horizontal plane.
As shown in fig. 8, the inclination angle θ of the clearance slope 07 to the horizontal plane is 0 ° to 8 °, inclusive.
The bottom surface of the groove of the wafer placing groove is horizontally arranged; the bottom surfaces of the grooves of the second central wafer placing groove 2b and the peripheral wafer placing grooves 3 are on the same horizontal plane and are higher than the horizontal position of the bottom surface of the groove of the first central wafer placing groove 2 a.
Stress relief openings 09 are formed at the junctions of the adjacent peripheral wafer placing grooves 3 and the junctions of the peripheral wafer placing grooves 3 and the second central wafer placing groove 2b, as shown in fig. 9; the bottom surface of the stress relief opening 09 is flush with the bottom surfaces of the peripheral wafer mounting groove 3 and the second central wafer mounting groove 2 b.
The stress relief port 09 is 0mm to 20mm in length, inclusive.
As shown in fig. 10, in the chamber 11 of the physical vapor deposition apparatus; the base 12 is used for bearing the carrying disc 1, and the carrying disc 1 is used for bearing the first wafer Ya and the second wafer Yb; a heating plate 13 is arranged between the base 12 and the carrying disc 1, and the heating plate 13 is used for heating the carrying disc 1; the edge 06 of the carrier disc and the baffle 08 are in contact with an annular compression ring 14, and the annular compression ring 14 is used for fixing the carrier disc 1; the sputtering device 15 is positioned at the top of the cavity 11 and used for bearing the target; the material of the target material is selected according to the process requirements, for example, when an AlN thin film is required to be deposited, the target material can be aluminum; depositing mixed gas generated after sputtering the target material on the surface of the wafer to form a film; when the mixed gas is deposited, the inclined gap surface 07 is obliquely arranged, so that a temperature field and a flow field of the peripheral wafer placing groove 3 in a region close to the edge 06 of the carrying disc can be improved, the efficiency of depositing a nitride material is improved, and the problem of poor thickness and material uniformity of a peripheral wafer caused by slow deposition of the mixed gas in the region close to the edge 06 of the carrying disc is solved.
In summary, through the above technical solution, the following effects are achieved:
1. the carrying disc for the LED wafer manufacturing process provided by the embodiment is provided with the peripheral wafer grooves connected with the edge of the carrying disc, the area of the peripheral wafer grooves is properly reduced, the number of the wafer grooves is increased, only 5 second wafers can be originally placed on the wafer placing surface, and 7 second wafers can be placed on the wafer placing surface, so that the utilization rate of the carrying disc is improved, and the productivity is improved under the conditions that the size of the carrying disc is not increased and other hardware of a PVD machine table is not modified.
2. Furthermore, the baffle is arranged on each peripheral wafer placing groove, the baffle is positioned at the flat edge of the peripheral wafer placing groove and the carrying disc, and the wafer reference edge of the second wafer is placed towards the baffle, so that the problems of insufficient evaporation coating and uneven wafer surface of the wafer close to the edge of the carrying disc can be avoided, the wafer yield is improved, the position of the wafer reference edge can be prevented from being misplaced during operation, and the fool-proof effect is achieved.
3. Furthermore, the grooves are formed in the two sides of the baffle plate, so that the peripheral wafer placing groove can be provided with a moving space when the second wafer is placed on the peripheral wafer placing groove, and the phenomenon that the second wafer is clamped on the groove wall of the peripheral wafer placing groove and cannot be horizontally placed, and the wafer evaporation is uneven is avoided.
4. Furthermore, two adjacent peripheral wafer placing grooves are mutually close to each other, a gap inclined plane is formed between each two adjacent peripheral wafer placing grooves and the edge of the carrying disc, the inclination angle between each gap inclined plane and the horizontal plane is 0-8 degrees, end point values are not included, the temperature field and the flow field of the peripheral wafer placing grooves close to the edge area of the carrying disc can be improved by introducing the inclined planes, the thickness of the inclined plane area of the carrying disc is lower than that of the middle area of the carrying disc, when the heating plate under the carrying disc is used for heating, the inclined plane area of the carrying disc is heated more quickly, and the mixed; the inclined surface of the carrier plate reduces the air flow interference, the mixed gas is splashed to the area along with the air flow, the gas loss can be reduced, and the wafers in the edge area of the carrier plate are easier to deposit. Through the gap inclined plane, the efficiency of depositing the nitride material is improved, and the problem that the thickness and the material uniformity of peripheral wafers are poor due to slow deposition of mixed gas in the edge area close to the carrying disc is solved.
5. Further, the central wafer placing grooves comprise a first central wafer placing groove and a second central wafer placing groove which are arranged in a concentric circle; the first central wafer placing groove and the second central wafer placing groove are used for matching wafers of different sizes, the second central wafer placing groove can be used for placing second wafers for volume production, the first central wafer placing groove can be used for placing first wafers as observation pieces, and the central wafer placing groove can be used for placing wafers of different sizes according to different requirements.
6. Furthermore, the baffle and the edge of the carrying disc are arranged at the same horizontal height, so that a contact surface with the annular pressure ring of the PVD equipment can be increased, the risk that the disc surface of the carrying disc is separated from the carrying disc fixing device due to the fact that the contact surface is too small is reduced, the wafer is not in a sputtering area, and the wafer yield is influenced.
7. Furthermore, stress release ports are formed at the junctions of the adjacent peripheral wafer placing grooves and the junctions of the peripheral wafer placing grooves and the second central wafer placing groove; can effectively release stress, prevent that the clearance between wafer standing groove and the wafer is little, the coating by vaporization in-process leads to carrying the dish quotation to crack because of thermal stress, promotes and carries a dish life-span.
8. Furthermore, the wafer placing groove is provided with the taking and placing opening, so that the wafer is conveniently taken and placed, and the efficiency is improved.
It will be understood by those skilled in the art that in the present disclosure, the terms "transverse," "longitudinal," "upper," "lower," and the like are used in an orientation or positional relationship indicated in the drawings for convenience in describing the present invention and simplicity in description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus the above terms should not be construed as limiting the present invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A carrier plate for LED wafer processing is characterized by comprising:
a carrier disc;
the wafer placing surface is round;
the wafer placing surface is provided with a wafer placing groove, and the wafer placing groove comprises a central wafer placing groove and a plurality of peripheral wafer placing grooves; each peripheral wafer placing groove is arranged in a surrounding mode by taking the central wafer placing groove as a center; each peripheral wafer placing groove is provided with a baffle plate, and the baffle plate is positioned at the flat edges of the peripheral wafer placing grooves and the carrying disc;
the central wafer placing groove is formed in the center of the wafer placing surface and comprises a first central wafer placing groove and a second central wafer placing groove which are arranged in a concentric circle; the first central wafer placing groove and the second central wafer placing groove are used for matching wafers with different sizes, and the first central wafer placing groove and the second central wafer placing groove have height difference;
two adjacent peripheral wafer standing grooves are close to each other, and form a clearance inclined plane with the edge of the carrying disc.
2. The carrier plate of claim 1, wherein: the edge of the carrying disc is horizontally arranged on the partial circumference of the wafer placing surface and is connected with the flat edge; the width of the edge of the boat (W1) is 0.5mm to 3mm, inclusive.
3. The carrier plate of claim 1, wherein: the angle of inclination of the gap slope to the horizontal is 0 ° to 8 °, inclusive.
4. The carrier plate of claim 1, wherein: the bottom surface of the groove of the wafer placing groove is horizontally arranged; the groove bottom surfaces of the second central wafer placing groove and the peripheral wafer placing grooves are in the same horizontal plane and are higher than the horizontal position of the groove bottom surface of the first central wafer placing groove.
5. The carrier plate of claim 1, wherein: the length (L1) of the baffle is 0.5mm to 30mm, inclusive; the width (W2) of the baffle is 0.5mm to 3mm, inclusive; the baffle and the edge of the carrying disc are at the same horizontal height; the baffle is integrally formed with the edge of the boat.
6. The carrier plate as claimed in claim 5, wherein: grooves are formed in two sides of the baffle, and the bottom surfaces of the grooves and the bottom surface of the peripheral wafer placing groove are located on the same horizontal plane.
7. The carrier plate of claim 1, wherein: stress release ports are formed in the junctions of the adjacent peripheral wafer placing grooves and the junctions of the peripheral wafer placing grooves and the second central wafer placing groove; the bottom surface of the stress release port, the bottom surfaces of the peripheral wafer placing grooves and the bottom surface of the second central wafer placing groove are on the same horizontal plane.
8. The carrier plate of claim 7, wherein: the stress relief port has a length of 0mm to 20mm, inclusive.
9. The carrier plate of claim 1, wherein: and arranging a taking and placing opening at the edge of the wafer placing groove, wherein the radius of the taking and placing opening is 0 mm-20 mm, and end point values are not included.
10. The carrier plate of claim 1, wherein: the size of the first central wafer placing groove is matched with that of a first wafer; the sizes of the second central wafer placing groove and the peripheral wafer placing groove are matched with those of a second wafer; the wafer reference edge of the second wafer is placed towards the baffle plate; 7 second wafers can be placed on the wafer placing surface.
CN202021673369.6U 2020-08-12 2020-08-12 Carrying disc for LED wafer manufacturing process Active CN212426170U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202021673369.6U CN212426170U (en) 2020-08-12 2020-08-12 Carrying disc for LED wafer manufacturing process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202021673369.6U CN212426170U (en) 2020-08-12 2020-08-12 Carrying disc for LED wafer manufacturing process

Publications (1)

Publication Number Publication Date
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111926305A (en) * 2020-08-12 2020-11-13 厦门乾照半导体科技有限公司 Carrying disc for LED wafer manufacturing process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111926305A (en) * 2020-08-12 2020-11-13 厦门乾照半导体科技有限公司 Carrying disc for LED wafer manufacturing process
CN111926305B (en) * 2020-08-12 2024-10-11 厦门乾照半导体科技有限公司 Carrier tray for LED wafer manufacturing process

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