CN212259129U - Video signal simulation board card - Google Patents
Video signal simulation board card Download PDFInfo
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- CN212259129U CN212259129U CN202021219296.3U CN202021219296U CN212259129U CN 212259129 U CN212259129 U CN 212259129U CN 202021219296 U CN202021219296 U CN 202021219296U CN 212259129 U CN212259129 U CN 212259129U
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Abstract
The utility model discloses a video signal emulation integrated circuit board. The video signal simulation board card comprises a main board and a sub board; the signal interface of the mainboard is used for transmitting video signals, the signal processing unit is used for processing the video signals, the first connecting interface is used for outputting signals output by the signal processing unit to the second connecting interface, the video signal simulation unit is connected with the second connecting interface and used for simulating signals output by the first connecting interface, and the third connecting interface is connected with the video signal simulation unit and used for outputting simulation signals output by the video signal simulation unit. The simulation function of the video shooting device can be realized, and the simulation function is output to the ADAS or the automatic driving controller, so that the test and training of the ADAS or the automatic driving controller can be realized through the video signal simulation board card, the test convenience is greatly improved, and the test cost is reduced.
Description
Technical Field
The utility model relates to a vehicle test technical field especially relates to a video signal emulation integrated circuit board.
Background
With the development of Advanced Driving Assistance Systems (ADAS) and auto-Driving automobiles, the complexity of the controller algorithm is rapidly increased, and how to rapidly and efficiently test the controller sample and the algorithm becomes one of the current hot spots. Because driving is a complex task, the environment is variable in the process of actual driving, in the testing process, a large amount of training is needed to enable the controller to make correct actions on different environments and working conditions like people, and it is estimated that billions of miles of testing is needed to ensure the safety and reliability of the controller. The existing test technical scheme comprises real vehicle road test, namely, a vehicle runs on different actual roads, and a camera, a radar and the like arranged on the vehicle provide real-time environmental information for a controller, but the real vehicle road test has the defects of low efficiency, difficulty in reproducing working conditions and high risk coefficient.
SUMMERY OF THE UTILITY MODEL
The utility model provides a video signal emulation integrated circuit board to improve the convenience of vehicle test, and reduced the test cost.
The embodiment of the utility model provides a video signal simulation board card, which comprises a main board and a daughter board;
the main board comprises a signal interface, a signal processing unit and a first connecting interface, and the daughter board comprises a second connecting interface, a video signal simulation unit and a third connecting interface; the signal interface is used for transmitting video signals, the signal processing unit is connected with the signal interface and used for processing the video signals, the first connecting interface is respectively connected with the signal processing unit and the second connecting interface and used for outputting signals output by the signal processing unit to the second connecting interface, the video signal simulation unit is connected with the second connecting interface and used for simulating signals output by the first connecting interface, and the third connecting interface is connected with the video signal simulation unit and used for outputting simulation signals output by the video signal simulation unit.
Optionally, the signal interface includes an HDMI interface and a DP interface.
Optionally, the signal processing unit includes an FPGA, and the FPGA is configured to transmit and process signals with pixel resolution greater than or equal to 4 k.
Optionally, the first connection interface and the second connection interface are FMC connectors.
Optionally, the motherboard further includes a parallel data line, and the FPGA is connected to the first connection interface through the parallel data line.
Optionally, the daughter board further includes at least one level shift unit, where the level shift unit is connected in series between the second connection interface and the video signal simulation unit, and the level shift unit is configured to convert the LVDS MIPI signal output by the second connection interface into an SLVS signal and output the SLVS signal to the video signal simulation unit.
Optionally, the third connection interface is an SMA connector.
Optionally, the SMA connector is connected to an external circuit by a coaxial line.
Optionally, the format type of the simulation signal output by the video signal simulation unit is the same as that of a preset video signal.
Optionally, the daughter board further includes a video obtaining unit, the video obtaining unit is connected in series between the second connection interface and the third connection interface, and the video obtaining unit is configured to obtain the video signal and output the video signal to the motherboard.
The technical scheme of the embodiment, include mainboard and daughter board through setting up video signal emulation integrated circuit board, the video signal of different traffic scenes is received to the mainboard of video signal emulation integrated circuit board, and transmit to the daughter board after handling, thereby carry out the signal of the different traffic scenes that the video shooting device was shot of formation to video signal through the daughter board emulation, the simulation function of video shooting device has been realized, and output to ADAS or automatic driving controller, make ADAS or automatic driving controller's test and training can realize through video signal emulation integrated circuit board, the convenience of test is greatly improved, and the test cost has been reduced.
Drawings
Fig. 1 is a schematic structural diagram of a video signal simulation board card provided by an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic structural diagram of a video signal simulation board card provided by an embodiment of the present invention. As shown in fig. 1, the video signal emulation board includes a main board 10 and a sub-board 20; the main board 10 includes a signal interface 110, a signal processing unit 120, and a first connection interface 130, and the sub board 20 includes a second connection interface 210, a video signal emulation unit 220, and a third connection interface 230; the signal interface 110 is used for transmitting video signals, the signal processing unit 120 is connected to the signal interface 110 and is configured to process the video signals, the first connection interface 130 is respectively connected to the signal processing unit 120 and the second connection interface 210 and is configured to output signals output by the signal processing unit 120 to the second connection interface 210, the video signal simulation unit 220 is connected to the second connection interface 210 and is configured to simulate signals output by the first connection interface 130, and the third connection interface 230 is connected to the video signal simulation unit 220 and is configured to output simulated signals output by the video signal simulation unit 220.
Specifically, the video signal may be provided by a terminal or a storage medium or the like. For example, the video signal may be provided by a host computer. The signal interface 110 may include an input interface RX, and the input interface RX of the signal interface 110 is connected to a computer host for obtaining video signals from the computer host. After the input interface RX of the signal interface 110 obtains the video signal, the video signal is output to the signal processing unit 120, and the signal processing unit 120 processes the video signal, i.e. analyzes the video signal according to the communication protocol. The motherboard 10 further includes a memory unit, such as a DDR3 chip, the DDR3 chip is composed of two pieces of american light MT41J64M16JT, and has a bit width of 32bit and a depth of 64M. The signal processing unit 120 buffers the parsed video signal data to the storage unit for subsequent transmission to the sub board 20. The main board 10 further includes a program storage module, such as a FLASH memory, for storing the program of the signal processing unit 120. After the processed video signal is cached in the storage unit, the storage unit outputs the processed video signal to the second connection interface 210 through the first connection interface 130, the second connection interface 210 outputs the processed video signal to the video signal simulation unit 220, the video signal simulation unit 220 simulates the processed video signal to form a simulation signal, the simulation signal is the same as the image signal output by the video shooting device, and the simulation signal is output to the vehicle controller through the third connection interface 230. Therefore, the video signals of different traffic scenes are provided for the video signal simulation board card, the video signal simulation board card processes the video signals of different traffic scenes to form signals of different traffic scenes shot by the video shooting device, the simulation function of the video shooting device is realized, and the signals are output to the ADAS or the automatic driving controller, so that the test and training of the ADAS or the automatic driving controller can be realized through the video signal simulation board card, the test convenience is greatly improved, and the test cost is reduced. The video shooting device can be a camera.
It should be noted that in other embodiments, the main board 10 may further include an indicator light, such as an LED light. For indicating the communication connection status, the power status, the status of some registers inside the signal processing unit 120, etc.
On the basis of the above technical solution, the signal interface 110 includes an HDMI interface and a DP interface.
Specifically, the HDMI interface and the DP interface are interfaces for transmitting a high definition video signal by a computer. The HDMI interface may transmit a video signal of the HDMI protocol, and the DP interface may transmit a video signal of the DP protocol. By making the signal interface 110 include an HDMI interface and a DP interface, the video signal emulation board can have the capability of transmitting the video signal of the HDMI protocol and the video signal of the DP protocol, so that the video signal emulation board has flexibility in selection when transmitting the video signal.
On the basis of the above technical solution, the signal processing unit 120 includes an FPGA, and the FPGA is used for transmitting and processing signals with pixel resolution greater than or equal to 4 k.
Specifically, the signal with the pixel resolution greater than or equal to 4K is a signal capable of realizing that the pixel resolution is greater than or equal to 3840 × 2160, that is, the FPGA can support a 4K high-definition video signal, so that the application range of the video signal simulation board card can be increased. Illustratively, the FPGA may be an FPGA of Xilinx K7 series, which has a decoding IP core and can be used to decode the protocol of the signal interface 110, so that a conventional decoding chip is omitted, and the circuit board usage area of the signal processing unit 120 is reduced, thereby making the design more compact. Illustratively, when the signal interface 110 includes an HDMI interface and a DP interface, the Xilinx K7 family FPGA may have an HDMI IP decode core and a DP IP decode core, the HDMI IP decode core supporting the HDMI 2.0 protocol and the DP IP decode core supporting the DP 1.4 protocol, so that the Xilinx K7 family FPGA is capable of supporting a 4K high definition video signal. In addition, the Xilinx K7-series FPGA further includes a DDR3 controller IP, and the DDR3 controller IP is an IP core that manages read/write timing of the DDR3 chip, and can manage read/write timing of the DDR3 chip. The Xilinx K7 series FPGA has MIPI DPHY IP, which is an IP core for receiving and sending MIPI protocol signals, and supports up to 4 links of MIPI signals, and the highest rate of each link is 2.5Gb/S, so that when video signals are transmitted to the sub board 20 through the MIPI interface, the requirement of data bandwidth is met while fast communication of the MIPI signals is realized. Therefore, by arranging the signal processing unit 120 and adopting Xilinx K7 series of FPGA, the fast communication of the video signal can be improved on the basis of ensuring the function of the video signal simulation board card.
With continued reference to fig. 1, the first connection interface 130 and the second connection interface 210 are FMC connectors.
Specifically, the first connection interface 130 and the second connection interface 210 are connection interfaces matched with each other, and the first connection interface 130 and the second connection interface 210 may be both FMC connectors, so that high-speed communication between the motherboard 10 and the daughter board 20 may be achieved. Illustratively, the first connection interface 130 may be an ASP-134486-01 when it is an FMC connector, and the second connection interface 210 may be an ASP-134602-01 when it is an FMC connector.
With continued reference to FIG. 1, the motherboard 10 further includes parallel data lines 140, and the FPGA is connected to the first connection interface 130 via the parallel data lines 140.
Specifically, the FPGA is connected to the FMC connector through the parallel data line 140, so that the video signal simulation board can be compatible with the video signal of the parallel interface, thereby realizing simulation of the video shooting device of the parallel interface.
In addition, the main board 10 may further include a power circuit 150 for providing power for the video signal emulation board.
With continued reference to fig. 1, the sub-board 20 further includes at least one level shifting unit 240, the level shifting unit 240 is connected in series between the second connection interface 210 and the video signal emulation unit 220, and the level shifting unit 240 is configured to convert the LVDS MIPI signal output by the second connection interface 210 into the SLVS signal and output the SLVS signal to the video signal emulation unit 220.
Specifically, the level conversion unit 240 may convert LVDS MIPI signal level into SLVS signal level, so as to implement signal conversion. Illustratively, the level conversion unit 240 may be an MC20902 chip.
With continued reference to fig. 1, the emulated signal output by the video signal emulation unit 220 is the same format type as the predetermined video signal.
Specifically, the format type of the preset video signal is a video signal format type to be simulated by the video signal simulation board card. The format types of video signals of different models of video cameras (for example, cameras) are different, and the communication protocols of different video signal format types are different. When the video signal simulation board card is used for simulating a video signal, the format type of the simulation signal of the video signal simulation unit 220 can be determined according to the preset video signal format type of the video signal simulation board card, and the chip signal of the video signal simulation unit 220 can be determined according to the format type of the simulation signal of the video signal simulation unit 220, so that the simulation of video shooting devices of different models can be realized. Therefore, the video signal simulation board card can select different daughter boards 20 according to the simulation type of the video signal, so that the video signal simulation board card has universality and expandability. Illustratively, the video signal simulation unit 220 may include a DS90UB953 chip, an input interface of the DS90UB953 chip is an MIPI protocol signal, and an output interface is a communication protocol of FPD-LINK-III, so as to complete simulation of a video signal of a camera of a corresponding model.
With continued reference to fig. 1, the third connection interface 230 is an SMA connector.
Specifically, the SMA connector is used as an output end of the video signal simulation board card and can be connected with an external circuit. Illustratively, when the video signal emulation board is used on a vehicle, the SMA connector may be connected to the ADAS or vehicle controller. The SMA connector has the characteristic of high-speed communication, so that the output rate of the simulation signal of the video signal simulation board card can be increased, and the rate of the signal flow of the video signal simulation board card is increased.
Optionally, the SMA connector is connected to the external circuit through a coaxial line, so that the communication rate can be further increased, and the rate of the SMA connector outputting signals can be increased.
With continued reference to fig. 1, the sub board 20 further includes a video capture unit 250, the video capture unit 250 is connected in series between the second connection interface 210 and the third connection interface 230, and the video capture unit 250 is configured to capture a video signal and output the video signal to the main board 10.
Specifically, when the daughter board 20 includes the video acquiring unit 250, the video acquiring unit 250 may be connected to an external video camera (e.g., a camera) through the third connection interface 230, the video acquiring unit 250 acquires a video signal of the video camera through the third connection interface 230, decodes the video signal of the video camera, and transmits the video signal to the motherboard 10 through the second connection interface 210, and the motherboard 10 may transmit the video signal of the video camera to a host computer or a storage medium, which may be used as a video signal input by the signal interface 110 of the video signal emulation board. The signal interface 110 may further include an output interface TX, and the output interface TX of the signal interface 110 and the main board 10 may transmit the video signal of the video camera to a computer or a display screen. Since the video signal of the video photographing device may be a video signal of the HDMI protocol or a video signal of the DP protocol, it may be set that the output interface TX of the signal interface 110 includes the HDMI output interface TX and the DP output interface TX. Illustratively, the format type of the video signal of the video camera is related to the model of the video camera, and the communication protocols of the format types of the video signal of different video cameras are different, so that the decoding protocol of the video obtaining unit 250 can be determined according to the model of the video camera, and different chips are selected to form the video obtaining unit 250, so that the chip model of the video obtaining unit 250 can be determined according to the model of the video camera, that is, different daughter boards 20 are selected according to the type of the video signal of the video camera, so that the video signal simulation board card has universality and expandability. Illustratively, the video acquiring unit 250 may include a DS90UB954 chip, the input of the DS90UB954 chip is a communication protocol of FPD-LINK-III, the output is an MIPI protocol signal, and the deserialization of the DS90UB954 chip completes the acquisition of the video signal of the video shooting device of the corresponding model.
In addition, an MC20901 chip for converting the SLVS signal level into the LVDS MIPI signal level may be further included between the video capture unit 250 and the second connection interface 210, so as to implement the signal conversion.
It should be noted that, when the daughter board 20 includes the video acquiring unit 250, the third connecting interfaces 230 include a plurality of interfaces, the video acquiring unit 250 is connected to an external video camera through another third connecting interface 230, and the third connecting interface 230 connected to the video signal simulating unit 220 is a different interface. Similarly, the second connection interfaces 210 may also include a plurality of interfaces, the video obtaining unit 250 is connected to the main board 10 through another second connection interface 210, and the second connection interface 210 connected to the video signal simulation unit 220 is a different interface.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.
Claims (10)
1. A video signal simulation board card is characterized by comprising a main board and a daughter board;
the main board comprises a signal interface, a signal processing unit and a first connecting interface, and the daughter board comprises a second connecting interface, a video signal simulation unit and a third connecting interface; the signal interface is used for transmitting video signals, the signal processing unit is connected with the signal interface and used for processing the video signals, the first connecting interface is respectively connected with the signal processing unit and the second connecting interface and used for outputting signals output by the signal processing unit to the second connecting interface, the video signal simulation unit is connected with the second connecting interface and used for simulating signals output by the first connecting interface, and the third connecting interface is connected with the video signal simulation unit and used for outputting simulation signals output by the video signal simulation unit.
2. The video signal emulation board of claim 1 wherein the signal interface comprises an HDMI interface and a DP interface.
3. The video signal emulation board of claim 2, wherein the signal processing unit comprises an FPGA configured to transmit and process signals having a pixel resolution greater than or equal to 4 k.
4. The video signal emulation board of claim 3, wherein the first connection interface and the second connection interface are FMC connectors.
5. The video signal emulation board of claim 4, in which the motherboard further comprises parallel data lines, the FPGA being connected to the first connection interface via the parallel data lines.
6. The video signal emulation board card of claim 4, wherein the daughter board further comprises at least one level shifter unit, the level shifter unit is connected in series between the second connection interface and the video signal emulation unit, and the level shifter unit is configured to convert LVDS MIPI signals output by the second connection interface into SLVS signals and output the SLVS signals to the video signal emulation unit.
7. The video signal emulation board of claim 1, in which the third connection interface is an SMA connector.
8. The video signal emulation board card of claim 7, in which the SMA connector is connected to an external circuit by a coaxial line.
9. The video signal emulation board of claim 1, wherein the emulation signal output by the video signal emulation unit is of the same format type as a predetermined video signal.
10. The video signal emulation board of claim 1, wherein the daughter board further comprises a video capture unit, the video capture unit is connected in series between the second connection interface and the third connection interface, and the video capture unit is configured to capture the video signal and output the video signal to the motherboard.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021219296.3U CN212259129U (en) | 2020-06-28 | 2020-06-28 | Video signal simulation board card |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021219296.3U CN212259129U (en) | 2020-06-28 | 2020-06-28 | Video signal simulation board card |
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| CN212259129U true CN212259129U (en) | 2020-12-29 |
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| CN202021219296.3U Active CN212259129U (en) | 2020-06-28 | 2020-06-28 | Video signal simulation board card |
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