Summary of the invention
In view of this, be necessary to provide a kind of energy to be used for the information carrying means of testing camera module group.
A kind of information carrying means is used for connecting a camera module and an image analysis apparatus.This information carrying means comprises that one is used for connecting the first interface of this camera module, the second interface, a buffer memory and a processor that is connected with this first interface, this second interface and this buffer memory that is used for connecting this image analysis apparatus.This processor comprises first controller, a second controller, the 3rd controller.This first controller be used for by this second interface receive that this image analysis apparatus is that send, the instruction of acquisition parameters that include this camera module and send to this camera module to control this this camera module, this acquisition parameters to be set.This second controller is used for receiving the multiple image of this camera module shooting and this multiple image being cached in this buffer memory by this first interface.The 3rd controller is used for reading this multiple image and sending to this image analysis apparatus by this first interface image that every frame is complete from this buffer memory by set rate.
A kind of information carrying means is used for connecting a camera module and an image analysis apparatus; This information carrying means comprises that one is used for connecting the first interface of this camera module, the second interface, a buffer memory and a processor that is connected with this first interface, this second interface and this buffer memory that is used for connecting this image analysis apparatus; This processor includes a central processing unit, a bus, first driver, second driver, the 3rd driver and the 4th driver; This first driver, this second driver, the 3rd driver and the 4th driver are by this bus and this central processing unit communication; This central processing unit be used for to be controlled this this first interface of the first driver drives and is read that this image analysis apparatus is that send, instruction that include the acquisition parameters of this camera module, and this second driver is used for reading this instruction and driving this second interface by this bus sending this instruction to this camera module and to control this camera module, this acquisition parameters being set; The 3rd driver is used for driving this second interface and reads the multiple image that this camera module is taken; The 4th driver is used for this multiple image is write this buffer memory; Thereby the 4th driver also is used for coordinating with this first driver and this multiple image is read to this second interface reads to this image analysis apparatus.
So, this information carrying means can transmit the acquisition parameters of this camera module to this camera module by this first controller.This multiple image is cached in this buffer memory can be realized sending this image analysis apparatus to by this set rate image that every frame is complete, and can realize transmitting at a high speed by set rate, send by the complete image of every frame and can prevent loss of data and falsehood occurs.
Embodiment
See also Fig. 1, the information carrying means 10 of better embodiment of the present invention is used for connecting a camera module 20 and an image analysis apparatus 30.After completing, these camera module 20 assemblings need test, after generally comprising these camera module 20 photographic images, the content of test is sent to this image analysis apparatus 30, as the computer of image analysis software is installed, and carry out graphical analysis, judge from analysis result whether this camera module 20 is qualified.This camera module 20 of such test request can by set acquisition parameters photographic images and with the image taken at a high speed, without falsehood be sent to this image analysis apparatus 30.The information carrying means 10 of present embodiment be used for to connect this camera module 20 and this image analysis apparatus just, and between the information such as the acquisition parameters of this camera module 20 of transmission and image.Certainly, the application of this information carrying means 10 is not limited to present embodiment, also can be used for terminal use's communication.The setting of the acquisition parameters of this camera module 20 is for building the test condition of this camera module 20, can be the parameter such as resolution, vertical sync period of this camera module 20.
This information carrying means 10 comprises that one is used for connecting the first interface 100 of this camera module 20, the second interface 200, a buffer memory 300 and a processor 400 that is connected with this first interface 100, this second interface 200 and this buffer memory 300 that is used for connecting this image analysis apparatus 30.This processor 400 comprises first controller 402, a second controller 404, the 3rd controller 406.This first controller 402 be used for by this second interface 200 receive that this image analysis apparatus 30 is that send, the instruction of acquisition parameters that include this camera module 20 and send to this camera module 20 to control this camera module 20, this acquisition parameters to be set by this first interface 100.This second controller 404 is used for receiving the multiple image of these camera module 20 shootings and this multiple image being cached in this buffer memory 300 by this first interface 100.The 3rd controller 406 is used for reading this multiple image and sending to this image analysis apparatus 30 by this second interface 200 image that every frame is complete from this buffer memory 300 by set rate.
So, this information carrying means 10 can transmit this acquisition parameters to this camera module 20 by this first controller 402.This multiple image is cached in this buffer memory 300 can be realized sending complete every two field picture to this image analysis apparatus 30 by this set rate, and can realize transmitting at a high speed by set rate, send by the complete image of every frame and can prevent loss of data and falsehood occurs.
This camera module 20 can be applied to the electronic products such as mobile phone or notebook computer, and therefore, this second interface 200 also can be connected with these electronic products and realize and being connected of this camera module 20.
for realizing transmitting at a high speed, this first interface 100 adopts high-speed interface with this second interface 200, concrete refers to that switching bandwidth (transmission degree of sending) is at the interface of the order of magnitude (being 1-10Gbps) of 1024 megabit per seconds (1024Mbps=1Gbps), for example, this first interface 100 adopts USB (universal serial bus) 3.0 (universal serial bus, USB 3.0), switching bandwidth is in the 2.0Gbps left and right, so, if the data volume of every two field picture of this camera module 20 is 800Mb, the switching bandwidth of this first interface 100 is in 15 frame/seconds (15fps).Again for example, this second interface 200 can adopt mobile industry processor interface (mobile industry processor interface, MIPI), and have two differential clocks passage (lane, data channel), the switching bandwidth of each lane is the 800Mbps left and right, that is to say that total switching bandwidth of this second interface 200 is in the 1.5Gbps left and right.
This buffer memory 300 can adopt second generation Double Data Rate synchronous DRAM (double data rate synchronous dynamic random access memory, DDR2), its capacity 10Gb or more than, this multiple image of buffer memory (10 frames left and right or more) simultaneously.
This processor 400 can adopt the programmable chip of supporting this first interface 100, this second interface 200 and this buffer memory 300, as field programmable gate array (field-programmable gate array, FPGA).
See also Fig. 2, in a more concrete execution mode, this processor 400 includes a central processing unit 408, a bus 410, first driver 412, second driver 414, the 3rd driver 416 and the 4th driver 418.This first driver 412, this second driver 414, the 3rd driver 416 and the 4th driver 418 are by this bus 410 and these central processing unit 408 communications.This central processing unit 408, this bus 410, this first driver 412 and this second driver 414 coordinate the function that realizes this first controller 402.This central processing unit 408, this bus 410, the 3rd driver 416, the 4th driver 418 coordinate the function that realizes this second controller 404.This central processing unit 408, this bus 410, the 4th driver 418, this first driver 412 coordinate the function that realizes the 3rd controller 406.
Concrete, this central processing unit 408 is used for controlling these first driver, 412 these first interfaces 100 of driving and reads this instruction, this instruction of decoding.Concrete, if this first interface 100 adopts USB 3.0, this first driver is USB 3.0 drivers.More concrete, this instruction generally also includes the driving parameter of transformation parameter and this first driver 412, this second driver 414, the 3rd driver 416 and the 4th driver 418 of this first interface 100, this second interface 200 except the acquisition parameters that includes this camera module 20.
This second driver 414 sends this instruction to this camera module 20 for this second interface 200 of driving driving parameter that reads this instruction by this bus 410 and stipulate by this instruction, thereby the acquisition parameters of this camera module 20 is set.Concrete, this second driver 414 can adopt internal integrated circuit (inter-integrated circuit, I2C) driver.
The 3rd driver 416 is used for reading this instruction by this bus 410, and the transformation parameter of stipulating by this instruction by this second interface 200 of driving driving parameter of this instruction regulation reads this multiple image.
The 4th driver 418 is used for reading this instruction by this bus 410, and the transformation parameter of this multiple image being stipulated by this instruction by the driving parameter of this instruction regulation writes this buffer memory 300.The 4th driver 418 also is used for coordinating with this first driver 412 this multiple image is read to this second interface 200, and this first driver 412 is used for sending the complete image of every frame to this image analysis apparatus 30 by this second interface 200 of driving driving parameter of this instruction regulation.Concrete, the 4th driver 418 comprises a write driver 420, a cache driver 424 and a read driver 422.This write driver 420 is used for driving this cache driver 424 this multiple image is write this buffer memory 300, and this read driver 422 is used for driving this cache driver 424 and reads this multiple image from this buffer memory 300.More concrete, if this buffer memory 300 adopts DDR2, this cache driver 424 can adopt multiport DDR2 driver, to support the expansion of DDR2.
In a word; those skilled in the art will be appreciated that; above execution mode is only that the present invention is described; and be not to be used as limitation of the invention; as long as within connotation scope of the present invention, the appropriate change that above embodiment is done and change all drop on the scope of protection of present invention within.