CN212256305U - Micro ATX server mainboard circuit - Google Patents
Micro ATX server mainboard circuit Download PDFInfo
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- CN212256305U CN212256305U CN202021222409.5U CN202021222409U CN212256305U CN 212256305 U CN212256305 U CN 212256305U CN 202021222409 U CN202021222409 U CN 202021222409U CN 212256305 U CN212256305 U CN 212256305U
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Abstract
The utility model provides a Micro ATX server mainboard circuit belongs to mainboard structure field. The utility model discloses a treater the treater is equipped with a plurality of PCLE passageway, still include with PICe interface module, port switching module more than 1 that the PCLE passageway links to each other, listen the module, wherein, PICe interface module is equipped with interface PCIE1 and interface PCIE2, the setting of port switching module is between interface PCIE1 and interface PCIE2, the input of listening the module links to each other with interface PCIE2, the output with the port switching module links to each other. The utility model has the advantages that: the performance is stable, the type of the inserted equipment can be automatically identified, and a corresponding PCIE signal is output according to the type of the equipment.
Description
Technical Field
The utility model relates to a mainboard structure especially relates to a Micro ATX server mainboard circuit.
Background
The Intel Coffee lake S platform is used by Intel facing to high performanceA processor. Compared with the seventh generation series products, the eighth generation products support 6 cores and 12 threads at most, the 4K video editing speed is 32% faster than that of the seventh generation Core processor, and meanwhile, 40 PCIe 3.0 channels are used for expanding a display card, storage and I/O. With the rise of industry 4.0, especially the implementation of big data and AI algorithms, the industry has more and more demands on high-performance industrial computers; at present, manufacturers at home and abroad also begin to adopt an Intel coffee-S platform in the industrial control industry to meet the coming requirements on performance. How to design a product with complete functions, which meets the requirements of customers, is stable and reliable, and an economic product carrying an Intel Coffee lake S platform becomes the primary target of a company, and is also competitive embodiment of the company.
SUMMERY OF THE UTILITY MODEL
For solving the problem among the prior art, the utility model provides a Micro ATX server mainboard circuit.
The utility model comprises a processor, a plurality of PCLE channels arranged on the processor, more than 1 PICe interface module, a port switching module and a detecting module connected with the PCLE channels,
the PICe interface module is provided with an interface PCIE1 and an interface PCIE2, the port switching module is arranged between the interface PCIE1 and the interface PCIE2, the input end of the detection module is connected with the interface PCIE2, and the output end of the detection module is connected with the port switching module.
The utility model discloses make further improvement, PICe interface module is the PCIEX16 draw-in groove of constituteing by two PCIEX8 interfaces, it is used for listening to insert to listen the module the equipment type of PCIEX16 draw-in groove.
The utility model discloses make further improvement, it includes switch tube Q244 to listen the module, wherein, switch tube Q244's grid passes through resistance RG10 and links to each other with interface PCIE 2's pin 81, interface PCIE 2's pin 81 still links to each other with the treater through resistance R1C24, switch tube Q244's source ground connection, the drain electrode is continuous through the one end with resistance RG9 and port switching module input respectively, resistance RG 9's another termination power.
The utility model discloses make further improvement, the port switches the module and includes that four ports switch the chip, four ports switch the chip and are equipped with A passageway and B passageway, the port switches the chip and passes through the A passageway and link to each other with interface PCIE1 input, the B passageway with interface PCIE2 input links to each other.
The utility model discloses make further improvement, still including the reset signal reinforcing module who is used for reinforcing treater reset signal.
The utility model discloses make further improvement, the reset signal reinforcing module includes triode Q70 and inverting amplifier U168, wherein, triode Q70's base links to each other with the treater, and projecting pole ground connection, collecting electrode link to each other with inverting amplifier U168's input, and inverting amplifier U168's output strengthens reset signal.
The utility model discloses do further improvement, still include power conversion module and power switching module, wherein, power conversion module is used for stepping up system's voltage to treater actual need voltage + V5DUAL, power switching module is used for switching system's voltage to actual need voltage + V5 DUAL.
Compared with the prior art, the beneficial effects of the utility model are that: the performance is stable, the type of the inserted equipment can be automatically identified by optimizing the bus and the PICe interface of the PCIEX16, and a corresponding PCIE signal is output according to the type of the equipment, so that the application performance and the function of the AI dual-display card connected with the PICe interface for cooperative calculation are met; aiming at the reset signal, the driving of the signal is enhanced, the interference design is removed, and the stability of the reset of each device is ensured; the power supply module is optimized, so that the distribution of the power supply is more optimized and the switching is more reliable.
Drawings
FIG. 1 is a block diagram of the present invention;
2-6 are processor circuit schematics;
FIG. 7 is a schematic diagram of a BIOS circuit;
FIG. 8 is a schematic circuit diagram of a reset signal boost module;
FIG. 9 is a circuit schematic of a port switching module;
FIG. 10 is a schematic circuit diagram of a PICe interface module;
FIG. 11 is a schematic diagram of a detection module circuit;
FIG. 12 is a schematic circuit diagram of a power conversion module;
fig. 13 is a schematic circuit diagram of a power switching module.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
As shown in FIG. 1, the utility model comprises a processor, a plurality of PCLE channels arranged on the processor, more than 1 PICe interface module, a port switching module and a detection module connected with the PCLE channels,
the PICe interface module is provided with an interface PCIE1 and an interface PCIE2, the port switching module is arranged between the interface PCIE1 and the interface PCIE2, the input end of the detection module is connected with the interface PCIE2, and the output end of the detection module is connected with the port switching module.
As shown in fig. 2-6 and 8-11, the PICe interface module is a pcie x16 card slot formed by two pcie x8 interfaces, and the detection module is configured to detect a type of a device inserted into the pcie x16 card slot. This example is optimized for the bus of the PCIE X16, and it can automatically identify whether the inserted PCIE X16 device or the two-channel PCIE X8 device is inserted.
The detection module of this example includes a switch Q244, wherein a gate of the switch Q244 is connected to the pin 81 of the interface PCIE2 through a resistor RG10, the pin 81 of the interface PCIE2 is further connected to the processor through a resistor R1C24, a source of the switch Q244 is grounded, a drain of the switch Q244 is connected to one end of the resistor RG9 and the input end of the port switching module respectively, and the other end of the resistor RG9 is connected to the power supply.
As shown in fig. 9, the port switching module of this embodiment includes four port switching chips, where each of the four port switching chips is provided with an a channel and a B channel, the port switching chip is connected to the input end of an interface PCIE1 through the a channel, and the B channel is connected to the input end of the interface PCIE 2.
The working principle of the embodiment is as follows: judging whether a board card is inserted into the slot position or not through a signal of a pin 81 of the interface PCIE 2; if no board card insertion-PRSNT 2 signal is high and the pin 301480 _ SEL signal of each port switching chip in the interface switching module is low, the PCIE X8 signal passes through the 4 port switching chip ASM1480 chip gating a channel to send the signal to the PCIE1 slot, and at the same time, the H _ CFG5 signal is also high, notifying the processor configuration CPU to output the PCIE X16 signal. If the board card insertion-PRSNT 2 signal is low and the pin 301480 _ SEL signal of each port switching chip in the interface switching module is high, the PCIE X8 signal is sent to the PCIE2 slot through the 4 port switching chip ASM1480 chip gating B channel, and meanwhile, the H _ CFG5 signal is also low, which informs the processor configuration CPU to output 2 PCIE X8 signals.
As shown in fig. 8, this example also includes a reset signal enhancement module for enhancing the processor reset signal. The reset signal enhancement module of this example includes a transistor Q70 and an inverting amplifier U168, wherein the base of the transistor Q70 is coupled to the processor, the emitter is grounded, the collector is coupled to the input of the inverting amplifier U168, and the output of the inverting amplifier U168 outputs the enhanced reset signal.
The present example performs a design of enhancing signal driving and removing interference for the reset signal, and ensures the stability of resetting of each device. The PLTRST _ N signal filters noise waves through a triode inversion and a NOT gate, and meanwhile, the driving capability of the signal to equipment is increased.
As shown in fig. 12 and 13, this example further includes a power conversion module for boosting the system voltage to the actually required voltage + V5DUAL of the processor, and a power switching module for switching the system voltage to the actually required voltage + V5 DUAL. The power supply circuit optimizes the design of the + V5DUAL power supply, so that the distribution of the power supply is more optimized and the switching is more reliable.
Specifically, the + V5DUAL power supply starts to operate in the device power supply standby mode, and requires much larger power consumption for operating in the systems mode; the power consumption of ATX power supply and 5V Standby power supply in the market is relatively small, and is generally within 3A. The motherboard of this example would operate with a + V5DUAL power supply much greater than 3A. At this time, the + V5DUAL of the present example cannot be converted by the 5V Standby or 5V Systems power supply of the ATX power supply alone. At the moment, a power supply switching module enables the + V5DUAL to be switched by a 5V Standby power supply in a Standby mode, and switches to be switched by a 5V Systems power supply in a Systems mode.
Specifically, when the EN _ +5SB signal is low in standby mode, PG _ # + V5 is high, and + V5DSW is sent to + V5DUAL through FDS 4435; when entering the Systems mode EN _ +5SB signal is high, PG _ # + V5 is low, + V5DSW turns off the channel through FDS4435, and + V5S turns on through FDS4435 and sends to + V5DUAL, the smart switching of the power supply is realized.
The utility model discloses successfully realize the setting of Intel Coffee lake standard Micro ATX server mainboard, expanded my product line of department. The main board can be assembled into a box computer and used as a small AI workstation. The mainboard can realize 2-channel memory, and the maximum is 128 GB; and the 2 PICe interface modules are used for PCIEX8 expansion, can realize AI acceleration of the dual display cards, and meet the application performance and function of AI dual display card collaborative calculation.
The method and the device realize wide high-speed connection options for application of the Internet of things, have up to 30 high-speed I/O channels, are equipped with high-speed M.22280M-Key storage, can be used for setting rich I/O interfaces, and realize various different industrial 4.0 applications.
The above-mentioned embodiments are the preferred embodiments of the present invention, and the scope of the present invention is not limited to the above-mentioned embodiments, and the scope of the present invention includes and is not limited to the above-mentioned embodiments, and all equivalent changes made according to the present invention are within the protection scope of the present invention.
Claims (7)
1. The utility model provides a Micro ATX server mainboard circuit which characterized in that: comprises a processor, a plurality of PCLE channels arranged on the processor, more than 1 PICe interface module, a port switching module and a detection module which are connected with the PCLE channels,
the PICe interface module is provided with an interface PCIE1 and an interface PCIE2, the port switching module is arranged between the interface PCIE1 and the interface PCIE2, the input end of the detection module is connected with the interface PCIE2, and the output end of the detection module is connected with the port switching module.
2. The Micro ATX server motherboard circuit of claim 1, wherein: the PICe interface module is a PCIEX16 card slot composed of two PCIEX8 interfaces, and the detection module is used for detecting the type of equipment inserted into the PCIEX16 card slot.
3. The Micro ATX server motherboard circuit of claim 2, wherein: the detection module comprises a switch tube Q244, wherein a gate of the switch tube Q244 is connected with a pin 81 of an interface PCIE2 through a resistor RG10, the pin 81 of the interface PCIE2 is further connected with the processor through a resistor R1C24, a source of the switch tube Q244 is grounded, a drain of the switch tube Q244 is connected with an input end of the port switching module through one end of a resistor RG9, and the other end of the resistor RG9 is connected with a power supply.
4. The Micro ATX server motherboard circuit of claim 1, wherein: the port switching module comprises four port switching chips, the four port switching chips are provided with an A channel and a B channel, the port switching chips are connected with an input end of an interface PCIE1 through the A channel, and the B channel is connected with an input end of the interface PCIE 2.
5. A Micro ATX server motherboard circuit according to any of claims 1-4, and further comprising: a reset signal enhancement module is also included for enhancing the processor reset signal.
6. The Micro ATX server motherboard circuit of claim 5, wherein: the reset signal enhancement module comprises a triode Q70 and an inverting amplifier U168, wherein the base of the triode Q70 is connected with the processor, the emitter is grounded, the collector is connected with the input end of the inverting amplifier U168, and the output end of the inverting amplifier U168 outputs an enhanced reset signal.
7. A Micro ATX server motherboard circuit according to any of claims 1-4, and further comprising: the power supply switching device comprises a power supply switching module and a power supply switching module, wherein the power supply switching module is used for boosting the system voltage to the actually-required voltage + V5DUAL of the processor, and the power supply switching module is used for switching the system voltage to the actually-required voltage + V5 DUAL.
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CN202021222409.5U CN212256305U (en) | 2020-06-28 | 2020-06-28 | Micro ATX server mainboard circuit |
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CN202021222409.5U CN212256305U (en) | 2020-06-28 | 2020-06-28 | Micro ATX server mainboard circuit |
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CN212256305U true CN212256305U (en) | 2020-12-29 |
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