CN212183509U - Frequency synthesis circuit of ultrahigh frequency broadband phase-locked system - Google Patents

Abstract

The utility model discloses an ultra-high frequency broadband phase-locked frequency synthesis circuit, which comprises a phase detector, a loop filter, a voltage-controlled oscillator, a preset frequency divider, a first matching attenuator, an amplifier and a second matching Attenuator, phase detector is provided with clock signal input pin, control data input pin, latch signal input pin, reference source input pin, phase detection signal input pin and phase detection signal output pin, phase detection signal The output pin is connected to the input end of the voltage-controlled oscillator through the loop filter, and the output end of the voltage-controlled oscillator is used to output the frequency synthesis signal; the preset frequency divider, the first matching attenuator, the amplifier and the second matching attenuator The devices are connected in turn to form a feedback loop, and the frequency synthesis signal output by the voltage-controlled oscillator is also sent to the phase detection signal input pin of the phase detector through the feedback loop. The effect is that it can effectively match the situation where the output impedance of the preset frequency divider changes, reduce phase noise, and ensure stable performance at high and low temperatures.

Description

Ultra-high frequency broadband phase-locked system frequency synthesis circuit

technical field

The utility model relates to a frequency synthesis technology, in particular to an ultra-high frequency broadband phase-locked system frequency synthesis circuit.

Background technique

Phase-locked frequency synthesis technology is a high-precision and high-stability frequency synthesis technology, which mainly includes reference source, phase detector, loop filter, preset frequency divider, voltage-controlled oscillator and other parts. , usually the design circuit is shown in Figure 1.

Based on the circuit shown in Figure 1, there are often the following problems in the implementation process:

(1) The phase detector has a certain required range for the input power of the phase detection input signal Fp. When the range is not suitable, it will seriously affect the phase noise of the output signal, and even cause the entire circuit to fail to work. Generally, the preset frequency divider The output power is low, especially in high temperature conditions, the power drops significantly with the increase of the operating frequency, resulting in the deterioration of the output signal or even failure to work.

(2) When the phase-locked loop is used for broadband frequency synthesis, the output impedance of the preset frequency divider will change to a certain extent, which will cause impedance mismatch in severe cases, affecting the phase noise of the output signal, spurious suppression and other technical indicators, and even can not work.

SUMMARY OF THE INVENTION

In order to solve the above technical problems, the utility model provides an ultra-high frequency broadband phase-locked system frequency synthesis circuit. The synthesizer circuit mainly improves the feedback loop of the phase-locked loop, thereby ensuring stable high and low temperature performance in the cross-octave frequency synthesis scheme, with little or no deterioration of technical indicators.

In order to achieve the above object, the concrete technical scheme adopted by the present utility model is as follows:

An ultra-high frequency broadband phase-locked system frequency synthesis circuit, comprising a phase detector, a loop filter, a voltage-controlled oscillator and a preset frequency divider, the key of which is that it further comprises a first matching attenuator, an amplifier and a second a matching attenuator, the phase detector is provided with a clock signal input pin, a control data input pin, a latch signal input pin, a reference source input pin, a phase detection signal input pin and a phase detection signal output pin, The phase detection signal output pin is connected to the input end of the voltage-controlled oscillator through the loop filter, and the output end of the voltage-controlled oscillator is used to output a frequency synthesis signal;

The preset frequency divider, the first matching attenuator, the amplifier and the second matching attenuator are connected in sequence to form a feedback loop, and the frequency synthesis signal output by the voltage-controlled oscillator is also sent to the phase detector through the feedback loop. The phase detection signal input pin of the device.

Optionally, the first matching attenuator includes a resistor R14, a resistor R17 and a resistor R18, one end of the resistor R14 serves as the input end of the first matching attenuator, and the other end of the resistor R14 serves as the first matching attenuator The input end of the first matching attenuator is also grounded through the resistor R18, and the output end of the first matching attenuator is also grounded through the resistor R17.

Optionally, the second matching attenuator includes a resistor R13, a resistor R15 and a resistor R16, one end of the resistor R13 serves as the input end of the second matching attenuator, and the other end of the resistor R13 serves as the second matching attenuator The input end of the second matching attenuator is also grounded through the resistor R16, and the output end of the second matching attenuator is also grounded through the resistor R15.

Optionally, the amplifier adopts an operational amplifier module whose model is HMC342.

Optionally, the preset frequency divider adopts a low-noise static frequency divider with a model of HMC432.

Optionally, the phase detector adopts the chip model ADF4153BR.

Optionally, the loop filter includes a resistor R1, a resistor R5, a capacitor C9, a capacitor C10, and a capacitor C13, one end of the resistor R1 serves as the input end of the loop filter, and the other end of the resistor R1 serves as the input end of the loop filter. The output end of the loop filter, the input end of the loop filter is grounded through the capacitor C9, the output end of the loop filter is grounded through the capacitor C10, and the resistor R5 and the capacitor C13 also form a series branch connection between the input of the loop filter and ground.

Optionally, the output end of the voltage-controlled oscillator is also provided with a matching circuit, the matching circuit includes a resistor R2, a resistor R3, a resistor R6, a capacitor C7 and a capacitor C14, and the frequency synthesis signal output by the voltage-controlled oscillator is on one side. After passing through the resistor R2, it enters the series branch formed by the resistor R3 and the capacitor C7 for output, and the other side is sent to the feedback loop through the series branch formed by the resistor R6 and the capacitor C14.

The remarkable effect of the present utility model is:

The ultra-high frequency broadband phase-locked system frequency synthesis circuit provided by the utility model can effectively match the change of the output impedance of the preset frequency divider by adding two matching attenuators and an amplifier in the feedback loop, reducing the phase Noise to ensure stable performance at high and low temperatures.

Description of drawings

The utility model will be further described below in conjunction with the accompanying drawings and embodiments, in the accompanying drawings:

Fig. 1 is the circuit schematic diagram of the existing frequency synthesizer;

Fig. 2 is the circuit principle block diagram of the utility model;

Fig. 3 is the circuit schematic diagram of the phase detector and loop filter in Fig. 2;

Fig. 4 is the circuit schematic diagram of the voltage-controlled oscillator in Fig. 2;

FIG. 5 is a circuit schematic diagram of a feedback loop in a specific embodiment of the present invention.

Detailed ways

In order to make the technical problems, technical solutions and advantages to be solved by the present utility model clearer, the following will be described in detail with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present utility model, and It is not intended to limit the present invention.

This embodiment provides an ultra-high frequency broadband phase-locked frequency synthesis circuit, as shown in Figures 2 to 5, including a phase detector, a loop filter, a voltage-controlled oscillator, a preset frequency divider, a first matching an attenuator, an amplifier and a second matched attenuator;

It can be seen from Figure 3 that the phase detector adopts the chip model ADF4153BR, which is marked as U2 in the figure. The module is powered by 12V and 3.3V DC power respectively, and the module is provided with a clock signal input pin CLK, control data input pin DATA, latch signal input pin LE, reference source input pin REFin, phase detection signal input pin RFin and phase detection signal output pin CP, the phase detection signal output pin CP is filtered by the loop The device is connected to the input end of the voltage controlled oscillator.

The loop filter includes a resistor R1, a resistor R5, a capacitor C9, a capacitor C10 and a capacitor C13. One end of the resistor R1 is used as the input end of the loop filter, and the other end of the resistor R1 is used as the loop filter. The output end of the loop filter is grounded through the capacitor C9, the output end of the loop filter is grounded through the capacitor C10, and the resistor R5 and the capacitor C13 also form a series branch connected to the loop. between the input terminal of the circuit filter and the ground terminal.

It can be seen from Figure 4 that in the implementation process, the chip model used by the voltage-controlled oscillator is UMZ-527-D16, and it is powered by a 12V DC power supply. The output end is also provided with a matching circuit, and the matching circuit includes a resistor R2, resistor R3, resistor R6, capacitor C7 and capacitor C14, the frequency synthesis signal output by the voltage-controlled oscillator passes through the resistor R2 and then enters the series branch formed by the resistor R3 and the capacitor C7 to realize radio frequency output, and the other side It is sent to the feedback loop through the series branch formed by the resistor R6 and the capacitor C14.

It can also be seen from FIG. 3 that the radio frequency output port is further configured with a matching attenuation circuit composed of a resistor R4, a resistor R8, a resistor R9 and a capacitor C8.

As shown in FIG. 5 , the preset frequency divider, the first matching attenuator, the amplifier and the second matching attenuator are connected in sequence to form a feedback loop, and the frequency synthesis signal output by the voltage-controlled oscillator is also sent to the feedback loop through the feedback loop. The phase detection signal input pin of the phase detector.

Among them: the preset frequency divider adopts the low-noise static frequency divider model HMC432;

The first matching attenuator includes a resistor R14, a resistor R17 and a resistor R18, one end of the resistor R14 is used as the input end of the first matching attenuator, and the other end of the resistor R14 is used as the output end of the first matching attenuator, The input end of the first matching attenuator is also grounded through the resistor R18, and the output end of the first matching attenuator is also grounded through the resistor R17.

The amplifier adopts the operational amplifier module of model HMC342;

The second matching attenuator includes a resistor R13, a resistor R15 and a resistor R16, one end of the resistor R13 is used as the input end of the second matching attenuator, and the other end of the resistor R13 is used as the output end of the second matching attenuator, The input end of the second matching attenuator is also grounded through the resistor R16, and the output end of the second matching attenuator is also grounded through the resistor R15.

Based on the frequency synthesis circuit of the ultra-high frequency broadband phase-locked system provided by this embodiment, it can effectively ensure the stable output in the high and low temperature environment during the frequency synthesis across the octave, reduce the deterioration of technical indicators, and at the same time adapt to the preset frequency divider. Output impedance changes to ensure impedance matching and reduce signal phase noise.

Lastly, it should be noted that the embodiments of the present utility model are described above in conjunction with the accompanying drawings, but the present utility model is not limited to the above-mentioned specific embodiments, which are merely illustrative rather than restrictive. Under the enlightenment of the present utility model, those of ordinary skill in the art can also make many forms without departing from the scope of the present utility model and the protection scope of the claims, which all belong to the protection of the present utility model.

Claims (8)

1. an ultra-high frequency broadband phase-locked system frequency synthesis circuit, comprising a phase detector, a loop filter, a voltage-controlled oscillator and a preset frequency divider, it is characterized in that: also comprise the first matching attenuator, amplifier and The second matching attenuator, the phase detector is provided with a clock signal input pin, a control data input pin, a latch signal input pin, a reference source input pin, a phase detection signal input pin and a phase detection signal output pin pin, the phase detection signal output pin is connected to the input end of the voltage-controlled oscillator through the loop filter, and the output end of the voltage-controlled oscillator is used to output a frequency synthesis signal; The preset frequency divider, the first matching attenuator, the amplifier and the second matching attenuator are connected in sequence to form a feedback loop, and the frequency synthesis signal output by the voltage-controlled oscillator is also sent to the phase detector through the feedback loop. The phase detection signal input pin of the device. 2. The ultra-high frequency broadband phase-locked frequency synthesis circuit according to claim 1, wherein the first matching attenuator comprises a resistor R14, a resistor R17 and a resistor R18, and one end of the resistor R14 is used as the first The input end of the matched attenuator, the other end of the resistor R14 is used as the output end of the first matched attenuator, the input end of the first matched attenuator is also grounded through the resistor R18, and the output end of the first matched attenuator Also connected to ground through resistor R17. 3. The ultra-high frequency broadband phase-locked frequency synthesis circuit according to claim 1, wherein the second matching attenuator comprises a resistor R13, a resistor R15 and a resistor R16, and one end of the resistor R13 is used as the second The input end of the matched attenuator, the other end of the resistor R13 is used as the output end of the second matched attenuator, the input end of the second matched attenuator is also grounded through the resistor R16, and the output end of the second matched attenuator Also connected to ground through resistor R15. 4. The ultra-high frequency broadband phase-locked system frequency synthesis circuit according to any one of claims 1-3, wherein the amplifier adopts an operational amplifier module whose model is HMC342. 5 . The ultra-high frequency broadband phase-locked system frequency synthesis circuit according to claim 4 , wherein the preset frequency divider adopts a low-noise static frequency divider with a model of HMC432. 6 . 6 . The ultra-high frequency broadband phase-locked system frequency synthesis circuit according to claim 1 , wherein the phase detector adopts a chip model of ADF4153BR. 7 . 7. The ultra-high frequency broadband phase-locked frequency synthesis circuit according to claim 1, wherein the loop filter comprises a resistor R1, a resistor R5, a capacitor C9, a capacitor C10 and a capacitor C13, and the resistor R1 One end of the resistor R1 is used as the input end of the loop filter, the other end of the resistor R1 is used as the output end of the loop filter, the input end of the loop filter is grounded through the capacitor C9, and the loop filter The output terminal is grounded through the capacitor C10, and the resistor R5 and the capacitor C13 also form a series branch connected between the input terminal and the ground terminal of the loop filter. 8. The ultra-high frequency broadband phase-locked system frequency synthesis circuit according to claim 1, wherein the output end of the voltage-controlled oscillator is also provided with a matching circuit, and the matching circuit comprises a resistance R2, a resistance R3, a resistance R6, capacitor C7 and capacitor C14, the frequency synthesis signal output by the voltage-controlled oscillator passes through the resistor R2 and then enters the series branch formed by the resistor R3 and the capacitor C7 for output, and the other side passes through the resistor R6 and the capacitor C14. The formed series branch is fed into the feedback loop.

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