CN212181278U - Chip type switching device - Google Patents

Abstract

The utility model provides a chip type switching device. The chip-type switching device includes at least one input pad, a plurality of control pads, and a plurality of output pads. The input pad receives an input signal. The control foot pads respectively receive a plurality of control signals. The chip-type switching device is provided with a plurality of operations of the relay, and is controlled by the control signal to switch between the plurality of operations and output an output signal related to the input signal through the output pad.

Description

Chip type switching device

Technical Field

The present invention relates to a signal switching device, and more particularly to a chip type switching device with a plurality of switching operations of a relay.

Background

In signal transmission applications, the switching device is designed to perform signal transmission path or signal switching. The above-mentioned need is one of the subjects which the skilled person endeavors to study.

Disclosure of Invention

The utility model provides a chip type auto-change over device who possesses multiple switching operation.

The utility model discloses a chip type auto-change over device includes at least one input callus on the sole, a plurality of control callus on the sole, a plurality of output callus on the sole and a plurality of ground connection callus on the sole. The input foot pad is configured to receive an input signal. The plurality of control pads are respectively configured to receive a plurality of control signals. The chip type switching device has various operations of the relay and is controlled by the control signal to output an output signal related to the input signal through the output pad.

Based on the above, the utility model discloses a chip type auto-change over device can be controlled by control signal and possesses the multiple contact operation of relay.

In order to make the aforementioned and other features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1 is a schematic view illustrating a foot pad configuration of a chip-type switching device according to an embodiment of the present invention;

fig. 2 is an operation diagram of a chip-type switching device according to an embodiment of the present invention;

fig. 3A and 3B are schematic diagrams illustrating a chip-type switching device according to an embodiment of the present invention performing a C-junction operation;

fig. 3C and 3D are schematic diagrams illustrating an operation of the chip-type switching device to perform an a-contact operation according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of a plurality of chip-type switching devices according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a plurality of chip-type switching devices fabricated on the same substrate according to an embodiment of the present invention;

fig. 6A is a schematic configuration diagram of a plurality of esd protection components according to an embodiment of the present invention;

FIG. 6B is a schematic view of a plurality of ESD protection devices according to another embodiment of the present invention;

fig. 7 is a schematic view illustrating a foot pad configuration of a chip-type switching device according to another embodiment of the present invention;

fig. 8 is a schematic view illustrating a pad configuration of a chip-type switching device according to still another embodiment of the present invention.

Description of the reference numerals

(1) To (41): a foot pad number;

100. 100_1, 100_2, 100_3, 100_4, 200, 300: a chip type switching device;

110_1, 110_2, 110_3, 110_4, 110_ 5: an anti-electrostatic discharge component;

EG1, EG2, EG3, EG 4: a side edge;

GND: a grounding foot pad;

GND 1: a first ground pad;

GND 2: a second ground pad;

GND 3: a third ground pad;

GND 4: a fourth grounding foot pad;

iin, Iin1, Iin 2: inputting a signal;

io1, Io2, Io3, Io 4: outputting the signal;

PIin: inputting a foot pad;

PIo1, PIo2, PIo3, PIo 4: outputting the foot pad;

PL: a plane;

PVin1, PVin2, PVin3, PVin 4: controlling the foot pad;

SB: a substrate;

vin1, Vin2, Vin3, Vin 4: a control signal.

Detailed Description

Referring to fig. 1, fig. 1 is a schematic view illustrating a foot pad configuration of a chip-type switching device according to an embodiment of the present invention. In the present embodiment, the chip-type switching device 100 has 4 sides EG1 to EG4 and a plane PL. Each of the side edges EG 1-EG 4 includes 10 foot pads. Plane PL includes 1 footpad thereon. However, the present invention is not limited thereto. The plurality of foot pads of the present embodiment are represented by foot pad numbers (1) to (41), respectively. In the present embodiment, the 10 foot pads provided on the side EG1 are denoted by pad numbers (1) to (10), respectively. The 10 foot pads provided on the side EG2 are denoted by foot pad numbers (11) to (20), and so on. The foot pad provided on the plane PL is denoted by a foot pad number (41).

In the present embodiment, the chip-type switching device 100 is designed to include an input pad pin (pad number (36)), 4 control pads PVin1 to PVin4 (pad numbers (23), (26), (5), (8), respectively), and 4 output pads PIo1 to PIo4 (pad numbers (19), (29), (2), (12), respectively). The input pad PIin is disposed at the side EG 4. The input pad PIin receives an input signal Iin. In the present embodiment, the input signal Iin may be a current signal, but the present invention is not limited thereto. In some embodiments, the input signal Iin may be a voltage signal. The control foot pads PVin 1-PVin 4 respectively receive control signals Vin 1-Vin 4. For example, the control foot pad PVin1 receives a control signal Vin 1. The control pad PVin2 receives the control signal Vin2, and so on. In the present embodiment, the chip-type switching device 100 includes a plurality of kinds of contact operations of a relay (relay), and outputs output signals Io1 to Io4 associated with an input signal Iin through output pads PIo1 to PIo4 in accordance with control signals Vin1 to Vin 4. In the present embodiment, the chip-type switching device 100 has at least one of the A-contact operation and the C-contact operation of the relay according to the control signals Vin 1-Vin 4. As can be seen, the chip-type switching device 100 can perform a variety of switching operations in response to the control signals Vin1 to Vin 4.

In the present embodiment, the chip-type switching device 100 further includes a plurality of ground pads GND. The plurality of ground pads GND are respectively coupled to a ground potential. A plurality of first ground pads GND1 (pad numbers (35), (37), respectively) among the plurality of ground pads GND are disposed adjacent to both sides of the input pad pin, respectively. The second ground pads GND2 (pad numbers (4), (6), (7), (9), (22), (24), (25) and (27)) among the ground pads GND are respectively disposed at two adjacent sides of the control pads PVin1 to PVin 4. Third ground pads 3 (pad numbers (1), (3), (11), (13), (18), (20), (28), and (30)) among the plurality of ground pads GND are disposed adjacent to both sides of the output pads PIo1 to PIo4, respectively.

Table 1 shows a foot pad configuration of the chip-type switching device 100 of the present embodiment.

Table 1:

it is worth mentioning here that in the high frequency application field, two of the input pad PIin, the control pads PVin 1-PVin 4 and the output pads PIo 1-PIo 4 can be spaced apart by two of the ground pads GND. Two of the grounding foot pads GND can effectively shield high-frequency interference caused by high-frequency signals. As such, the chip-type switching device 100 can have high transmission efficiency.

In the present embodiment, the fourth one of the ground pads GND4 (pad number (41)). The fourth grounding pad serves as a main grounding pad of the chip-type switching device 100. The fourth ground pad GND4 is disposed on the plane PL of the chip-type switching device 100. Therefore, the number of the ground pads GND is equal to two times the total number of the input pads pin, the control pads PVin 1-PVin 4, and the output pads PIo 1-PIo 4 plus 1. Based on the ratio of the number of the input pads PIin, the control pads PVin 1-PVin 4, and the output pads PIo 1-PIo 4 of the present embodiment, the number of the ground pads GND can be obtained according to the following formula one.

N _ GND × (N _ Iin +4 × N _ Vin +4 × N _ Io) +1 … … (formula one)

N _ GND is the number of the grounding foot pads GND. A is the number of input pads PIin. Taking the configuration of fig. 1 as an example, a equals 1. N _ Iin — N _ Vin — N _ Io — 1. Therefore, the number of the ground pads GND is 19 based on the formula one. In other configurations, a may be 2. The number of the ground pads GND is 37.

In some embodiments, the fourth ground pad GND4 is absent. The number of the ground pads GND can be obtained according to the following formula two.

N _ GND × (N _ Iin +4 × N _ Vin +4 × N _ Io) … … … (formula two)

Further, for example, taking the side EG1 as an example, two adjacent pads (pad numbers (1), (3)) on the two sides of the output pad PIo3 are designed as the third ground pad GND 3. The adjacent footpads (footpad numbers (4), (6)) on both sides of the control footpad PVin3 are designed as the second ground footpad GND 2. The adjacent pads (pad numbers (7), (9)) on both sides of the control pad PVin4 are designed as the second ground pad GND 2. A second ground pad GND2 and a third ground pad GND3 are provided between the output pad PIo3 and the control pad PVin3 for grounding. A second grounding pad GND2 and a third grounding pad GND3 are disposed between the control pad PVin3 and the control pad PVin4 for grounding. Therefore, the chip-type switching device 100 shields the high frequency interference between the output pad PIo3 and the control pad PVin3 by the two ground pads. The chip-type switching device 100 also shields the high frequency interference between the control pin PVin3 and the control pin PVin4 through the two ground pins.

In the present embodiment, the control pads PVin1 to PVin4 and the output pads PIo2 and PIo3 are symmetrically provided on the opposite side edges EG1 and EG3 of the chip-type switching device 100 different from the side edge EG 4. The output pads PIo1, PIo4 are symmetrically disposed on the opposite side EG2 of the chip-type switching device 100 from the side EG 4. For example, the control pad PVin3 disposed at the side EG1 is symmetrically disposed with respect to the control pad PVin2 disposed at the side EG 3. The control pad PVin4 disposed at the side EG1 is disposed symmetrically to the control pad PVin1 disposed at the side EG 3. The output pad PIo3 disposed at the side EG1 is disposed symmetrically to the output pad PIo2 disposed at the side EG 3. The output pads PIo1, PIo4 disposed at the side EG2 are symmetrically disposed. In the present embodiment, the control pin PVin3 disposed on the side EG1 may be configured to receive the first control signal of the first control signal pair, and the control pin PVin4 also disposed on the side EG1 may be configured to receive the second control signal of the first control signal pair. Similarly, the control pad PVin1 disposed at the side EG3 may be configured to receive the first control signal of the second control signal pair, while the control pad PVin2 also disposed at the side EG3 may be configured to receive the second control signal of the second control signal pair. That is, the control signals Vin3, Vin4 may be the first control signal and the second control signal of the first control signal pair, respectively, and the control signals Vin1, Vin2 may be the first control signal and the second control signal of the second control signal pair, respectively.

Next, the switching operation of the chip-type switching device 100 will be exemplified. Referring to fig. 2 and table 2, fig. 2 is a schematic operation diagram of a chip-type switching device according to an embodiment of the present invention. Table 2 is a truth table of an embodiment of the present invention.

Table 2:

in the present embodiment, the input pad PIin of the chip-type switching device 100 receives the input signal Iin. The control pad PVin1 receives a control signal Vin1 of a control signal pair. The control pad PVin2 receives another control signal Vin2 of the control signal pair. The control pads PVin3 and PVin4 are electrically connected to ground potential, respectively. The truth table shown in table 2 is applicable to the single-input chip-type switching device 100. In the present embodiment, the chip-type switching device 100 can determine whether the output pad output pads PIo1 to PIo4 output the output signals Io1 to Io4 in response to the control of the control signals Vin1 and Vin 2.

For example, please refer to fig. 2, 3A, 3B and table 2 simultaneously. Fig. 3A and 3B are schematic diagrams illustrating a chip-type switching device according to an embodiment of the present invention performing a C-junction operation. When the logic level of the control signal Vin1 is a first logic level (e.g., high logic level "1"), and the logic level of the control signal Vin2 is a second logic level (e.g., high logic level "0"), the ON operation of the contact C of the relay (relay) is performed by the chip-type switching device 100, as shown in fig. 3A. For example, when the logic level of the control signal Vin1 is the first logic level and the logic level of the control signal Vin2 is the second logic level, the chip-type switching device 100 selects the output pads PIo3 and PIo4 as the selected output pads. Therefore, the chip-type switching device 100 outputs the output signals Io3 and Io4 (indicated as "1" in table 2) through the output pads PIo3 and PIo 4. The output signals Io3, Io4 are substantially related to Iin. The unselected output pads PIo1, PIo2 do not output the output signals Io1, Io2 (denoted as "0" in table 2).

When the logic level of the control signal Vin1 is the second logic level and the logic level of the control signal Vin2 is the first logic level, the on-chip switching device 100 performs the "OFF" operation of the C contact of the relay, as shown in fig. 3B. For example, when the logic level of the control signal Vin1 is the second logic level and the logic level of the control signal Vin2 is the first logic level, the chip-type switching device 100 selects the output pads PIo1 and PIo2 as the selected output pads. Therefore, the chip-type switching device 100 outputs the output signals Io1 and Io2 through the output pads PIo1 and PIo 2. The output signals Io1, Io2 are substantially related to Iin. The unselected output pads PIo3, PIo4 do not output the output signals Io3, Io 4.

For another example, please refer to fig. 2, 3C, 3D and table 2 simultaneously. Fig. 3C and 3D are schematic diagrams illustrating an operation of the chip-type switching device to perform the a-contact operation according to an embodiment of the present invention. When the control signals Vin1 and Vin2 are both at the second logic level, the on-chip switching device 100 will perform the OFF operation of the a contact of the relay, as shown in fig. 3C. For example, when the control signals Vin1 and Vin2 are both at the second logic level, the chip-type switching device 100 does not use the output pads PIo 1-PIo 4 as the selected output pads. Therefore, the chip-type switching device 100 does not output the output signals Io1 to Io4 via the output pads PIo1 to PIo 4.

When the control signals Vin1 and Vin2 are both at the first logic level, the ON operation of the a contact of the relay is performed by the ON-chip switching device 100, as shown in fig. 3D. For example, when the logic levels of the control signals Vin1 and Vin2 are both the first logic level, the chip-type switching device 100 will use the output pads PIo 1-PIo 4 as the selected output pads. Therefore, the chip-type switching device 100 outputs the output signals Io1 to Io4 via the output pads PIo1 to PIo 4. The output signals Io1, Io2 are substantially related to Iin.

Based on the above teachings, the chip-type switching device 100 is controlled by the control signals Vin1, Vin2 to switch between the a-contact operation and the C-contact operation of the relay. That is, the chip-type switching device 100 is controlled by the control signals Vin1 and Vin2 to perform one of the a-contact operation and the C-contact operation of the relay.

In the present invention, the truth table shown in table 2 is also applicable to two chip type switching devices. For example, please refer to table 2 and fig. 4 simultaneously, fig. 4 is an operation schematic diagram of a plurality of chip-type switching devices according to an embodiment of the present invention. In the present embodiment, fig. 4 shows an operation example of the chip-type switching devices 100_1 and 100_ 2. The chip-type switching devices 100_1 and 100_2 are realized by, for example, the chip-type switching device 100 of fig. 1. The input pad PIin of the chip-type switching device 100_1 receives the input signal Iin 1. The input pad PIin of the chip-type switching device 100_2 receives the input signal Iin 2. The input signal Iin1 is different from the input signal Iin 2. The control pad PVin1 of the chip-type switching device 100_1 and the control pad PVin1 of the chip-type switching device 100_2 commonly receive the control signal Vin1 of the control signal pair. The control pad PVin2 of the chip-type switching device 100_1 and the control pad PVin2 of the chip-type switching device 100_2 receive the other control signal Vin2 of the control signal pair. The control pads PVin3 and PVin4 of the chip-type switching device 100_1 and the control pads PVin3 and PVin4 of the chip-type switching device 100_2 are electrically connected to the ground potential, respectively. The output pads PIo2, PIo3 of the chip-type switching device 100_1 and the output pads PIo2, PIo3 of the chip-type switching device 100_2 are electrically connected to the ground potential, respectively.

When the logic level of the control signal Vin1 is a first logic level (e.g., a high logic level "1"), and the logic level of the control signal Vin2 is a second logic level (e.g., a high logic level "0"), the ON operation of the C-contact of the relay is performed by the ON-chip switching device 100. For example, when the logic level of the control signal Vin1 is the first logic level and the logic level of the control signal Vin2 is the second logic level, the chip-type switching device 100_1 selects the output pad PIo1 as the selected output pad to output the output signal Io 3. The chip type switching device 100_2 selects the output pad PIo4 as the selected output pad to output the output signal Io 4. The output signal Io3 is substantially correlated to Iin 1. The output signal Io4 is substantially correlated to Iin 2. That is, the output signals Io3, Io4 are substantially related to the different input signals Iin1, Iin 2. The chip-type switching device 100_1 selects the output pad PIo4 not to output the output signal Io 1. The chip-type switching device 100_2 selects the output pad PIo1 and does not output the output signal Io 2.

When the logic level of the control signal Vin1 is the second logic level and the logic level of the control signal Vin2 is the first logic level, the on-chip switching devices 100_1 and 100_2 commonly perform the "OFF" operation of the C contact of the relay. For example, when the logic level of the control signal Vin1 is the second logic level and the logic level of the control signal Vin2 is the first logic level, the chip-type switching device 100_1 selects the output pad PIo4 as the selected output pad to output the output signal Io 1. The chip type switching device 100_2 selects the output pad PIo1 as the selected output pad to output the output signal Io 2. The output signal Io1 is substantially correlated to Iin 1. The output signal Io2 is substantially correlated to Iin 2. The chip-type switching device 100_1 selects the output pad PIo1 not to output the output signal Io 3. The chip-type switching device 100_2 selects the output pad PIo4 and does not output the output signal Io 4.

When the control signals Vin1, Vin2 are both at the second logic level, the on-chip switching devices 100_1, 100_2 will commonly perform the "OFF" operation of the a contact of the relay. For example, when the control signals Vin1 and Vin2 are both at the second logic level, the chip-type switching device 100_1 does not have the output pads PIo1 and PIo4 as the selected output pad. The chip-type switching device 100_2 does not set the output pads PIo1, PIo4 as the selected output pad. Therefore, both of the chip-type switching devices 100_1 and 100_2 do not output the output signals Io1 to Io4 via the output pads PIo1 and PIo 4.

When the control signals Vin1, Vin2 are both at the first logic level, the ON operations of the a contact of the relay are performed by the ON-chip switching devices 100_1, 100_ 2. For example, when the control signals Vin1, Vin2 are both at the first logic level, both of the chip-type switching devices 100_1, 100_2 will have the output pads PIo1, PIo4 as the selected output pads. Therefore, both of the chip-type switching devices 100_1 and 100_2 output the output signals Io1 to Io4 via the output pads PIo1 and PIo 4. The output signals Io1 and Io3 are substantially related to Iin 1. The output signals Io2 and Io4 are substantially related to Iin 2. That is, the output signals Io 1-Io 4 substantially correlate with the different input signals Iin1, Iin 2.

The fabrication of the chip-type switching device will be described next. Referring to fig. 5, fig. 5 is a schematic diagram illustrating a plurality of chip-type switching devices fabricated on the same substrate according to an embodiment of the present invention. In the present embodiment, 2N chip-type switching devices 100_1 to 100_4 are fabricated on the same substrate SB by a chip (die) fabrication process. N is a positive integer. For convenience of illustration, N is equal to 2 in this embodiment. In other embodiments, the N2 chip-type switching devices are fabricated on the same substrate SB in an array layout. The substrate SB in this embodiment is, for example, a silicon wafer, but the present invention is not limited to the material and the type of the substrate.

In this embodiment, 2N chip-type switching devices 100_1 to 100_4 are properly diced in a single chip-type switching device. The cut chip type switching devices 100_1 to 100_4 are disposed on the same carrier or different carriers. The carrier can be a circuit hard board, a flexible printed circuit board and a soft and hard composite board. The utility model is not limited by the material and type of the carrier. In the present embodiment, the chip-type switching device 100_1 is taken as an example, and the package adhesive is applied to the chip-type switching device 100_1 disposed on the carrier. The input pad, the control pad, the output pad and the ground pad of the chip type switching device 100_1 are exposed from the encapsulant.

Referring to fig. 6A, fig. 6A is a schematic configuration diagram of a plurality of Electrostatic Discharge (ESD) protection components according to an embodiment of the present invention. In the present embodiment, the chip-type switching device 100_3 anti-ESD elements 110_1 to 110_5 are respectively fabricated in the chip-type switching device 100_3 in the chip fabrication process, such that the anti-ESD elements 110_1 to 110_5 are respectively coupled to the input pad PIin and the output pads PIo1 to PIo4 of the chip-type switching device 100_ 3. Further, the input pad PIin and the output pads PIo 1-PIo 4 are coupled in parallel with the ESD protection devices 110_ 1-110 _5, respectively. For example, the ESD protection device 110_1 is coupled in parallel with the input pad PIin. The anti-ESD component 110_2 is coupled in parallel with the output pad PIo 1. The anti-ESD component 110_3 is coupled in parallel with the output pad PIo2, and so on. Thus, the input pad PIin and the output pads PIo 1-PIo 4 can be prevented from being damaged by electrostatic discharge.

Referring to fig. 6B, fig. 6B is a schematic configuration diagram of a plurality of anti-static discharge devices according to another embodiment of the present invention. In the embodiment, the ESD protection devices 110_1 to 110_5 may be designed to be fabricated on the carrier board, such that the ESD protection devices 110_1 to 110_5 are respectively coupled to the input pad PIin and the output pads PIo1 to PIo4 of the chip-type switching device 100_3 from the outside of the chip-type switching device 100_ 3. Further, the input pad PIin and the output pads PIo 1-PIo 4 are coupled in parallel with the ESD protection devices 110_ 1-110 _5, respectively. For example, the ESD protection device 110_1 is coupled in parallel with the input pad PIin. The anti-ESD component 110_2 is coupled in parallel with the output pad PIo 1. The anti-ESD component 110_3 is coupled in parallel with the output pad PIo2, and so on.

Referring to fig. 7, fig. 7 is a schematic view illustrating a foot pad configuration of a chip-type switching device according to another embodiment of the present invention. In the present embodiment, the chip-type switching device 200 has 4 sides EG1 to EG4 and a plane PL. Each of the side edges EG 1-EG 4 includes 8 foot pads. Plane PL includes 1 footpad thereon. The plurality of foot pads of the present embodiment are represented by foot pad numbers (1) to (33), respectively. In the present embodiment, the 8 foot pads provided on the side EG1 are denoted by pad numbers (1) to (8), respectively. The 8 foot pads provided on the side EG2 are denoted by foot pad numbers (9) to (16), and so on. The foot pad provided on the plane PL is denoted by a foot pad number (33).

In the present embodiment, the chip-type switching device 200 is designed to include an input pad pin (pad number (29)), 4 control pads PVin1 to PVin4 (pad numbers (5), (7), (18), (20), respectively), and 4 output pads PIo1 to PIo4 (pad numbers (2), (10), (15), (23), respectively). The remaining footpads are designed to act as ground footpads. In the present embodiment, two of the input pad PIin, the control pads PVin 1-PVin 4, and the output pads PIo 1-PIo 4 disposed on the same side of the chip-type switching device 200 are separated by at least one ground pad GND. For example, at side EG1, output pad PIo3 and control pad PVin3 are spaced apart by 2 ground pads GND. The control pads PVin3, PVin4 are spaced apart by 1 ground pad GND. At side EG2, output pads PIo1, PIo4 are spaced apart by 4 ground pads GND. At side EG3, the output pad PIo2 is spaced from the control pad PVin2 by 2 ground pads GND. The control pads PVin1, PVin2 are spaced apart by 1 ground pad GND.

Similar to the chip-type switching device 100, in the present embodiment, the control pads PVin 1-PVin 4 and the output pads PIo2, PIo3 are symmetrically disposed on two opposite sides EG1, EG3 of the chip-type switching device 200 different from the side EG 4. The output pads PIo1, PIo4 are symmetrically disposed on the opposite side EG2 of the chip-type switching device 100 from the side EG 4.

Table 3 shows a foot pad configuration of the chip-type switching device 200 of the present embodiment.

Table 3:

in the present embodiment, the embodiments of the input pad PIin, the control pads PVin 1-PVin 4 and the output pads PIo 1-PIo 4 and the operation manner of the chip-type switching device 200 can be sufficiently taught by the embodiments of fig. 1-4, and therefore, they will not be repeated. In the present embodiment, the chip-type switching device 200 can be provided with a plurality of contact operations of the relay, and outputs the output signals Io1 to Io4 associated with the input signal Iin through the output pads PIo1 to PIo4 in accordance with the control signals Vin1 to Vin 4.

Referring to fig. 8, fig. 8 is a schematic view illustrating a foot pad configuration of a chip-type switching device according to still another embodiment of the present invention. In the present embodiment, the chip-type switching device 300 has side edges EG1, EG2 and a plane PL. The side edges EG1, EG2 are opposite each other. Each of the side edges EG1, EG2 includes 10 footpads. Plane PL includes 1 footpad thereon. The plurality of foot pads of the present embodiment are represented by foot pad numbers (1) to (21), respectively. In the present embodiment, the 10 foot pads provided on the side EG2 are denoted by pad numbers (1) to (10), respectively. The 10 foot pads provided on the side EG1 are indicated by foot pad numbers (11) to (20), respectively. The foot pad provided on the plane PL is represented by a foot pad number (21).

In the present embodiment, the chip-type switching device 300 is designed to include 2 input pads PIin1, PIin2 (pad numbers (14), (17)), 2 control pads PVin1, PVin2 (pad numbers (11), (20), respectively), and 4 output pads PIo1 to PIo4 (pad numbers (2), (4), (7), (9), respectively). The remaining footpads are designed to act as ground footpads. In the present embodiment, the input pads PIin1, PIin2 and the control pads PVin1, PVin2 are symmetrically disposed on the side EG 1. The output pads PIo 1-PIo 4 are symmetrically disposed on the side EG 2. In the embodiment, the input pads pin 1 and pin 2 and the control pads PVin1 and PVin2 disposed at the side EG1 of the chip-type switching device 300 are spaced apart from each other by at least one ground pad GND. The output pads PIo1 to PIo4 disposed at the side EG2 of the chip-type switching device 300 are spaced apart by at least one ground pad GND. For example, at side EG1, input pads pin 1, pin 2 and control pads PVin1, PVin2 are spaced apart from each other by 2 ground pads GND. At side EG2, output pads PIo1, PIo2 are spaced apart by 1 ground pad GND. The output pads PIo2, PIo3 are spaced apart by 2 ground pads GND. The output pads PIo3, PIo4 are spaced apart by 1 ground pad GND.

Table 4 shows a foot pad configuration of the chip-type switching device 300 of the present embodiment.

Table 4:

in the present embodiment, the embodiments of the input pads PIin1, PIin2, control pads PVin1, PVin2 and output pads PIo1 to PIo4 and the operation manner of the chip-type switching device 300 can be sufficiently taught by the embodiments of fig. 1 to 4, and therefore cannot be repeated. In the present embodiment, the chip-type switching device 300 is capable of operating a plurality of types of contacts including relays, and outputs output signals Io1 to Io4 associated with the input signals Iin1 and Iin2 via the output pads PIo1 to PIo4 in accordance with the control signals Vin1 and Vin 2.

To sum up, the utility model discloses a chip type auto-change over device can carry out multiple switching operation according to control signal. In high frequency applications, two of the input, control and output pads can be spaced apart by two of the ground pads. Two of the grounding foot pads can effectively shield high-frequency interference caused by high-frequency signals. Therefore, the chip type switching device can have higher transmission efficiency. In addition, the input pads and the output pads are respectively provided with antistatic discharge components. Therefore, the input pad and the output pad can be prevented from being damaged by electrostatic discharge. Therefore, the chip type switching device of the present invention can not only perform various switching operations, but also have better reliability.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention.

Claims (10)

1. A chip-type switching device, comprising:

at least one input pad configured to receive an input signal;

a plurality of control pads respectively configured to receive a plurality of control signals; and

a plurality of output pads, wherein the chip-type switching device is provided with a plurality of contact operations of a relay, and is controlled by the plurality of control signals to switch between the plurality of contact operations and output an output signal associated with the input signal through the plurality of output pads.

2. The chip-type switching device of claim 1, further comprising:

the plurality of grounding pads are respectively coupled to the grounding potential.

3. The chip-type switching device according to claim 2, wherein:

the plurality of grounding foot pads have a plurality of first grounding foot pads, a plurality of second grounding foot pads, a plurality of third grounding foot pads, and a fourth grounding foot pad,

the plurality of first ground pads are respectively disposed adjacent to both sides of the at least one input pad,

the plurality of second ground pads are respectively disposed adjacent to both sides of the plurality of control pads,

the plurality of third ground pads are disposed adjacent to both sides of the plurality of output pads, respectively, an

The fourth grounding foot pad serves as a main grounding foot pad of the chip type switching device.

4. The chip-type switching device of claim 2, wherein the number of the plurality of ground pads is equal to twice the total number of the at least one input pad, the plurality of control pads, and the plurality of output pads plus 1.

5. The chip-type switching device of claim 2, wherein any two of the at least one input pad, the plurality of control pads, and the plurality of output pads disposed on the same side of the chip-type switching device are spaced apart by at least one of the plurality of ground pads.

6. The chip-type switching device according to claim 1, wherein:

the chip-type switching device has a first side edge,

the at least one input foot pad is disposed on the first side,

the plurality of control pads and a part of the plurality of output pads are symmetrically disposed on opposite sides of the chip-type switching device different from the first side, an

The rest of the plurality of output pads are symmetrically arranged on the opposite side of the chip-type switching device different from the first side.

7. The chip-type switching device according to claim 6, wherein:

the plurality of control pads having a first control pad, a second control pad, a third control pad, and a fourth control pad,

the opposing sides include a second side and a third side opposite the second side,

the first control foot pad and the second control foot pad are arranged at the second side edge,

the third and fourth control foot pads are disposed on a third side,

the first control foot pad is configured to receive a first control signal,

the second control foot pad is configured to receive a second control signal, an

The first control signal and the second control signal are formed as a control signal pair.

8. The chip-type switching device according to claim 1, wherein:

the chip-type switching device has a first side and a second side opposite to the first side,

the at least one input foot pad and the plurality of control foot pads are symmetrically disposed on the first side,

the plurality of output pads are symmetrically disposed at the second side.

9. The chip-type switching device of claim 1, wherein the at least one input pad and the plurality of output pads are respectively coupled in parallel with an anti-static discharge component.

10. The chip-type switching device according to claim 1, wherein:

the plurality of contact operations include an A-contact operation and a C-contact operation, an

The chip type switching device is controlled by the control signals to switch between the A contact operation and the C contact operation.

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