CN212115148U - Drive circuit of frequency converter - Google Patents
Drive circuit of frequency converter Download PDFInfo
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- CN212115148U CN212115148U CN202021223151.0U CN202021223151U CN212115148U CN 212115148 U CN212115148 U CN 212115148U CN 202021223151 U CN202021223151 U CN 202021223151U CN 212115148 U CN212115148 U CN 212115148U
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Abstract
The utility model relates to a IGBT drive technical field discloses a drive circuit of drive performance preferred and stable converter of output pulse signal, possesses: a microprocessor (DSP) for forming and outputting a level signal and a first field effect transistor (VT101) for receiving the level signal; when the level signal is high level, the high level is inverted by the inverter (U101) and then used for closing the first field effect transistor (VT101), the first triode (Q101) is conducted, and the driving signal output by the microprocessor (DSP) enables an IGBT to be conducted; when the level signal is low level, the low level is inverted by the inverter (U101) and then used for triggering the first field effect transistor (VT101) so as to turn off an IGBT.
Description
Technical Field
The utility model relates to a IGBT drives technical field, more specifically says, relates to a drive circuit of converter.
Background
An inverter is a power control device that controls an ac motor by changing the frequency of an operating power supply. At present, when a driving circuit controls an IGBT (Insulated Gate Bipolar Transistor) to be turned on or off by outputting a PWM driving pulse, the alternating state of the IGBT bridge arms is poor due to poor driving capability of the driving circuit.
Therefore, how to improve the driving performance of the driving circuit becomes a technical problem that needs to be solved by those skilled in the art.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model lies in, the driving force to the above-mentioned drive circuit of prior art is relatively poor, leads to the relatively poor defect of the alternating state of IGBT bridge arm, provides a drive circuit of drive performance preferred and the stable converter of output pulse signal.
The utility model provides a technical scheme that its technical problem adopted is: a drive circuit for an inverter is constructed, and the drive circuit is provided with:
the microprocessor is configured in the driving circuit and used for forming and outputting a level signal;
an inverter, the input end of which is coupled to a signal output end of the microprocessor, for receiving the level signal;
the input end of the photoelectric coupler is connected with the signal output end of the phase inverter and is used for receiving the level signal after phase inversion;
the grid of the first field effect transistor is connected with a signal output end of the photoelectric coupler and used for receiving the level signal;
a base electrode and a collector electrode of the first triode are respectively connected with the driving end of the microprocessor, and an emitting electrode of the first triode is respectively connected with a drain electrode of the first field effect transistor and a grid electrode of an IGBT;
when the level signal is at a high level, the high level is inverted by the inverter and then used for closing the first field effect transistor, the first triode is conducted, and a driving signal output by the microprocessor enables the IGBT to be conducted;
when the level signal is low level, the low level is inverted by the inverter and then used for triggering the first field effect transistor, so that the IGBT is turned off.
In some embodiments, the device further comprises a second field effect transistor, a third field effect transistor and a third triode,
the grid electrode of the second field effect transistor is connected with the other signal output end of the microprocessor and used for receiving the level signal output by the microprocessor;
the drain electrode of the second field effect transistor is connected with the grid electrode of the third field effect transistor, the source electrodes of the second field effect transistor and the third field effect transistor are respectively connected with the emitting electrode of the other IGBT,
and the base electrode and the collector electrode of the third triode are respectively connected with the driving end of the microprocessor, and the emitter electrode of the third triode is connected with the drain electrode of the third field effect transistor and the grid electrode of the other IGBT.
In some embodiments, the device further comprises a second triode and a first diode,
the base electrode of the second triode is connected with a signal output end of the photoelectric coupler and the cathode of the first diode,
the collector of the second triode is connected with the emitter of the first triode and the anode of the first diode,
and the emitter of the second triode is connected with the source of the first field effect transistor.
In some embodiments, the device further comprises a second diode, wherein the anode of the second diode is connected with the driving end of the microprocessor,
the cathode of the second diode is coupled to the collector of the first triode.
In some embodiments, the IGBT further comprises a first voltage stabilizing diode, the anode of the first voltage stabilizing diode is connected with the emitter of the IGBT,
and the cathode of the first voltage stabilizing diode is connected with the grid of the IGBT.
In some embodiments, the circuit further comprises an eighth resistor and a fifth capacitor connected in parallel,
one end of the eighth resistor and one end of the fifth capacitor are respectively connected with the emitting electrode of the first triode;
the other end of the eighth resistor is connected with the grid of the IGBT,
the other end of the fifth capacitor is connected with an emitting electrode of the IGBT.
In the driving circuit of the frequency converter of the present invention, the level signal formed and outputted by the microprocessor controls the on/off of the first field effect transistor, and when the level signal is at a high level, the high level is inverted by the phase inverter and then used for closing the first field effect transistor, so that the driving signal inputted by the microprocessor can further turn on an IGBT through the first triode; when the level signal is low level, the low level is inverted by the inverter and then used for triggering the first field effect transistor so as to pull down the trigger signal of the IGBT and further turn off the IGBT. By implementing the technical scheme, the defect that the alternating state of the IGBT bridge arms is poor due to poor driving capability of the driving circuit can be effectively overcome.
Drawings
The invention will be further explained with reference to the drawings and examples, wherein:
fig. 1 is a circuit diagram of an IGBT upper bridge driving circuit according to an embodiment of a driving circuit of a frequency converter provided by the present invention;
fig. 2 is a circuit diagram of a drive circuit of an IGBT lower bridge according to an embodiment of the present invention.
Detailed Description
In order to clearly understand the technical features, objects, and effects of the present invention, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
As shown in fig. 1 and 2, in the first embodiment of the driving circuit of the frequency converter of the present invention, the driving circuit of the frequency converter includes a microprocessor DSP, an IGBT upper bridge driving circuit 100, and an IGBT lower bridge driving circuit 200.
The microprocessor DSP can convert the analog signal into digital signal, and its working principle is to receive the analog signal, convert it into digital signal of 0 or 1, and then modify, delete and intensify the digital signal.
It should be noted that one IGBT corresponds to the upper arm in the IGBT arm circuit, and the other IGBT corresponds to the lower arm in the IGBT arm circuit.
The IGBT upper bridge driving circuit 100 includes an inverter U101, a photocoupler U102, a first field effect transistor VT101, and a first triode Q101.
The inverter U101 inverts the phase of the input level signal by 180 degrees, i.e., high to low or low to high.
The photo coupler U102 has a logic level isolation function.
The field effect transistor is a voltage control device, controls the change of output current through input voltage, and has the advantages of high input impedance, low noise, large dynamic range, low temperature coefficient and the like.
The triode has the functions of signal amplification and switching.
Specifically, the microprocessor DSP is configured within a driving circuit for forming a logic level signal (i.e., high or low) and then outputting the level signal to the inverter U101.
The input end (corresponding to pin 1) of the phase inverter U101 is connected to a signal output end (corresponding to the UTOP end) of the microprocessor DSP, and is configured to receive a level signal output by the microprocessor DSP, and then input the level signal to the photocoupler U102 after the phase of the level signal is inverted by 180 degrees.
The input end of the photoelectric coupler U102 is connected to the signal output end (corresponding to 2 pins) of the inverter U101 through a first resistor R101 and a first capacitor C101 connected in parallel, and is configured to receive a level signal inverted by the inverter U101, isolate the level signal, and output the level signal to the first field effect transistor VT 101.
The gate of the first field effect transistor VT101 is connected to a signal output terminal (corresponding to the collector of the internal transistor) of the photocoupler U102, and is configured to receive the isolated level signal, and control the on/off state of the first field effect transistor VT101 through the level signal.
Further, the base of the first triode Q101 is connected to the driving terminal (corresponding to the +16V terminal) of the microprocessor DSP through a fifth resistor R105, so as to provide a positive bias voltage for the conduction of the first triode Q101.
The collector of the first transistor Q101 is connected to the driving terminal (corresponding to the +16V terminal) of the microprocessor DSP, that is, when the first transistor Q101 is turned on, a driving signal of an IGBT flows through the collector and the emitter of the first transistor Q101, and then is input to a gate of the IGBT (corresponding to the terminal G1).
The emitter of the first transistor Q101 is connected to the drain of the first field effect transistor VT101, and the emitter of the first transistor Q101 is also connected to the gate (corresponding to terminal G1) of an IGBT.
When the level signal output by the microprocessor DSP is a high level, the high level is inverted by the inverter U101 (i.e., the high level is changed to a low level), the output low level causes the first field effect transistor VT101 to be turned off, at this time, the driving terminal (corresponding to the +16V terminal) of the microprocessor DSP inputs a high level to the first triode Q101, so that the first triode Q101 is turned on, the driving signal (corresponding to the +16V terminal) output by the microprocessor DSP further triggers an IGBT to be turned on, i.e., the upper bridge arm of the IGBT bridge arm circuit is turned on, and the IGBT bridge arm circuit outputs a positive half cycle voltage.
When the level signal output by the microprocessor DSP is a low level, the low level is inverted by the inverter U101 (i.e., the low level is changed to a high level), the output high level turns on the first field effect transistor VT101, and at this time, the driving terminal (corresponding to the +16V terminal) of the microprocessor DSP stops outputting the driving signal, so that an IGBT is turned off.
When an upper bridge arm of the IGBT bridge arm circuit is switched on, a lower bridge arm is switched off, and the IGBT bridge arm circuit outputs positive half-cycle voltage; when the lower bridge arm of the IGBT bridge arm circuit is switched on, the upper bridge arm is switched off, and the IGBT bridge arm circuit outputs negative half-cycle voltage.
When the technical scheme is implemented, the level signal formed and output by the microprocessor DSP controls the on-off of the first field effect transistor VTl01, and when the level signal is at a high level, the high level is inverted by the inverter U101 and then used for closing the first field effect transistor VT101, so that a driving signal input by the microprocessor DSP can trigger an IGBT through the first triode Q101; when the level signal is a low level, the low level is inverted by the inverter U101 and then used for triggering the first field effect transistor VT101 to pull down the trigger signal of an IGBT, thereby turning off the IGBT, and the problem of poor alternating state of IGBT bridge arms due to poor driving capability of the driving circuit can be effectively solved.
In some embodiments, the IGBT lower bridge driving circuit 200 includes a second fet VT201, a third fet VT202, and a third transistor Q201, wherein the third transistor Q201 is an NPN-type transistor.
Specifically, the gate of the second fet VT201 is connected to another signal output terminal (corresponding to the UBOT) of the microprocessor DSP through the eleventh resistor R201, and is configured to receive a level signal output by the microprocessor DSP, where the level signal is used to control the on/off state of the second fet VT 201.
The drain of the second field effect transistor VT201 is connected to the gate of the third field effect transistor VT202, and the sources of the second field effect transistor VT201 and the third field effect transistor VT202 are connected to the emitter (corresponding to E2) of the other IGBT, respectively.
The base of the third triode Q201 is connected with the driving terminal (corresponding to +16V) of the microprocessor DSP through a fourteenth resistor R204, so as to provide a positive bias voltage for the conduction of the third triode Q201.
The collector of the third transistor Q201 is connected to the driving terminal (corresponding to +16V) of the microprocessor DSP, that is, when the third transistor Q201 is turned on, the driving signal of another IGBT flows through the collector and emitter of the third transistor Q201, and then is input to the gate of another IGBT (corresponding to terminal G2).
The emitter of the third transistor Q201 is connected to the drain of the third field effect transistor VT202, and the emitter of the third transistor Q201 is also connected to the gate (corresponding to terminal G2) of another IGBT.
When the level signal output by the microprocessor DSP is a high level, the high level is used to trigger the first field effect transistor VT101 to turn on, and at this time, the driving terminal (corresponding to the +16V terminal) of the microprocessor DSP stops outputting the driving signal, thereby turning off the other IGBT.
When the level signal output by the microprocessor DSP is a low level, the low level causes the first field effect transistor VT101 to turn off, at this time, the driving terminal (corresponding to the +16V terminal) of the microprocessor DSP inputs a high level to the third triode Q201, respectively, so that the third triode Q201 is turned on, the driving signal (corresponding to +16V) output by the microprocessor DSP further triggers another IGBT to be turned on, that is, the lower bridge arm of the IGBT bridge arm circuit is turned on, and the IGBT bridge arm circuit outputs a negative half cycle voltage.
In some embodiments, in order to improve the performance of the IGBT upper bridge driving circuit 100, a second transistor Q102 and a first diode D101 may be provided in the circuit. The second transistor Q102 is an NPN transistor.
Specifically, the base of the second triode Q102 is connected to a signal output terminal of the photocoupler U102 through the fourth resistor R104, and the base of the second triode Q102 is further connected to the cathode of the first diode D201.
The collector of the second triode Q102 is connected with the emitter of the first triode Q101 and the anode of the first diode D201, and the emitter of the second triode Q102 is connected with the source of the first field effect transistor VT 101.
In some embodiments, in order to improve the safety of the operation of the microprocessor DSP, a second diode D102 and a tenth resistor R110 may be disposed in the IGBT upper bridge driving circuit 100, wherein the second diode D102 is connected in series with the tenth resistor R110.
The anode of the second diode D102 is connected to the driving terminal of the microprocessor DSP through the tenth resistor R110, the cathode of the second diode D102 is coupled to the collector of the first transistor Q101, and the reverse input voltage of an IGBT in an abnormal state can be reduced by the second diode D102, thereby improving the safety of the microprocessor DSP.
In some embodiments, in order to improve the safety of the driving circuit, a first zener diode VS101 and a second zener diode VS201 may be provided in the circuit, which may control the driving voltage waveform to be about 15V.
The voltage stabilizing diodes are amplitude limiting voltage stabilizing tubes, and can limit the amplitude of a signal output by the driving circuit and prevent the IGBT from being damaged due to overhigh output voltage.
Specifically, the anode of the first zener diode VS101 is connected to the emitter (corresponding to terminal E1) of an IGBT, and the cathode of the first zener diode VS101 is connected to the gate (corresponding to terminal G1) of an IGBT.
The anode of the second zener diode VS201 is connected to the emitter (corresponding to terminal E2) of the other IGBT, and the cathode of the second zener diode VS201 is connected to the gate (corresponding to terminal G2) of the other IGBT.
When the IGBT is in short circuit, the voltage stabilizing diodes (VS101 and VS201) can restrain the rise of driving voltage caused by the IGBT short-circuit current with extremely fast change rate, and avoid the phenomenon that the rise of the driving voltage causes the increase of the IGBT short-circuit current again to form malignant positive feedback, so that the IGBT short-circuit current can be controlled within a safe range.
In some embodiments, the IGBT upper bridge driving circuit 100 further includes an eighth resistor R108 and a fifth capacitor C105 connected in parallel, which are used to suppress the drive voltage signal oscillation caused by the IGBT short-circuit current.
Specifically, one end of the eighth resistor R108 and one end of the fifth capacitor C105 are respectively connected to the emitter of the first transistor Q101, the other end of the eighth resistor R108 is connected to the gate (corresponding to G1) of an IGBT, and the other end of the fifth capacitor C105 is connected to the emitter (corresponding to E1) of an IGBT.
It should be noted that the seventeenth resistor R207 and the eighth capacitor C203 connected in parallel to the IGBT lower bridge driving circuit 200 have the same functions as the eighth resistor R108 and the fifth capacitor C105, and thus are not described in detail.
While the embodiments of the present invention have been described with reference to the accompanying drawings, the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many modifications may be made by one skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.
Claims (6)
1. A drive circuit for an inverter, comprising:
the microprocessor is configured in the driving circuit and used for forming and outputting a level signal;
an inverter, the input end of which is coupled to a signal output end of the microprocessor, for receiving the level signal;
the input end of the photoelectric coupler is connected with the signal output end of the phase inverter and is used for receiving the level signal after phase inversion;
the grid of the first field effect transistor is connected with a signal output end of the photoelectric coupler and used for receiving the level signal;
a base electrode and a collector electrode of the first triode are respectively connected with the driving end of the microprocessor, and an emitting electrode of the first triode is respectively connected with a drain electrode of the first field effect transistor and a grid electrode of an IGBT;
when the level signal is at a high level, the high level is inverted by the inverter and then used for closing the first field effect transistor, the first triode is conducted, and a driving signal output by the microprocessor enables the IGBT to be conducted;
when the level signal is low level, the low level is inverted by the inverter and then used for triggering the first field effect transistor, so that the IGBT is turned off.
2. The drive circuit of a frequency converter according to claim 1,
also comprises a second field effect tube, a third field effect tube and a third triode,
the grid electrode of the second field effect transistor is connected with the other signal output end of the microprocessor and used for receiving the level signal output by the microprocessor;
the drain electrode of the second field effect transistor is connected with the grid electrode of the third field effect transistor, the source electrodes of the second field effect transistor and the third field effect transistor are respectively connected with the emitting electrode of the other IGBT,
and the base electrode and the collector electrode of the third triode are respectively connected with the driving end of the microprocessor, and the emitter electrode of the third triode is connected with the drain electrode of the third field effect transistor and the grid electrode of the other IGBT.
3. The drive circuit of a frequency converter according to claim 1,
also comprises a second triode and a first diode,
the base electrode of the second triode is connected with a signal output end of the photoelectric coupler and the cathode of the first diode,
the collector of the second triode is connected with the emitter of the first triode and the anode of the first diode,
and the emitter of the second triode is connected with the source of the first field effect transistor.
4. The drive circuit of a frequency converter according to claim 2 or 3,
the anode of the second diode is connected with the driving end of the microprocessor,
the cathode of the second diode is coupled to the collector of the first triode.
5. The drive circuit of a frequency converter according to claim 2 or 3,
the IGBT further comprises a first voltage stabilizing diode, the anode of the first voltage stabilizing diode is connected with the emitter of the IGBT,
and the cathode of the first voltage stabilizing diode is connected with the grid of the IGBT.
6. The drive circuit of a frequency converter according to claim 5,
also comprises an eighth resistor and a fifth capacitor which are connected in parallel,
one end of the eighth resistor and one end of the fifth capacitor are respectively connected with the emitting electrode of the first triode;
the other end of the eighth resistor is connected with the grid of the IGBT,
the other end of the fifth capacitor is connected with an emitting electrode of the IGBT.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021223151.0U CN212115148U (en) | 2020-06-28 | 2020-06-28 | Drive circuit of frequency converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021223151.0U CN212115148U (en) | 2020-06-28 | 2020-06-28 | Drive circuit of frequency converter |
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| CN212115148U true CN212115148U (en) | 2020-12-08 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114487757A (en) * | 2022-04-14 | 2022-05-13 | 长沙丹芬瑞电气技术有限公司 | Detection apparatus for field effect transistor health status and power supply |
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2020
- 2020-06-28 CN CN202021223151.0U patent/CN212115148U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114487757A (en) * | 2022-04-14 | 2022-05-13 | 长沙丹芬瑞电气技术有限公司 | Detection apparatus for field effect transistor health status and power supply |
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