CN212111593U - Test strip impedance measurement system - Google Patents
Test strip impedance measurement system Download PDFInfo
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- CN212111593U CN212111593U CN202020656184.8U CN202020656184U CN212111593U CN 212111593 U CN212111593 U CN 212111593U CN 202020656184 U CN202020656184 U CN 202020656184U CN 212111593 U CN212111593 U CN 212111593U
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Abstract
The utility model discloses a examination strip impedance measurement system has realized the impedance measurement and the analysis of a plurality of examination strips, has solved the problem of the inefficiency of artifical mode measurement impedance, has avoided the risk of makeing mistakes, when having solved a batch examination strip of production, can not accomplish the characteristic analysis of examination strip impedance fast and lead to the extravagant problem of examination strip. The system comprises: the system comprises an acquisition subsystem, a control subsystem and an analysis subsystem; the acquisition subsystem is provided with N measurement channels; the control subsystem comprises a microprocessor, M double-channel relays and M/N relay controllers, wherein the M double-channel relays form a relay matrix with N rows and M/N columns; the microprocessor enables the corresponding double-channel relay to be switched on or off by controlling the relay controller; the acquisition subsystem performs impedance measurement on the connected test strips through the N measurement channels to obtain measurement data; the microprocessor processes the measured data to obtain the impedance value of the test strip; the analysis subsystem analyzes the impedance value of the test strip to obtain an impedance analysis result.
Description
Technical Field
The utility model relates to an external diagnostic product field especially relates to a examination strip impedance measurement system.
Background
At present, many testers need to be matched with corresponding test strips (also called electrochemical sensors) to measure. The test strip is used as a sensor of the tester and has direct influence on the measurement result. Therefore, control of key parameters of the strip is required during the strip manufacturing process. Impedance is one of the key parameters of the strip, and if the impedance is abnormal, it causes the strip to supply an abnormal current to the tester, thereby causing an abnormal result to be provided to the tester. Therefore, the impedance measurement of the test strip is a necessary and important indicator of the production of the test strip.
The prior art measures the impedance of the test strip manually using a multimeter and then records the impedance by hand.
However, the efficiency of measuring impedance manually is extremely low; moreover, the manual mode has certain error risk; and the impedance characteristics of the test strips cannot be quickly analyzed for a batch of test strips produced, resulting in impedance characteristic problems that waste the batch of test strips produced.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a examination strip impedance measurement system has realized the impedance measurement and the analysis of a plurality of examination strips, has not only solved the problem of the inefficiency of artifical mode measurement impedance, has still avoided the risk of makeing mistakes of artifical mode to when having solved a batch examination strip of production, the characteristic analysis that can not accomplish examination strip impedance fast leads to the extravagant problem of examination strip.
The utility model discloses an aspect provides a examination strip impedance measurement system, include:
the system comprises an acquisition subsystem, a control subsystem and an analysis subsystem;
the acquisition subsystem is provided with N measurement channels, wherein N is a positive integer not less than 1;
the control subsystem comprises a microprocessor, M double-channel relays and M/N relay controllers, wherein the M double-channel relays form a relay matrix with N rows and M/N columns, M is a positive integer larger than 1, and M/N is a positive integer;
the N measuring channels are respectively connected with all the double-channel relays of the N rows of the relay matrix, the M/N relay controllers are respectively connected with all the double-channel relays of the M/N columns of the relay matrix, and the M/N relay controllers are respectively connected with the microprocessor;
the microprocessor is used for controlling the relay controller to enable the corresponding double-channel relay to be switched on or switched off, the double-channel relay is connected with the test strip when being switched on, and the double-channel relay is disconnected with the test strip when being switched off;
the acquisition subsystem is used for carrying out impedance measurement on the connected test strips through the N measurement channels to obtain measurement data;
the microprocessor is also used for processing the measured data to obtain the impedance value of the test strip;
and the analysis subsystem is used for analyzing the impedance value of the test strip to obtain an impedance analysis result.
Further, the impedance of the test strip is measured by scanning from the 1 st column to the M/N column,
the microprocessor controls the Xth relay controller to conduct all the double-channel relays in the Xth row so that the test strips in the Xth row are accessed, the acquisition subsystem carries out impedance measurement on the test strips in the Xth row through N measurement channels to obtain measurement data of the test strips in the Xth row, and X is a positive integer not less than 1 and less than M/N;
the microprocessor controls the Xth relay controller to close all the double-channel relays in the Xth row, controls the X +1 th relay controller to conduct all the double-channel relays in the X +1 th row, enables the test strips in the X +1 th row to be connected, and the acquisition subsystem carries out impedance measurement on the test strips in the X +1 th row through the N measurement channels to obtain measurement data of the test strips in the X +1 th row.
Furthermore, the impedance of the test strip is measured by measuring a target test strip, the target test strip corresponds to the double-channel relays in the x-th row and the y-th column, x is a positive integer not less than 1 and not more than N, y is a positive integer not less than 1 and not more than M/N,
the microprocessor controls the relay controller in the y column to conduct the dual-channel relay in the x row in the y column, so that the target test strip is connected, and the acquisition subsystem performs impedance measurement on the target test strip through the measurement channel in the x row to obtain measurement data of the target test strip.
Further, before the microprocessor controls the relay controller to enable the corresponding double-channel relay to be conducted, the microprocessor is also used for judging whether the test strip is ready or not by judging whether the pulse signal is received or not, and if the pulse signal is received, the test strip is ready; if no pulse signal is received, indicating that the strip is not ready, the pulse signal is generated when the strip is inserted.
Further, the acquisition subsystem is a universal meter, the universal meter comprises a universal meter communication module and a measurement module, the universal meter communication module is in communication connection with the microprocessor, and the measurement module is provided with N measurement channels;
the measuring module is used for measuring the impedance of the test strip through the N measuring channels and acquiring measuring data;
and the multimeter communication module is used for sending the measurement data to the microprocessor.
Further, the universal meter is 4-wire system impedance measurement mode, and the measurement module includes:
4N measurement pins and 2 switch pins, 4 every in 4N measurement pins constitute a measurement channel.
Further, the control subsystem further comprises:
the system comprises a universal meter communication interface, an analysis subsystem communication interface, a measurement interface and a battery interface;
the universal meter communication interface is connected with the universal meter communication module and the microprocessor;
the analysis subsystem communication interface is connected with the analysis subsystem and the microprocessor;
the measuring interface is connected with the measuring module through a 4N +2 color flat cable;
the battery interface is connected with the microprocessor and each relay controller.
Further, the microprocessor includes:
the system comprises a universal meter communication unit, an analysis subsystem communication unit, a data processing unit and a control unit;
the universal meter communication unit is used for establishing communication connection with the universal meter through a universal meter communication interface and receiving measurement data of the test strips sent by the universal meter;
the data processing unit is used for processing the measured data to obtain the impedance value of the test strip;
the analysis subsystem communication unit is used for establishing communication connection with the analysis subsystem through the analysis subsystem communication interface and sending the impedance value of the test strip to the analysis subsystem;
and the control unit is used for controlling the relay controller to enable the corresponding double-channel relay to be switched on or switched off.
Further, the control subsystem further comprises:
the horn socket comprises U pins, V pins and V pins, wherein the U is a positive integer which is a multiple of 2, and the V is a positive integer which is more than N and not less than 2M/U;
the test strip needle bed board is connected with the ox horn socket, and the pin quantity of test strip needle bed board is greater than 2M.
Further, the analysis subsystem includes: an analysis module;
the analysis module is used for analyzing the impedance value of the test strip according to the preset impedance upper limit value and impedance lower limit value to obtain an impedance analysis result;
the analysis subsystem further comprises: a display module;
and the display module is used for presenting the impedance analysis result to a user, and specially marking the impedance value of the test strip when the impedance value of the test strip is not in the areas of the upper impedance value and the lower impedance value.
From the above, the test strip impedance measurement system of the utility model comprises an acquisition subsystem, a control subsystem and an analysis subsystem, wherein the acquisition subsystem is provided with N measurement channels, N is a positive integer not less than 1, the control subsystem comprises a microprocessor, M double-channel relays and M/N relay controllers, the M double-channel relays form a relay matrix with N rows and M/N columns, M is a positive integer greater than 1, M/N is a positive integer, the N measurement channels are respectively connected with all double-channel relays of the N rows of the relay matrix, the M/N relay controllers are respectively connected with all double-channel relays of the M/N columns of the relay matrix, the M/N relay controllers are respectively connected with the microprocessor, the microprocessor controls the relay controllers to enable the corresponding double-channel relays to be switched on or switched off, the dual-channel relay is connected with the test strip when being switched on, and is disconnected with the test strip when being switched off, the acquisition subsystem carries out impedance measurement on the connected test strip through the N measurement channels to obtain measurement data, the microprocessor processes the measurement data to obtain an impedance value of the test strip, and the analysis subsystem analyzes the impedance value of the test strip to obtain an impedance analysis result. Compare with the impedance of current artifical mode measurement examination strip, the embodiment of the utility model provides a can realize the impedance measurement and the analysis of a plurality of examination strips, not only solve the problem of the inefficiency of artifical mode measurement impedance, still avoided the risk of makeing mistakes of artifical mode to when having solved a batch examination strip of production, the characteristic analysis that can not accomplish examination strip impedance fast leads to the extravagant problem of examination strip.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an embodiment of a test strip impedance measurement system provided by the present invention;
fig. 2 is a schematic diagram of a scanning mode of the test strip impedance measurement system provided by the present invention;
fig. 3 is a schematic structural diagram of another embodiment of a test strip impedance measurement system provided by the present invention;
fig. 4 is a schematic structural diagram of a test strip impedance measurement system according to another embodiment of the present invention.
Detailed Description
The core of the utility model is to provide a examination strip impedance measurement system has realized the impedance measurement and the analysis of a plurality of examination strips, has not only solved the problem of the inefficiency of artifical mode measurement impedance, has still avoided the risk of makeing mistakes of artifical mode to when having solved a batch examination strip of production, the characteristic analysis that can not accomplish examination strip impedance fast leads to the extravagant problem of examination strip.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
As shown in fig. 1, an embodiment of the present invention provides a test strip impedance measurement system, including:
the system comprises an acquisition subsystem 11, a control subsystem 12 and an analysis subsystem 13;
the acquisition subsystem 11 is provided with N measurement channels, wherein N is a positive integer not less than 1;
the control subsystem 12 comprises a microprocessor 121, M dual-channel relays 122 and M/N relay controllers 123, wherein the M dual-channel relays 122 form a relay matrix with N rows and M/N columns, M is a positive integer greater than 1, and M/N is a positive integer;
the N measuring channels are respectively connected with all the double-channel relays 122 in the N rows of the relay matrix, the M/N relay controllers 123 are respectively connected with all the double-channel relays 122 in the M/N columns of the relay matrix, and the M/N relay controllers 123 are respectively connected with the microprocessor 121;
the microprocessor 121 is used for controlling the relay controller 123 to enable the corresponding dual-channel relay 122 to be switched on or off, the dual-channel relay 122 is connected with the test strip when being switched on, and the dual-channel relay 122 is disconnected with the test strip when being switched off;
the acquisition subsystem 11 is used for measuring the impedance of the connected test strips through the N measurement channels to obtain measurement data;
the microprocessor 121 is further configured to process the measurement data to obtain an impedance value of the test strip;
and the analysis subsystem 13 is used for analyzing the impedance value of the test strip to obtain an impedance analysis result.
In the embodiment of the present invention, in fig. 1, the control subsystem 12 includes a microprocessor 121, M/N relay controllers 123, M dual-channel relays 122, the M dual-channel relays 122 form a relay matrix, the number of rows of the relay matrix is N rows, the number of columns is M/N columns, M is a positive integer greater than 1, and M/N is a positive integer, for example, 400 dual-channel relays 122 form a relay matrix of 8 rows and 50 columns, then there are 50 relay controllers 123, and the number of rows of the measurement channels and the relay matrix that the collection subsystem 11 has is then 8 measurement channels;
each measurement channel is connected to a row of dual-channel relays 122 of the relay matrix, for example, in fig. 1, the 1 st measurement channel corresponds to the 1 st row of dual-channel relays 122, the 2 nd measurement channel corresponds to the 2 nd row of dual-channel relays 122, and the nth measurement channel corresponds to the nth row of dual-channel relays 122;
one relay controller 123 corresponds to the dual-channel relays 122 in one column, for example, in fig. 1, the relay controller 123 numbered 1 is connected to all the dual-channel relays 122 in the 1 st column, the relay controller 123 numbered 2 is connected to all the dual-channel relays 122 in the 2 nd column, the relay controller 123 numbered M/N is connected to all the dual-channel relays 122 in the M/N th column, and all the relay controllers 123 are respectively connected to the microprocessor 121;
the microprocessor 121 controls the relay controller 123 to turn on or off the corresponding dual-channel relay 122, the dual-channel relay 122 plays a role of a switch, and after a test strip is inserted, when the dual-channel relay 122 is turned on, the test strip is connected to the corresponding measuring channel; when the dual-channel relay 122 is turned off, the test strip is disconnected from the corresponding measurement channel;
the acquisition subsystem 11 measures the impedance of the connected test strips through the N measurement channels to obtain measurement data, the acquisition subsystem 11 sends the measurement data to the microprocessor 121, the microprocessor 121 processes the measurement data to obtain the impedance values of the test strips, and the analysis subsystem 13 analyzes the impedance values of the test strips, wherein the impedance characteristic typing is mainly performed to obtain the impedance analysis results.
Therefore, compared with the existing manual impedance measurement of test strips, the test strip impedance measurement system of the embodiment can realize the impedance measurement and analysis of a plurality of test strips, not only solves the problem of low impedance measurement efficiency in the manual mode, but also avoids the error risk in the manual mode, and solves the problem of test strip waste caused by the fact that the characteristic analysis of test strip impedance cannot be rapidly completed when a batch of test strips are produced.
In the embodiment shown in fig. 1, the impedance measurement system of the test strip is constructed to perform impedance measurement and analysis on a plurality of test strips, and how to perform impedance measurement is not specifically described, and is described in detail by the embodiment below.
The first mode is a scanning mode from the 1 st column to the M/N column;
alternatively, in some embodiments of the invention, the test strip impedance is measured by scanning from column 1 to column M/N,
the microprocessor controls the Xth relay controller to conduct all the double-channel relays in the Xth row so that the test strips in the Xth row are accessed, the acquisition subsystem carries out impedance measurement on the test strips in the Xth row through N measurement channels to obtain measurement data of the test strips in the Xth row, and X is a positive integer not less than 1 and less than M/N;
the microprocessor controls the Xth relay controller to close all the double-channel relays in the Xth row, controls the X +1 th relay controller to conduct all the double-channel relays in the X +1 th row, enables the test strips in the X +1 th row to be connected, and the acquisition subsystem carries out impedance measurement on the test strips in the X +1 th row through the N measurement channels to obtain measurement data of the test strips in the X +1 th row.
In the embodiment of the present invention, as shown in fig. 2, which is an example of this embodiment, wherein the relay matrix is 8 rows and 50 columns, when scanning, scanning is performed from the 1 st column to perform test strip impedance measurement, until the 50 th column, the specific implementation process is:
the microprocessor controls the 1 st relay controller to conduct all the dual-channel relays in the 1 st column, so that the test strip in the 1 st column is accessed, the acquisition subsystem performs impedance measurement on the test strip in the 1 st column through 8 measurement channels to obtain measurement data of the test strip in the 1 st column, and the impedance measurement of the test strip in the 1 st column is completed; next, microprocessor control 1 st relay controller makes all double-channel relays of 1 st row close, be about to the examination strip of 1 st row all break off, and then control 2 nd relay controller makes all double-channel relays of 2 nd row switch on, and the examination strip of 2 nd row inserts, and the collection subsystem carries out impedance measurement to the examination strip of 2 nd row through 8 measuring channels, obtains the measured data of the examination strip of 2 nd row, carries out in proper order up to 50 th row to the measurement scanning of examination strip impedance has been realized. And the rapid measurement of the impedance values of a large number of test strips is realized.
And (II) measuring the impedance of the target test strip.
Optionally, in some embodiments of the present invention, the impedance of the test strip is measured by measuring a target test strip, where the target test strip corresponds to the dual-channel relays in the x-th row and the y-th column, x is a positive integer not less than 1 and not more than N, y is a positive integer not less than 1 and not more than M/N,
the microprocessor controls the relay controller in the y column to conduct the dual-channel relay in the x row in the y column, so that the target test strip is connected, and the acquisition subsystem performs impedance measurement on the target test strip through the measurement channel in the x row to obtain measurement data of the target test strip.
The embodiment of the utility model provides an in, what hypothesis target examination strip corresponded is the binary channels relay of 1 st line, and the relay controller of microprocessor control 1 st line switches on the binary channels relay of 1 st line in the 1 st line so, and target examination strip inserts, and the acquisition subsystem carries out impedance measurement to target examination strip through 1 st measuring channel, obtains target examination strip's measured data. It should be noted that the target test strip may be one or more, and the impedance measurement of a single or multiple target test strips can be realized only by determining the number of rows and the number of columns where the dual-channel relay corresponding to the target test strip is located.
Optionally, in some embodiments of the present invention, before the microprocessor controls the relay controller to turn on the corresponding dual-channel relay, the microprocessor determines whether a pulse signal is received, where the pulse signal is generated when the test strip is inserted;
if the pulse signal is received, the microprocessor determines that the test strip is ready;
if no pulse signal is received, the microprocessor determines that the strip is not ready.
In the embodiment of the utility model, before microprocessor control relay controller makes corresponding binary channels relay switch on, still need to detect the examination strip earlier whether ready, specifically, produce a pulse signal of 20ms when the examination strip is inserted, microprocessor will receive pulse signal as the condition of judging whether ready of examination strip, if receive pulse signal, then confirm the examination strip ready; if no pulse signal is received, the test strip is determined to be not ready.
Optionally, as shown in fig. 3, in some embodiments of the present invention, the acquisition subsystem 11 is a multimeter, the multimeter includes a multimeter communication module 111 and a measurement module 112, the multimeter communication module 111 establishes a communication connection with the microprocessor 121, and the measurement module 112 has N measurement channels;
the measurement module 112 is configured to implement test strip impedance measurement through the N measurement channels and obtain measurement data;
and a multimeter communication module 111 for sending the measurement data to the microprocessor 121.
Optionally, in some embodiments of the present invention, the multimeter is in a 4-wire impedance measurement mode, and the measurement module includes:
4N measurement pins and 2 switch pins, 4 every in 4N measurement pins constitute a measurement channel.
Optionally, as shown in fig. 3, in some embodiments of the present invention, the control subsystem 12 further includes:
the multimeter communication interface 123 is connected with the multimeter communication module 111 and the microprocessor 121;
the analysis subsystem communication interface 125 is connected with the analysis subsystem 13 and the microprocessor 121;
the measurement interface 126 is connected with the measurement module 112 through a 4N +2 color flat cable;
the battery interface 127 is connected to the microprocessor 121 and each relay controller 123.
In the embodiment of the present invention, as shown in fig. 3, the above embodiment is described in detail, the collection subsystem 11 specifically may be a multimeter, which has a multimeter communication module 111 and a measurement module 112, wherein, the multimeter communication module 111 is connected with the measurement module 112, the multimeter adopts a 4-wire impedance measurement mode, because the impedance value of the test strip is generally small, in order to make the impedance measurement more accurate, the 4-wire impedance measurement mode needs to be adopted to eliminate the influence of measuring wires and the like, then the measurement module 112 needs to adopt 4N measurement pins and 2 switch pins, if taking 8 measurement channels as an example, then 34 measurement pins are needed, and through 34 color cables, the measurement module 112 is connected with the measurement interface 126;
the microprocessor 121 is connected with the multimeter communication module 111 through the multimeter communication interface 123, the microprocessor 121 is connected with the analysis subsystem through the analysis subsystem communication interface 125, and because mutual communication is needed, when in serial communication, both communication parties are required to adopt a standard interface, so that different devices can be conveniently connected for communication. One of the most common serial communication interfaces is RS232, so that the RS232 interface can be used for the multimeter communication interface 123, the analysis subsystem communication interface 125, and the measurement interface 126. The battery interface 127 is connected to the microprocessor 121 and each relay controller 123 for power supply.
In addition, the control subsystem may include a USB interface through which a user may obtain information from the microprocessor or may send information to the microprocessor.
In conjunction with the above embodiment shown in fig. 3, optionally, in some embodiments of the invention, the microprocessor includes:
the system comprises a universal meter communication unit, an analysis subsystem communication unit, a data processing unit and a control unit;
the universal meter communication unit is used for establishing communication connection with the universal meter through a universal meter communication interface and receiving measurement data of the test strips sent by the universal meter;
the data processing unit is used for processing the measured data to obtain the impedance value of the test strip;
the analysis subsystem communication unit is used for establishing communication connection with the analysis subsystem through the analysis subsystem communication interface and sending the impedance value of the test strip to the analysis subsystem;
and the control unit is used for controlling the relay controller to enable the corresponding double-channel relay to be switched on or switched off.
In the embodiment of the utility model, the structure of the microprocessor is subdivided, and the microprocessor comprises a universal meter communication unit, an analysis subsystem communication unit, a data processing unit and a control unit, wherein the universal meter communication unit is used for communicating with a universal meter and receiving measurement data; the data processing unit is used for processing the measured data to obtain the impedance value of the test strip; the analysis subsystem communication unit is used for communicating with the analysis subsystem and sending the impedance value of the test strip to the analysis subsystem; the control unit controls the on or off of the relay controller.
Optionally, in some embodiments of the present invention, the control subsystem further includes:
the horn socket comprises U pins, V pins and V pins, wherein the U is a positive integer which is a multiple of 2, and the V is a positive integer which is more than N and not less than 2M/U;
the test strip needle bed board is connected with the ox horn socket, and the pin quantity of test strip needle bed board is greater than 2M.
The embodiment of the utility model provides an in, combine as shown in fig. 4, control subsystem still includes the ox horn socket, and the number of ox horn socket must be greater than N, if the pin of ox horn socket is U, the examination strip that so can match has U2, and the quantity of binary channels relay is M, so just need guarantee that the number V of ox horn socket is not less than 2M U. Assuming that the pins of the ox horn socket are 64, 32 test strips can be matched, the number M of the double-channel relays is 400, the number N of the measuring channels is 8, the number of the ox horn sockets is not less than 12.5, and 16 ox horn sockets are selected in consideration of the adaptive relay matrix. In practical application, the number of the pins of the ox horn socket is not limited.
The examination strip needle bed board is connected with the ox horn socket, and the pin quantity of examination strip needle bed board is greater than 2M to make things convenient for the inserting of examination strip, and through the change of examination strip needle bed board, the mill just can be with the project use that different examination strips were switched to in a flexible way to the test system.
Optionally, in some embodiments of the invention, the analysis subsystem comprises: an analysis module;
the analysis module is used for analyzing the impedance value of the test strip according to the preset impedance upper limit value and impedance lower limit value to obtain an impedance analysis result;
the analysis subsystem further comprises: a display module;
and the display module is used for presenting the impedance analysis result to a user, and specially marking the impedance value of the test strip when the impedance value of the test strip is not in the areas of the upper impedance value and the lower impedance value.
In the embodiment of the present invention, the analysis subsystem includes an analysis module, and further includes a display module, specifically, a Personal Computer (PC), which needs to have both analysis processing function and display function, the analysis module analyzes the impedance value of the test strip according to the preset impedance upper limit value and impedance lower limit value, to obtain the impedance analysis result, if the scan is column by column, the analysis module can calculate the impedance average value, the impedance maximum value, and the impedance minimum value of the whole row or the whole column of test strip, and dynamically draw the transformation line graph showing the impedance in real time, the final data can be stored in the form of the table-added line graph, and the impedance analysis result is shown to the user through the display module, specifically, the curve display is performed, when the impedance value of the test strip is not in the region of the impedance upper limit value and the impedance lower limit value, the impedance value of the test strip is marked specifically, and the special mark can be displayed in different colors. It should be noted that the presentation manner may be presented by other manners, such as a table, in addition to the curve presentation. The special mark may be in other ways than by a different color, such as font size, etc.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A test strip impedance measurement system, comprising:
the system comprises an acquisition subsystem, a control subsystem and an analysis subsystem;
the acquisition subsystem is provided with N measurement channels, wherein N is a positive integer not less than 1;
the control subsystem comprises a microprocessor, M double-channel relays and M/N relay controllers, wherein the M double-channel relays form a relay matrix with N rows and M/N columns, M is a positive integer larger than 1, and M/N is a positive integer;
the N measuring channels are respectively connected with all double-channel relays of N rows of the relay matrix, the M/N relay controllers are respectively connected with all double-channel relays of M/N columns of the relay matrix, and the M/N relay controllers are respectively connected with the microprocessor;
the microprocessor is used for controlling the relay controller to enable the corresponding double-channel relay to be switched on or switched off, the double-channel relay is connected with the test strip when being switched on, and the double-channel relay is disconnected with the test strip when being switched off;
the acquisition subsystem is used for carrying out impedance measurement on the connected test strips through the N measurement channels to obtain measurement data;
the microprocessor is also used for processing the measurement data to obtain the impedance value of the test strip;
and the analysis subsystem is used for analyzing the impedance value of the test strip to obtain an impedance analysis result.
2. The test strip impedance measurement system of claim 1, wherein the test strip impedance is measured by scanning from column 1 to column M/N,
the microprocessor controls the Xth relay controller to conduct all the double-channel relays in the Xth row so that the test strip in the Xth row is accessed, the acquisition subsystem carries out impedance measurement on the test strip in the Xth row through the N measurement channels to obtain measurement data of the test strip in the Xth row, and X is a positive integer not less than 1 and less than M/N;
the microprocessor controls the Xth relay controller to close all the double-channel relays in the Xth row, controls the X +1 th relay controller to conduct all the double-channel relays in the X +1 th row, enables the test strips in the X +1 th row to be connected, and the acquisition subsystem carries out impedance measurement on the test strips in the X +1 th row through the N measurement channels to obtain measurement data of the test strips in the X +1 th row.
3. The test strip impedance measurement system of claim 1, wherein the test strip impedance is measured by measuring a target test strip corresponding to the dual-channel relays of the x-th row and the y-th column, wherein x is a positive integer not less than 1 and not more than N, and y is a positive integer not less than 1 and not more than M/N,
the microprocessor controls the relay controller in the y column to conduct the dual-channel relay in the x row in the y column, so that the target test strip is connected, and the acquisition subsystem performs impedance measurement on the target test strip through the measurement channel in the x row to obtain measurement data of the target test strip.
4. The test strip impedance measurement system of claim 2 or 3,
before the microprocessor controls the relay controller to enable the corresponding double-channel relay to be conducted, the microprocessor is also used for judging whether the test strip is ready or not by judging whether a pulse signal is received or not, and if the pulse signal is received, the test strip is ready; if the pulse signal is not received, indicating that the test strip is not ready, the pulse signal is generated when the test strip is inserted.
5. The strip impedance measurement system of any one of claims 1-3, wherein the acquisition subsystem is a multimeter, the multimeter comprising a multimeter communication module and a measurement module, the multimeter communication module establishing a communication connection with the microprocessor, the measurement module having N measurement channels;
the measuring module is used for measuring the impedance of the test strip through the N measuring channels and acquiring measuring data;
and the multimeter communication module is used for sending the measurement data to the microprocessor.
6. The test strip impedance measurement system of claim 5, wherein the multimeter is in a 4-wire impedance measurement mode, the measurement module comprising:
4N measurement pins and 2 switch pins, every 4 in 4N measurement pins constitute a measurement channel.
7. The test strip impedance measurement system of claim 6, wherein the control subsystem further comprises:
the system comprises a universal meter communication interface, an analysis subsystem communication interface, a measurement interface and a battery interface;
the universal meter communication interface is connected with the universal meter communication module and the microprocessor;
the analysis subsystem communication interface is connected with the analysis subsystem and the microprocessor;
the measuring interface is connected with the measuring module through a 4N +2 color flat cable;
the battery interface is connected with the microprocessor and each relay controller.
8. The test strip impedance measurement system of claim 7, wherein the microprocessor comprises:
the system comprises a universal meter communication unit, an analysis subsystem communication unit, a data processing unit and a control unit;
the multimeter communication unit is used for establishing communication connection with the multimeter through the multimeter communication interface and receiving the measurement data of the test strip sent by the multimeter;
the data processing unit is used for processing the measurement data to obtain the impedance value of the test strip;
the analysis subsystem communication unit is used for establishing communication connection with the analysis subsystem through an analysis subsystem communication interface and sending the impedance value of the test strip to the analysis subsystem;
and the control unit is used for controlling the relay controller to enable the corresponding double-channel relay to be switched on or switched off.
9. The test strip impedance measurement system of claim 8, wherein the control subsystem further comprises:
the horn socket comprises U pins, V pins and V pins, wherein the U pins are positive integers of multiples of 2, and the V pins are positive integers which are more than N and not less than 2M/U;
the test strip needle bed board is connected with the ox horn socket, and the pin quantity of test strip needle bed board is greater than 2M.
10. The test strip impedance measurement system of claim 9, wherein the analytical subsystem comprises: an analysis module;
the analysis module is used for analyzing the impedance value of the test strip according to a preset impedance upper limit value and a preset impedance lower limit value to obtain an impedance analysis result;
the analysis subsystem further comprises: a display module;
and the display module is used for presenting the impedance analysis result to a user, and specially marking the impedance value of the test strip when the impedance value of the test strip is not in the areas of the upper impedance value and the lower impedance value.
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