CN212084977U - Device group fixed in parallel connection - Google Patents
Device group fixed in parallel connection Download PDFInfo
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- CN212084977U CN212084977U CN202020822407.3U CN202020822407U CN212084977U CN 212084977 U CN212084977 U CN 212084977U CN 202020822407 U CN202020822407 U CN 202020822407U CN 212084977 U CN212084977 U CN 212084977U
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- connecting block
- lateral fixing
- fixed
- block body
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Abstract
The utility model discloses a fixed device group of parallel connection, it includes: at least two semiconductor devices having electrical connections; the fixed connecting block comprises a connecting block body and a plurality of lateral fixing parts, the lateral fixing parts are connected to the connecting block body at intervals, adjacent lateral fixing parts and the connecting block body are connected in an enclosing mode to form a fixing space, and the lateral fixing parts are used for keeping the semiconductor device in the fixing space; the electric connection part is exposed out of the external space relative to the fixed connecting block and is used for being electrically connected with an external circuit carrier. The utility model discloses a fixed device group of parallel connection adopts fixed connection piece to splice two at least semiconductor devices fixedly, and when this device group used, can realize carrying out PCB upper plate once with a plurality of semiconductor devices, can improve upper plate installation effectiveness.
Description
Technical Field
The utility model relates to a semiconductor package product technical field especially relates to a fixed device group of parallel connection.
Background
In the manufacture of power semiconductor packaging products, there is a need to use multiple semiconductor devices simultaneously to achieve a given function, and in the prior art, multiple semiconductor devices are generally mounted in parallel by individually mounting multiple semiconductor devices on a PCB in sequence. However, this results in low device board (PCB) efficiency.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides an aim at: a device group fixed in parallel is provided, which can realize the one-time PCB mounting of a plurality of semiconductor devices and can improve the mounting efficiency.
In order to achieve the purpose, the utility model adopts the following technical proposal:
a set of devices secured in parallel comprising:
at least two semiconductor devices having electrical connections;
the fixed connecting block comprises a connecting block body and a plurality of lateral fixing parts, the lateral fixing parts are connected to the connecting block body at intervals, adjacent lateral fixing parts and the connecting block body are connected in an enclosing mode to form a fixing space, and the lateral fixing parts are used for keeping the semiconductor device in the fixing space; the electric connection part is exposed out of the external space relative to the fixed connecting block and is used for being electrically connected with an external circuit carrier.
Preferably, the fixed connecting block is an insulating connecting block.
Preferably, the lateral fixing portion is an elastic clamping portion.
Preferably, each fixing space is formed by two adjacent lateral clamping parts and the connecting block body in an enclosing mode.
Preferably, the connecting block body is an elastic connecting block body.
Preferably, the lateral clamp is a modified polyethylene clamp.
Preferably, the semiconductor device includes a device body and a pin, the pin being the electrical connection portion; the pins extend out of the horizontal upward side wall of the device body; the lateral fixing portions abut against the horizontal upward side wall of the device body and hold the device body in the fixing space by the adjacent lateral fixing portions.
Preferably, the semiconductor device is a chip packaging structure, the chip packaging structure comprises a packaging body, and a chip and a lead frame which are packaged and wrapped in the packaging body; the lead frame comprises a frame body and the pins which are electrically connected with each other; the chip is electrically connected with the pins through metal wires; the pins extend out of the upward horizontal side wall of the packaging body; when the chip packaging structure is arranged on the fixed connecting block, the lateral fixing part is abutted to the packaging body.
Preferably, the lateral fixing part is clamped with the connecting block body through a clamping component.
Preferably, the clamping assembly comprises a first clamping part and a second clamping part; the connecting block body is provided with a plurality of first clamping parts at intervals along the length direction, and the lateral fixing part is provided with a second clamping part; the distance between the adjacent lateral fixing parts is adjustable.
The utility model has the advantages that: this device group that parallel connection is fixed adopts fixed connection piece to splice two at least semiconductor devices fixedly, and when this device group was used, can realize carrying out PCB upper plate once with a plurality of semiconductor devices, can improve upper plate installation effectiveness.
Drawings
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Fig. 1 is a schematic cross-sectional structure diagram of a device group connected and fixed in parallel according to an embodiment of the present invention;
fig. 2 is a schematic view of a sectional structure of the fixed connection block according to an embodiment of the present invention.
In the figure: 10. a semiconductor device; 11. a package body; 12. a chip; 13. a lead frame; 131. a pin; 14. welding the layers; 15. a metal wire; 20. fixing a connecting block; 21. a connecting block body; 22. a lateral fixing part; 23. and fixing the space.
Detailed Description
In order to make the technical problems, technical solutions and technical effects achieved by the present invention more clear, the embodiments of the present invention will be described in further detail with reference to the accompanying drawings, and obviously, the described embodiments are only some embodiments, not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.
In the description of the present invention, unless otherwise explicitly specified or limited, the terms "connected" and "fixed" are to be understood broadly, e.g. as a fixed connection, a detachable connection or an integral part; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the present disclosure, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact between the first and second features, or may comprise contact between the first and second features not directly. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The utility model provides a parallelly connected fixed device group, it adopts fixed connection piece 20 to splice two at least semiconductor device 10 fixedly, and when this device group was used, can realize the PCB upper plate of a plurality of semiconductor device 10, also, during the upper plate installation, need not to install a plurality of semiconductor device 10 in proper order in the PCB board, can improve upper plate installation effectiveness.
It is to be noted that "a plurality" is defined herein as two or more than two.
As shown in fig. 1 and fig. 2, in an embodiment of the device group fixed in parallel according to the present invention, the device group fixed in parallel includes:
at least two semiconductor devices 10, said semiconductor devices 10 having electrical connections;
the fixed connecting block 20 comprises a connecting block body 21 and a plurality of lateral fixing parts 22, the lateral fixing parts 22 are connected to the connecting block body 21 at intervals, adjacent lateral fixing parts 22 and the connecting block body 21 are connected in an enclosing mode to form a fixing space 23, the fixing space 23 is used for containing the semiconductor device 10, and the lateral fixing parts 22 are used for keeping the semiconductor device 10 in the fixing space 23; the electrical connection portion is exposed to an external space of the device group with respect to the fixed connection block 20, and is used for electrical connection with an external circuit carrier.
Specifically, the semiconductor device 10 is detachably mounted in the fixing space 23.
Specifically, the lateral fixing portion 22 is integrally formed with the connecting block body 21 or the lateral fixing portion 22 is detachably mounted to the connecting block body 21.
A plurality of semiconductor devices 10 to be mounted on the PCB are fixed on the device group which is fixed in parallel, and when the device group is applied, the device group is directly mounted on the PCB once, so that the purpose of mounting the plurality of semiconductor devices 10 on the PCB once can be realized; that is, when a plurality of semiconductor devices 10 need to be mounted on a PCB, the plurality of semiconductor devices 10 need not be mounted on the PCB one by one, and the mounting efficiency on the PCB can be improved.
Further, as shown in fig. 1 and fig. 2, in another embodiment of the device group connected and fixed in parallel according to the present invention, in order to make the upper board mounting operation of the device group safe and reliable, the fixed connection block 20 is an insulating connection block; that is, the fixed connection block 20 is made of an insulating material.
Further, in order to facilitate the splicing and fixing of the plurality of semiconductor devices 10, when the semiconductor devices 10 are fixedly mounted on the fixed connection block 20, the portion of the lateral fixing portion 22 contacting the semiconductor devices 10 is an elastic portion.
Further, in the present embodiment, in order to facilitate the manufacture of the fixed connection block 20, the whole lateral fixing portion 22 is elastic, and the lateral fixing portion 22 is an elastic clamping portion; the semiconductor device 10 is held in the fixing space 23 by the elastic force of the elastic clamping portion.
Specifically, at least one of the adjacent lateral fixing portions 22 is the elastic clamping portion. In the present embodiment, all the lateral fixing portions 22 are elastic clamping portions, that is, the semiconductor device 10 is retained in the fixing space 23 by an elastic member through the cooperation of the adjacent elastic clamping portions.
Further, each fixing space 23 is formed by two adjacent lateral clamping parts and the connecting block body 21 in an enclosing manner; that is, each of the semiconductor devices 10 is sandwiched by the two lateral sandwiching portions in the fixing space 23; by the arrangement, the structure of the device group is simpler.
Further, in order to facilitate the manufacture of the fixed connecting block 20, the material of the connecting block body 21 is the same as that of the lateral fixing portion 22, and the connecting block body 21 is an elastic connecting block body 21.
Further, the lateral clamping portion is a modified polyethylene clamping portion, that is, the lateral clamping portion is made of modified polyethylene with insulating property.
Further, as shown in fig. 1 and fig. 2, in another embodiment of the device group fixed in parallel according to the present invention, the semiconductor device 10 includes a device body and a pin 131, and the pin 131 is the electrical connection portion; the pins 131 extend from the upward side wall of the device body; the lateral fixing portions 22 abut against the horizontal upward side wall of the device body and hold the device body in the fixing space 23 by the adjacent lateral fixing portions 22; with this arrangement, it is possible to keep the bottom surface of the semiconductor device 10 in the thickness direction to be able to fit with the PCB board.
Further, the semiconductor device 10 is a chip 12 package structure, and the chip 12 package structure includes a package body 11, a chip 12 and a lead frame 13, which are encapsulated in the package body 11; the lead frame 13 includes a frame body and the lead 131 electrically connected to each other; the chip 12 is electrically connected with the pins 131 through metal wires 15; the pins 131 extend from the upward horizontal side wall of the package body 11; when the chip 12 package structure is mounted on the fixed connection block 20, the lateral fixing portion 22 abuts against the package body 11.
It is understood that the chip 12 package structure may be, but is not limited to, a chip 12 package structure packaged in a DIP package form or an SOP package form.
Specifically, the chip 12 and the lead frame 13 are bonded by a solder layer 14, and the solder layer 14 is formed of solder.
Further, the lateral fixing portion 22 for abutting against the side wall of the chip 12 package structure having the pin 131 is designed to avoid the influence of the relatively protruded pin 131, so as to ensure that the lateral fixing portion 22 effectively abuts against the side wall of the chip 12 package structure, thereby stably fixing the semiconductor device 10 in the fixing space 23.
Further, in order to facilitate the adjustment between the adjacent intervals of the semiconductor devices 10, the lateral fixing portions 22 and the connecting block body 21 are detachably connected, and the interval between the adjacent lateral fixing portions 22 is adjustable, so as to meet the requirements of the arrangement of the semiconductor devices 10.
Specifically, the lateral fixing portion 22 is clamped to the connecting block body 21 through a clamping assembly, and the clamping assembly includes a first clamping portion and a second clamping portion; the connecting block body 21 is provided with a plurality of first clamping parts at intervals along the length direction, and the lateral fixing part 22 is provided with a second clamping part; the distance between adjacent lateral fixing parts 22 is adjustable.
Specifically, the first clamping portion and/or the second clamping portion are elastic clamping portions so as to facilitate the insertion of the lateral fixing portion 22 into the connecting block body 21. The first engaging portion may be, but not limited to, an engaging hole, and the second engaging portion may be, but not limited to, an elastic engaging ball.
It should be noted that, the arrangement rule of the first clamping portions arranged on the connecting block body 21 can be adjusted by those skilled in the art according to actual requirements, which is not described herein.
In the description herein, it is to be understood that the terms "upper", "lower", "left", "right", and the like are used in a descriptive sense and with reference to the illustrated orientation or positional relationship, and are used for convenience in description and simplicity in operation, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used merely for descriptive purposes and are not intended to have any special meaning.
In the description herein, references to the description of "an embodiment," "an example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be appropriately combined to form other embodiments as will be appreciated by those skilled in the art.
The technical principle of the present invention is described above with reference to specific embodiments. The description is made for the purpose of illustrating the principles of the invention and should not be construed in any way as limiting the scope of the invention. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without any inventive effort, which would fall within the scope of the present invention.
Claims (10)
1. A set of devices secured in parallel, comprising:
at least two semiconductor devices (10), the semiconductor devices (10) having electrical connections;
the fixed connecting block (20) comprises a connecting block body (21) and a plurality of lateral fixing parts (22), the lateral fixing parts (22) are connected to the connecting block body (21) at intervals, adjacent lateral fixing parts (22) and the connecting block body (21) are connected in a surrounding mode to form a fixing space (23), and the lateral fixing parts (22) are used for keeping the semiconductor device (10) in the fixing space (23); the electric connection part is exposed to the external space relative to the fixed connecting block (20) and is used for being electrically connected with an external circuit carrier.
2. Group according to claim 1, characterised in that the fixed connection block (20) is an insulating connection block.
3. Set according to claim 2, characterised in that the lateral fixing portion (22) is an elastic lateral clamping portion.
4. Group according to claim 3, characterized in that each fixing space (23) is defined by two adjacent lateral pinches and the connecting block body (21).
5. Group according to claim 3, characterised in that the connector block body (21) is an elastic connector block body (21).
6. A set according to claim 3 and wherein the lateral clamp is a modified polyethylene clamp.
7. Group of devices connected in parallel and fixed according to any of claims 1 to 6, characterized in that the semiconductor device (10) comprises a device body and a pin (131), the pin (131) being the electrical connection; the pins (131) extend out of the horizontal upward side wall of the device body; the lateral fixing portions (22) abut against the horizontal upward side wall of the device body and hold the device body in the fixing space (23) by the adjacent lateral fixing portions (22).
8. The parallel fixed device group according to claim 7, wherein the semiconductor device (10) is a chip (12) package structure, the chip (12) package structure comprises a package body (11), and further comprises a chip (12) and a lead frame (13) encapsulated in the package body (11); the lead frame (13) comprises a frame body and the pins (131) which are electrically connected with each other; the chip (12) is electrically connected with the pins (131) through metal wires (15); the pins (131) extend out of the horizontal upward side wall of the packaging body (11); when the chip (12) packaging structure is arranged on the fixed connecting block (20), the lateral fixing part (22) is abutted to the packaging body (11).
9. Group of devices connected and fixed according to any one of claims 1 to 6, characterized in that the lateral fixing portion (22) is clamped to the connecting block body (21) by means of a clamping assembly.
10. The device group connected and fixed according to claim 9, wherein the clip assembly comprises a first clip portion and a second clip portion; the connecting block body (21) is provided with a plurality of first clamping parts at intervals along the length direction, and the lateral fixing part (22) is provided with a second clamping part; the distance between the adjacent lateral fixing parts (22) is adjustable.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020822407.3U CN212084977U (en) | 2020-05-15 | 2020-05-15 | Device group fixed in parallel connection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020822407.3U CN212084977U (en) | 2020-05-15 | 2020-05-15 | Device group fixed in parallel connection |
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| Publication Number | Publication Date |
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| CN212084977U true CN212084977U (en) | 2020-12-04 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202020822407.3U Active CN212084977U (en) | 2020-05-15 | 2020-05-15 | Device group fixed in parallel connection |
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| CN (1) | CN212084977U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022228072A1 (en) * | 2021-04-26 | 2022-11-03 | 华为技术有限公司 | Circuit board assembly and manufacturing method therefor, terminal, and electronic device |
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2020
- 2020-05-15 CN CN202020822407.3U patent/CN212084977U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022228072A1 (en) * | 2021-04-26 | 2022-11-03 | 华为技术有限公司 | Circuit board assembly and manufacturing method therefor, terminal, and electronic device |
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