CN212033764U - Tamper-resistant protection circuit - Google Patents
Tamper-resistant protection circuit Download PDFInfo
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- CN212033764U CN212033764U CN202020718115.5U CN202020718115U CN212033764U CN 212033764 U CN212033764 U CN 212033764U CN 202020718115 U CN202020718115 U CN 202020718115U CN 212033764 U CN212033764 U CN 212033764U
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- 230000008054 signal transmission Effects 0.000 claims abstract description 35
- 239000003990 capacitor Substances 0.000 claims description 10
- 238000007599 discharging Methods 0.000 claims description 6
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
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Abstract
The utility model relates to a tamper-proof protection circuit, through triggering port linked switch with the switch, signal output port connects digital film server, and the transmission that the signal transmission port is used for falsifying signal data is falsified to the falsifying, and the signal is falsifying to transmit signal output port through falsifying signal transmission port. When the switch at the switch trigger port is closed, the first MOS tube is cut off, the second MOS tube is conducted, the third MOS tube is cut off, and at the moment, the signal output port is in a high-impedance state, namely, the normally closed port of the digital cinema server is driven to be in an open state, and the digital cinema server stops working; when the switch at the switch trigger port is disconnected, the first MOS tube is conducted, the second MOS tube is cut off, the third MOS tube is conducted, the signal output port is in a conducting state at the moment, namely, the normally closed port of the digital cinema server is driven to be in a closed state, and the digital cinema server normally works.
Description
Technical Field
The utility model belongs to the technical field of the LED display screen, especially, relate to tamper-resistant protection circuit.
Background
At present, an LED display screen only has a simple box door detection system to monitor the closed state of a box door, so that data is protected from being tampered, the state of the box door cannot be continuously monitored after power failure, digital copyright cannot be continuously and effectively protected, and the requirement of an information processing standard cannot be met.
Therefore, the LED display screen needs to be designed with a special anti-tampering protection circuit, and under the power-off state of the LED display screen, the information safety can be continuously protected, the digital copyright is maintained, and the information processing standard requirement is met.
SUMMERY OF THE UTILITY MODEL
Based on the technical problem, the utility model provides a last incessant protection circuit of preventing falsifying.
The utility model discloses a first aspect discloses a tamper-proof protection circuit, trigger port, tampering signal transmission port, power supply unit, first MOS pipe, second MOS pipe, third MOS pipe and signal output port including the switch, the first input of first MOS pipe with switch trigger port parallel electricity connect in power supply unit's first output, the second input of first MOS pipe with the first input parallel electricity of second MOS pipe connect in power supply unit's second output, the second input of second MOS pipe with the first input parallel electricity of third MOS pipe connect in power supply unit's third output, the second input of third MOS pipe with the one end parallel electricity of signal output port connect in power supply unit's fourth output, the output of first MOS pipe, The output end of the second MOS tube, the output end of the third MOS tube and the other end of the signal output port are electrically connected to a grounding end in parallel, and the tampering signal transmission port is electrically connected with the first input end of the first MOS tube, the input end of the second MOS tube or the input end of the third MOS tube.
Preferably, first resistors are arranged between the first input end and the output end of the first MOS transistor, between the first input end and the output end of the second MOS transistor and between the first input end and the output end of the third MOS transistor, and the output end of the first MOS transistor, the output end of the second MOS transistor and the output end of the third MOS transistor are all grounded.
Preferably, the tamper signal transmission port includes a first signal transmission port and a second signal transmission port.
Preferably, the first signal transmission port is electrically connected to the first input end of the first MOS transistor and the first input end of the second MOS transistor, and the second signal transmission port is electrically connected to the first input end of the third MOS transistor.
Preferably, the first signal transmission port is electrically connected to the first input end of the first MOS transistor or the first input end of the second MOS transistor, respectively, and the second signal transmission port is electrically connected to the first input end of the third MOS transistor.
Preferably, the power supply unit includes a diode and a charge-discharge capacitor, voltage is input to an input end of the diode, an output end of the diode is electrically connected with one end of the charge-discharge capacitor and outputs power supply voltage, and the other end of the charge-discharge capacitor is grounded.
From the foregoing the embodiment of the utility model provides a can know, the utility model discloses a trigger port linked switch with the switch, signal output port connects the digital cinema server, tampers the transmission that signal transmission port is used for tampering signal data, tampers the signal and transmits signal output port through tampering signal transmission port. When the switch at the switch trigger port is closed, the first MOS tube is cut off, the second MOS tube is conducted, the third MOS tube is cut off, and at the moment, the signal output port is in a high-impedance state, namely, the normally closed port of the digital cinema server is driven to be in an open state, and the digital cinema server stops working; when the switch at the switch trigger port is disconnected, the first MOS tube is conducted, the second MOS tube is cut off, the third MOS tube is conducted, the signal output port is in a conducting state at the moment, namely, the normally closed port of the digital cinema server is driven to be in a closed state, and the digital cinema server normally works.
Drawings
In order to illustrate the embodiments of the present invention or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a schematic diagram of a tamper protection circuit according to a first embodiment of the present invention;
fig. 2 is a schematic diagram of a tamper protection circuit according to a second embodiment of the present invention;
fig. 3 is a schematic diagram of a tamper protection circuit according to a third embodiment of the present invention;
fig. 4 is a schematic diagram of the power supply unit of the present invention.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the drawings in the embodiments of the present invention are combined to clearly and completely describe the technical solutions in the embodiments of the present invention, and obviously, the described embodiments are only some embodiments, not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by the skilled in the art without creative work belong to the protection scope of the present invention.
The utility model discloses a trigger port linked switch with the switch, signal output port connects the digital film server, tampers the transmission that signal transmission port is used for tampering signal data, tampers the signal and transmits signal output port through tampering signal transmission port. The first MOS transistor Q1, the second MOS transistor Q2 and the third MOS transistor Q3 in this scheme are all MOS transistors with N channels, specifically, the first input end is a gate, the second input end is a drain, and the output end is a source.
First embodiment
Referring to fig. 1, the present invention discloses a tamper-proof protection circuit, which includes a switch trigger port (P1/P2), a tamper signal transmission port, a power supply unit, a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q3 and a signal output port P7, wherein a first input terminal of the first MOS transistor Q1 and one end of the switch trigger port P1/P2 are electrically connected in parallel to a first output terminal VCC _ T of the power supply unit, the other end of the switch trigger port P1/P2 is grounded, a second input terminal of the first MOS transistor Q1 and a first input terminal of the second MOS transistor Q2 are electrically connected in parallel to a second output terminal VCC _ T of the power supply unit, a second input terminal of the second MOS transistor Q2 and a first input terminal of the third MOS transistor Q3 are electrically connected in parallel to a third output terminal VCC _ T of the power supply unit, a second input terminal of the third MOS transistor Q3 and a fourth output terminal of the signal output port P7 are electrically connected in parallel to a VCC _ T of the power supply unit, the output end of the first MOS transistor Q1, the output end of the second MOS transistor Q2, the output end of the third MOS transistor Q3, and the other end of the signal output port P7 are electrically connected in parallel to a ground GND _ T, and the tamper signal transmission port is electrically connected to the first input end of the first MOS transistor Q1, the input end of the second MOS transistor Q2, or the input end of the third MOS transistor Q3. The first output terminal VCC _ T of the power supply unit, the second output terminal VCC _ T of the power supply unit, the third output terminal VCC _ T of the power supply unit and the fourth output terminal VCC _ T of the power supply unit are respectively connected to the resistor R1, the resistor R2, the resistor R3 and the resistor R4 and then connected to the circuit.
The utility model discloses a theory of operation does: when the switch at the switch trigger port is closed, the first MOS tube Q1 is cut off, the second MOS tube Q2 is conducted, the third MOS tube Q3 is cut off, and at the moment, the signal output port is in a high-impedance state, namely, the normally closed port of the digital cinema server is driven to be in an open state, and the digital cinema server stops working; when the switch at the switch trigger port is turned off, the first MOS transistor Q1 is turned on, the second MOS transistor Q2 is turned off, the third MOS transistor Q3 is turned on, and the signal output port is in a conducting state at this time, that is, the normally closed port of the digital cinema server is driven to be in a closed state, and the digital cinema server normally works.
In this embodiment, a resistor R6 is disposed between the first input end and the output end of the first MOS transistor Q1, a resistor R7 is disposed between the first input end and the output end of the second MOS transistor Q2, a resistor R8 is disposed between the first input end and the output end of the third MOS transistor Q3, resistances of R6, R7, and R8 are all about 10M Ω, and the output end of the first MOS transistor Q1, the output end of the second MOS transistor Q2, and the output end of the third MOS transistor Q3 are all grounded.
Referring to fig. 4, the power supply unit includes a diode D1 and charging and discharging capacitors C1 and C2, wherein C1 is connected in parallel with C2, the input terminal of the diode D1 inputs the voltage VCC, the output terminal of the diode D1 is electrically connected to one terminal of the charging and discharging capacitors C1/C2 and outputs the power supply voltage VCC _ T, and the other terminals of the charging and discharging capacitors C1 and C2 are grounded. When the cinema cuts off the power supply temporarily, the inside battery of digital cinema server can continue to maintain work for the server power supply, if this practical innovation is out of work data at this moment just can be followed the risk of being stolen in the LED box, so increased charge-discharge electric capacity in this practical innovation, can supply power when having a power failure, maintain circuit's normal operating. When the LED display screen is electrified, the capacitor can automatically store electricity again, and the safety of data in the whole LED display screen is protected uninterruptedly.
In the present embodiment, the tamper signal transmission ports include a first signal transmission port P3/P4 and a second signal transmission port P5/P6. The first signal transmission port P3/P4 is electrically connected to the first input terminal of the first MOS transistor Q1 through a resistor R5 and the first input terminal of the second MOS transistor Q2 through a resistor R11, respectively, and the second signal transmission port P5/P6 is electrically connected to the first input terminal of the third MOS transistor Q3 through a resistor R12.
Second embodiment
Referring to fig. 2, unlike the first embodiment, the resistor R11 is omitted, the first signal transmission port P3/P4 is electrically connected to the first input terminal of the first MOS transistor Q1, and the second signal transmission port P5/P6 is electrically connected to the first input terminal of the third MOS transistor Q3.
Third embodiment
Referring to fig. 3, unlike the first embodiment, the resistor R5 is omitted, the first signal transmission port P3/P4 is electrically connected to the first input terminal of the second MOS transistor Q2 only, and the second signal transmission port P5/P6 is electrically connected to the first input terminal of the third MOS transistor Q3.
The HUB board of every box all has one the utility model discloses innovation, mainly by two trigger points, four transmission points, a signal output point and charge-discharge capacitance constitute, wherein trigger point P1, P2 linked switch, trigger switch switches between disconnection and closed state when the box door is opened or is closed, send out the signal to P3, P4, again by P3, P4 transmission signal to P5, P6, the state change of triggering digital cinema server's Normally Closed (NC) port after P7 that has connected digital cinema server receives the signal. The digital film server can immediately interrupt or recover the output of the film signal source after receiving the signal, thereby playing the role of protecting the digital copyright. The utility model discloses an it is adjacent vertical and horizontal box respectively to connect in series P3\ P4, P5\ P6 the utility model discloses the innovation, when the work of whole screen, if individual box back lid is opened micro-gap switch and is triggered and will send the signal to adjacent box, the signal can be through the horizontal and vertical interface transmission between the box, finally transmits the digital cinema server, and the server receives the output that the same can interrupt the film signal source immediately after the signal.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
Above is the description to the technical scheme that the utility model provides, to technical personnel in the field, according to the utility model discloses the thought of embodiment all has the change part on concrete implementation and range of application, to sum up, this description content should not be understood as the restriction of the utility model.
Claims (6)
1. A tamper-proof protection circuit is characterized by comprising a switch trigger port, a tamper signal transmission port, a power supply unit, a first MOS (metal oxide semiconductor) tube, a second MOS tube, a third MOS tube and a signal output port, wherein a first input end of the first MOS tube and the switch trigger port are electrically connected to a first output end of the power supply unit in parallel, a second input end of the first MOS tube and a first input end of the second MOS tube are electrically connected to a second output end of the power supply unit in parallel, a second input end of the second MOS tube and a first input end of the third MOS tube are electrically connected to a third output end of the power supply unit in parallel, a second input end of the third MOS tube and one end of the signal output port are electrically connected to a fourth output end of the power supply unit in parallel, and an output end of the first MOS tube, an output end of the second MOS tube, a first output end of the power supply unit, a second output end of the second, The output end of the third MOS tube and the other end of the signal output port are electrically connected to a ground end in parallel, and the tampering signal transmission port is electrically connected to the first input end of the first MOS tube, the input end of the second MOS tube or the input end of the third MOS tube.
2. The tamper-proof protection circuit according to claim 1, wherein first resistors are disposed between the first input terminal and the output terminal of the first MOS transistor, between the first input terminal and the output terminal of the second MOS transistor, and between the first input terminal and the output terminal of the third MOS transistor, and the output terminal of the first MOS transistor, the output terminal of the second MOS transistor, and the output terminal of the third MOS transistor are all grounded.
3. The tamper-resistant protection circuit according to claim 1, wherein the tamper signal transmission port includes a first signal transmission port and a second signal transmission port.
4. The tamper-resistant protection circuit according to claim 3, wherein the first signal transmission port is electrically connected to the first input terminal of the first MOS transistor and the first input terminal of the second MOS transistor, respectively, and the second signal transmission port is electrically connected to the first input terminal of the third MOS transistor.
5. The tamper-resistant protection circuit according to claim 3, wherein the first signal transmission port is electrically connected to the first input terminal of the first MOS transistor or the first input terminal of the second MOS transistor, and the second signal transmission port is electrically connected to the first input terminal of the third MOS transistor.
6. The tamper-proof protection circuit according to claim 1, wherein the power supply unit includes a diode and a charging and discharging capacitor, a voltage is input to an input end of the diode, an output end of the diode is electrically connected to one end of the charging and discharging capacitor and outputs a power supply voltage, and the other end of the charging and discharging capacitor is grounded.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020718115.5U CN212033764U (en) | 2020-04-30 | 2020-04-30 | Tamper-resistant protection circuit |
| PCT/CN2021/083931 WO2021218534A1 (en) | 2020-04-30 | 2021-03-30 | Anti-tamper protection circuit |
| EP21797846.9A EP4145656A4 (en) | 2020-04-30 | 2021-03-30 | Anti-tamper protection circuit |
| US18/049,644 US11847255B2 (en) | 2020-04-30 | 2022-10-26 | Anti-tamper protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020718115.5U CN212033764U (en) | 2020-04-30 | 2020-04-30 | Tamper-resistant protection circuit |
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| Publication Number | Publication Date |
|---|---|
| CN212033764U true CN212033764U (en) | 2020-11-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020718115.5U Active CN212033764U (en) | 2020-04-30 | 2020-04-30 | Tamper-resistant protection circuit |
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| Country | Link |
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| CN (1) | CN212033764U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113205766A (en) * | 2021-04-01 | 2021-08-03 | 深圳市时代华影科技股份有限公司 | LED display screen, data display control method and screen system |
| WO2021218534A1 (en) * | 2020-04-30 | 2021-11-04 | 深圳市时代华影科技股份有限公司 | Anti-tamper protection circuit |
| WO2022206288A1 (en) * | 2021-04-01 | 2022-10-06 | 深圳市时代华影科技股份有限公司 | Anti-tamper circuit, led cabinet, and led display screen |
-
2020
- 2020-04-30 CN CN202020718115.5U patent/CN212033764U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021218534A1 (en) * | 2020-04-30 | 2021-11-04 | 深圳市时代华影科技股份有限公司 | Anti-tamper protection circuit |
| CN113205766A (en) * | 2021-04-01 | 2021-08-03 | 深圳市时代华影科技股份有限公司 | LED display screen, data display control method and screen system |
| WO2022206288A1 (en) * | 2021-04-01 | 2022-10-06 | 深圳市时代华影科技股份有限公司 | Anti-tamper circuit, led cabinet, and led display screen |
| WO2022206285A1 (en) * | 2021-04-01 | 2022-10-06 | 深圳市时代华影科技股份有限公司 | Led display screen and data display control method therefor, and screen system |
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