CN211979539U - Ultra-low power consumption band gap reference circuit of sample hold - Google Patents
Ultra-low power consumption band gap reference circuit of sample hold Download PDFInfo
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- CN211979539U CN211979539U CN202020952802.3U CN202020952802U CN211979539U CN 211979539 U CN211979539 U CN 211979539U CN 202020952802 U CN202020952802 U CN 202020952802U CN 211979539 U CN211979539 U CN 211979539U
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Abstract
The utility model discloses an ultralow power consumption band gap reference circuit of sample hold, it is including sample hold reference circuit, error amplifier, power level circuit, ultralow quiescent voltage electric current benchmark and low pressure protection module, a voltage input end and the voltage output end of sample hold reference circuit are connected for acquireing quick start's reference voltage, another interface connection of error amplifier's voltage input end is to output voltage's feedback network, error amplifier's voltage output end and power level circuit connection, feedback network's voltage output end and power level circuit's voltage output end are connected, output stable voltage. The utility model discloses a sample and hold reference circuit can accelerate circuit start-up speed, during the band gap benchmark is closed, can make reference voltage keep within 1.5% voltage precision range, has compromise voltage precision and quiescent current, is applicable to the design of ultra-low power consumption.
Description
Technical Field
The utility model relates to an integrated circuit design field, concretely relates to ultralow power consumption band gap reference circuit of sample hold.
Background
In the era of more and more developed and convenient handheld devices, low power consumption is a crucial research subject of chip design. The bandgap reference is used as a reference source reference circuit of a chip and generally needs to be started in a low power consumption mode, so that the bandgap reference circuit with ultra-low power consumption has very important significance.
In a power management system of a chip, the requirement for the accuracy of an output voltage is high, and a high-accuracy voltage reference is required. The ultra-low power consumption voltage reference is relatively poor in precision compared with the ordinary power consumption voltage reference. Under high temperature conditions, the leakage current of the transistor increases sharply to nanoamp levels, so that the leakage current seriously affects the accuracy of the ultra-low power voltage reference. Under the high temperature condition, the ultra-low power consumption voltage reference precision is difficult to guarantee. Another problem with ultra low power voltage references is poor noise immunity. For example, a typical quiescent current 100nA voltage reference has a loop unity gain bandwidth of about a few kHz, while the power management system is noisy due to the periodic power switching action. As shown in fig. 1, the voltage reference is connected to the input of the error amplifier of the power supply system, and the other end of the input of the error amplifier is connected to the feedback network of the output voltage. Due to the influence of the input of the error amplifier on the parasitic capacitance of the transistor, the disturbance of the feedback voltage can bring about large noise interference. For an ultra-low power consumption voltage reference or an ultra-low power consumption voltage buffer circuit, due to the fact that loop bandwidth and adjusting capacity are limited, interference noise can bring large voltage fluctuation, and kickback noise can affect voltage reference precision and other circuit modules.
SUMMERY OF THE UTILITY MODEL
In order to solve the defect that above-mentioned technique exists, the utility model provides an ultralow power consumption band gap reference circuit of sample hold can obtain the reference voltage of higher precision, can reduce average quiescent current again.
The utility model discloses realize that the technical scheme that above-mentioned technological effect adopted is:
a sample-and-hold ultra-low power consumption bandgap reference circuit, comprising: the voltage output end of the error amplifier is connected with the power stage circuit, and the voltage output end of the feedback network is connected with the voltage output end of the power stage circuit to output stable voltage.
Preferably, in the above sample-and-hold ultra-low power consumption bandgap reference circuit, the sample-and-hold reference circuit includes a sample-and-hold circuit and a fast-start bandgap reference circuit, the fast-start bandgap reference circuit is connected to the sample-and-hold circuit, and the sample-and-hold circuit is connected to the voltage input terminal of the error amplifier.
Preferably, in the above sample-and-hold ultra-low power consumption bandgap reference circuit, the bandgap reference output by the fast start bandgap reference circuit wakes up every 20ms, and is used for refreshing the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.
Preferably, in the above sample-and-hold ultra-low power consumption bandgap reference circuit, during the closing of the bandgap reference, the hold capacitor Chold in the sample-and-hold circuit uses a capacitor of 20pF to maintain the reference voltage held in the 1.5% voltage precision range.
Preferably, in the above sample-and-hold ultra-low power consumption bandgap reference circuit, when the voltage of the capacitor Cc in the fast start-up bandgap reference circuit is too low, the gate of the transistor MN1 in the fast start-up bandgap reference circuit is precharged by the ultra-low static voltage current reference, and the transistor MN1 pipe pulls up the capacitor Cc quickly at start-up by the transistor MN3 in the fast start-up bandgap reference circuit.
Preferably, in the above sample-and-hold ultra-low power consumption bandgap reference circuit, after the output voltage is stabilized, the sample-and-hold circuit refreshes the reference voltage on the holding capacitor Chold in the sample-and-hold circuit by using a sampling time of 5 us.
The utility model has the advantages that: the utility model discloses a sample keeps reference circuit can accelerate circuit start-up speed, the band gap benchmark of output can awaken up once per 20ms for refresh the sample keeps reference voltage on the electric capacity Chold among the reference circuit, during the band gap benchmark was closed, can keep this electric capacity Chold to use 20 pF's electric capacity to make reference voltage keep within 1.5% voltage precision within range, compromise voltage precision and quiescent current, be applicable to the design of ultra-low power consumption.
Drawings
FIG. 1 is a schematic diagram of a kick-back noise interference path with a common voltage reference connected to a power system;
FIG. 2 is a block diagram of the present invention;
fig. 3 is a circuit diagram of the sample-and-hold reference circuit of the present invention.
Detailed Description
In order to make the invention more comprehensible, the invention is further described with reference to the accompanying drawings and specific examples.
In the description of the present invention, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore, should not be construed as limiting the present invention.
As shown in fig. 2, an embodiment of the present invention provides a sample-and-hold bandgap reference circuit with ultra-low power consumption, including: the circuit comprises a sample-hold reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage current reference and a low-voltage protection module. The ultra-low static voltage current reference and low voltage protection module is used for providing reference voltage. And the voltage input end of the error amplifier is connected with the voltage output end of the sample-hold reference circuit and is used for acquiring the reference voltage for quick start. The other interface of the voltage input end of the error amplifier is connected to a feedback network of the output voltage, and the voltage output end of the error amplifier is connected with the power level circuit. And the voltage output end of the feedback network is connected with the voltage output end of the power level circuit to output stable voltage.
Further, in the preferred embodiment of the present invention, as shown in fig. 2, the sample-and-hold reference circuit includes a sample-and-hold circuit and a fast-start bandgap reference circuit, the fast-start bandgap reference circuit is connected to the sample-and-hold circuit, and the sample-and-hold circuit is connected to the voltage input terminal of the error amplifier. As shown in fig. 3, the bandgap reference output by the bandgap reference circuit that starts up quickly wakes up every 20ms for refreshing the reference voltage on the holding capacitor Chold in the sample-and-hold circuit. The hold capacitor Chold in the sample and hold circuit uses a 20pF capacitor during the bandgap reference off to maintain the reference voltage held at 1.5% voltage accuracy. When the voltage of the capacitor Cc in the fast start bandgap reference circuit is too low, the gate of the transistor MN1 in the fast start bandgap reference circuit is precharged by the ultra low quiescent voltage current reference. The transistor MN1 quickly pulls up the capacitor Cc at start-up through the transistor MN3 in the fast start-up bandgap reference circuit. After the output voltage is stabilized, the sample-and-hold circuit refreshes the reference voltage on the hold capacitor Chold in the sample-and-hold circuit using a sampling time of 5 us.
As shown in fig. 2, the reference voltage of the error amplifier is a voltage reference output by a bandgap reference circuit that starts up quickly, and when the voltage reference is stable, the voltage reference is sampled onto a holding capacitor Chold by using a sample-and-hold circuit. After voltage reference sampling is completed, the voltage reference is turned off to save power consumption. The reference voltage of the error amplifier is the voltage after sampling and holding, so that the influence of kickback noise is avoided. The ultra-low quiescent current voltage reference only provides a reference voltage to the relatively "quiet" low voltage protection module. By using the stable voltage reference output by the sampling and holding reference circuit, the reference voltage with higher precision can be obtained, and the average quiescent current can be reduced.
Further, as shown in fig. 3, a sample-and-hold reference circuit is used to generate the output reference voltage of the PMF comparator, which needs to remain present all the time since the reference voltage needs to be used in a sleep state. Although the quiescent current of the band gap reference with the common structure can also achieve the nano-ampere level, the layout area is large, and meanwhile, the precision is not high. The sample-and-hold reference circuit shown in fig. 3 gives consideration to both voltage precision and quiescent current, and is suitable for ultra-low power consumption design. The bandgap reference output by the bandgap reference circuit that starts up quickly wakes up once in 20ms to refresh the reference voltage on the holding capacitor Chold. The hold capacitor Chold uses a 20pF capacitor during the bandgap reference turn off to maintain the reference voltage within 1.5% voltage accuracy. When the 20ms timer triggers, the bandgap reference circuit starts. In order to accelerate the startup speed of the circuit, when the voltage of the capacitor Cc is too low, the MN1 transistor pulls up the Cc quickly through MN3 at the startup time due to the fact that the circuit precharges the gate of MN1, and therefore the startup speed is accelerated. The fast start bandgap reference can bring the output voltage to 1.5% accuracy within t1=20us, and after the output voltage is stabilized, the reference voltage on the holding capacitor Chold is refreshed by using the sampling time of t2=5 us.
To sum up, the utility model discloses a sample and hold reference circuit can accelerate the circuit start-up speed, and the band gap benchmark of output can awaken up once every 20ms for refresh the sample and hold the reference voltage on the electric capacity Chold among the reference circuit, during the band gap benchmark was closed, can keep this electric capacity Chold to use the electric capacity of 20pF to make reference voltage keep within 1.5% voltage precision range, compromise voltage accuracy and quiescent current, be applicable to the design of ultra-low power consumption.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, but rather is described in the foregoing embodiments and the description with reference to the principles of the invention and that various changes and modifications may be made without departing from the spirit and scope of the invention, and it is intended that all such changes and modifications fall within the scope of the invention as claimed, which is defined by the claims appended hereto and their equivalents.
Claims (6)
1. A sample-and-hold ultra-low power consumption bandgap reference circuit, comprising: the voltage output end of the error amplifier is connected with the power stage circuit, and the voltage output end of the feedback network is connected with the voltage output end of the power stage circuit to output stable voltage.
2. The sample-and-hold ultra-low power bandgap reference circuit of claim 1, wherein the sample-and-hold reference circuit comprises a sample-and-hold circuit and a fast-start bandgap reference circuit, the fast-start bandgap reference circuit is connected to the sample-and-hold circuit, and the sample-and-hold circuit is connected to a voltage input of the error amplifier.
3. The sample-and-hold ultra-low power consumption bandgap reference circuit as claimed in claim 2, wherein the bandgap reference output by the fast start bandgap reference circuit wakes up every 20ms for refreshing the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.
4. The sample-and-hold ultra-low power bandgap reference circuit of claim 2, wherein the hold capacitor Chold in the sample-and-hold circuit uses a 20pF capacitor to maintain the reference voltage held within 1.5% voltage accuracy during the bandgap reference turn-off.
5. The sample-and-hold ultra-low power bandgap reference circuit of claim 2, wherein when the voltage of the capacitor Cc in the fast start bandgap reference circuit is too low, the gate of the transistor MN1 in the fast start bandgap reference circuit is pre-charged by the ultra-low quiescent voltage current reference, and the transistor MN1 pipe pulls up the capacitor Cc quickly at start-up by the transistor MN3 in the fast start bandgap reference circuit.
6. The sample-and-hold ultra-low power bandgap reference circuit of claim 2, wherein after the output voltage is stabilized, the sample-and-hold circuit refreshes the reference voltage on the hold capacitor Chold in the sample-and-hold circuit with a sampling time of 5 us.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202020952802.3U CN211979539U (en) | 2020-05-29 | 2020-05-29 | Ultra-low power consumption band gap reference circuit of sample hold |
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| CN202020952802.3U CN211979539U (en) | 2020-05-29 | 2020-05-29 | Ultra-low power consumption band gap reference circuit of sample hold |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115016588A (en) * | 2022-07-22 | 2022-09-06 | 南京英锐创电子科技有限公司 | Starting circuit and starting method for band-gap reference circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115016588A (en) * | 2022-07-22 | 2022-09-06 | 南京英锐创电子科技有限公司 | Starting circuit and starting method for band-gap reference circuit |
| CN115016588B (en) * | 2022-07-22 | 2023-10-10 | 南京英锐创电子科技有限公司 | Start-up circuit and start-up method for band gap reference circuit |
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