CN211929494U - GaN-based radio frequency device with II-shaped grids - Google Patents

GaN-based radio frequency device with II-shaped grids Download PDF

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CN211929494U
CN211929494U CN201921318960.7U CN201921318960U CN211929494U CN 211929494 U CN211929494 U CN 211929494U CN 201921318960 U CN201921318960 U CN 201921318960U CN 211929494 U CN211929494 U CN 211929494U
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gate
gan
cap
drain electrode
source electrode
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王洪
刘晓艺
周泉斌
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South China University of Technology SCUT
Zhongshan Institute of Modern Industrial Technology of South China University of Technology
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South China University of Technology SCUT
Zhongshan Institute of Modern Industrial Technology of South China University of Technology
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Abstract

The utility model discloses a GaN base radio frequency device with II type bars. The device comprises an AlGaN/GaN heterojunction epitaxial layer, the AlGaN/GaN heterojunction epitaxial layer is of a boss structure, the upper portion of a boss is an active area, the two ends of the upper surface of the active area are respectively connected with a source electrode and a drain electrode, the upper surface of the AlGaN/GaN heterojunction epitaxial layer is connected with a grid dielectric layer in an area outside the active area, the upper surface of the grid dielectric layer is connected with an n-shaped grid electrode, and the n-shaped grid electrode is located between the source electrode and the drain electrode. The utility model provides a two of II type bars and AlGaN/GaN heterojunction epitaxial layer direct contact have certain spaced bars foot, are guaranteeing that the bars hinders under the unchangeable condition, have reduced the length of gate electrode effectively, have improved cut-off frequency.

Description

GaN-based radio frequency device with II-shaped grids
Technical Field
The utility model relates to a radio frequency device, more specifically say and relate to a GaN base radio frequency device with II type bars.
Background
The GaN-based HEMT device has wide application in the fields of satellite, communication, radar and the like. GaN belongs to group III nitride, has the advantages of excellent breakdown capability, higher electron density and speed, high temperature resistance, radiation resistance, etc., and is suitable for developing high-frequency, high-temperature and high-power electronic devices. And the AlGaN/GaN heterojunction has high-concentration two-dimensional electron gas at a heterojunction interface at room temperature due to spontaneous polarization effect and piezoelectric polarization effect, so that the device with the AlGaN/GaN heterojunction has high electron concentration and high electron mobility, and has wide application prospect in the construction of 5G network infrastructure, reverse-conducting radar and other fields.
For rf devices, the frequency parameter is a key parameter that determines the overall performance of the rf device. In order to obtain higher frequencies, the cross section of the gate electrode of the device is generally T-shaped. The contact length of the T-shaped gate electrode and the AlGaN/GaN heterojunction epitaxial layer is smaller, and higher cut-off frequency f can be obtainedTAnd at the same time. The T-shaped gate electrode has a large-volume gate cap, increases the cross-sectional area of the gate electrode in the current conduction direction, and reduces the parasitic resistance of the gate electrode, thereby increasing the highest oscillation frequency fMAX
In order to have a higher cut-off frequency for the rf device, the length of the gate electrode, which is in direct contact with the barrier layer, needs to be reduced. Due to the limit of the limit performance of the lithography equipment and the cost of the equipment, the lithography method of the radio frequency device generally adopts electron beam lithography. Electron beam lithography refers to the use of an electron beam to create a pattern on a surface. Because electrons are a wave with extremely short wavelength, the electron beam lithography precision is higher and can reach the nanometer level compared with other optical lithography processes. Therefore, the electron beam lithography can effectively meet the requirements of the size of the gate electrode in the HEMT device.
In order to make the rf device have a higher maximum oscillation frequency, the gate cap volume of the T-gate needs to be increased. The radio frequency device is generally prepared by adopting a manufacturing method of stripping gate electrode metal by double-layer or three-layer photoresist, or taking an etched part of a gate dielectric layer as a gate pin and depositing a gate cap on the gate dielectric layer. In the first scheme, only one gate electrode is supported below the gate cap, so that the smaller gate electrode length and the larger gate cap length cannot be considered simultaneously; in the second scheme, although a smaller gate electrode length and a larger gate cap length can be realized, etching damage is introduced to cause device degradation, and the contact area between the gate dielectric layer and the gate cap is too large, so that the capacitance of a gate source and a gate drain is increased, and the highest oscillation frequency of the device is reduced. Based on the above situation, how to obtain a larger gate cap length under the condition of ensuring a smaller gate electrode length, and not introducing etching damage or capacitance of a gate source and a gate drain, so as to achieve a higher frequency is a problem to be solved urgently by the GaN-based radio frequency device.
SUMMERY OF THE UTILITY MODEL
The utility model aims to overcome the defect and the limitation of the gate electrode preparation technique of current GaN base HEMT device, propose a GaN base radio frequency device with II type bars from the shape of gate electrode and the angle of preparation technology, can reduce the bars length under the condition that keeps the bars resistance unchangeable as far as possible effectively, improve the device frequency.
The purpose of the utility model is realized through one of the following technical schemes.
The utility model provides a GaN-based radio frequency device with n-shaped gate, which comprises an AlGaN/GaN heterojunction epitaxial layer, wherein the AlGaN/GaN heterojunction epitaxial layer is of a boss structure, the upper part of the boss is an active area, the two ends of the upper surface of the active area are respectively connected with a source electrode and a drain electrode, the upper surface of the AlGaN/GaN heterojunction epitaxial layer is connected with the region outside the active area, the side wall of the active area, the upper surface of the active area is connected with the region outside the source electrode and the drain electrode, and the source electrode and the drain electrode are covered with a gate dielectric layer which is provided with an opening on the upper surfaces of the source electrode and the drain electrode to expose partial upper surfaces of the source electrode and the drain electrode, the upper surface of the gate dielectric layer is connected with the n-shaped gate electrode which is arranged between the source electrode and the drain electrode, the n-shaped gate electrode comprises a gate cap and a gate foot, one end of, the other end of the grid pin is connected with the lower surface of the grid cap so as to support the grid cap, the grid pin comprises a first grid pin and a second grid pin, and a space is reserved between the first grid pin and the second grid pin.
Preferably, the length of the cross section of the grid leg is Lg,10nm≤LgLess than or equal to 300 nm; the upper and lower length, i.e. height, of the cross section of the grid leg is Hg,0nm<Hg≤5Lg(ii) a The thickness, i.e. the width, of the gate leg in a direction perpendicular to the cross-section of the gate leg is Wg,WgNot less than 1.2 μm; the distance between the first grid pin and the second grid pin is Linterval,0nm<Linterval≤6Lg
The length of the grid cap is Lcap,2Lg +Linterval≤Lcap≤6Lg +2Linterval(ii) a The height of the grid cap is Hcap,0nm<Hcap≤18 Lg +3Linterval(ii) a The width of the gate cap is Wcap,Wcap=Wg
Preferably, the first gate pin and the source electrode are located at the same side, and the distance between the first gate pin and the source electrode is Lgs,Lgs>(Lcap-Linterval-2Lg) 2; the second gate pin and the drain electrode are positioned at the same side, and the distance between the second gate pin and the drain electrode is Lgd,Lgd>(Lcap-Linterval-2Lg)/2。
Preferably, the source electrode and the drain electrode are Ti/Al/Ni/Au metal layers; the source electrode and the drain electrode are both cuboid, and the lengths of the source electrode and the drain electrode are L respectivelysAnd LdHeight is respectively HsAnd HdEach width is WsAnd Wd,Ls=Ld≥10nm,Hs=Hd≥10nm,0nm<Ws=Wd≤WgA source electrode andthe distance between the drain electrodes is Lsd, Lsd=2Lg +Linterval+ Lgs+Lgd+Ls+Ld
Preferably, the AlGaN/GaN heterojunction epitaxial layer is circular, the diameter of the AlGaN/GaN heterojunction epitaxial layer is 2-10inch, and the thickness of the AlGaN/GaN heterojunction epitaxial layer is 200 mu m-1 mm;
the length of the active region is L, L is more than or equal to LsdThe height is H, H is more than or equal to 100nm and less than or equal to 1mm, the width is W, W is more than or equal to Wg(ii) a The source electrode and the drain electrode are positioned at two ends of the upper surface of the active region, and the lower surface of the source electrode and the lower surface of the drain electrode are completely contacted with the upper surface of the active region.
Preferably, the distance from the edge of the lower surface of the source-drain electrode to the edge of the active region parallel thereto is not less than 500 nm.
Preferably, the material of the gate dielectric layer is insulating metal oxide, SiO2And Si3N4In the above step, the thickness of the gate dielectric layer is not less than 1 nm.
The utility model also provides a method of preparation as above have the GaN base radio frequency device of II type bars, including following step:
(1) preparing an AlGaN/GaN heterojunction epitaxial layer and cleaning: soaking the AlGaN/GaN heterojunction epitaxial layer in an acid solution to remove an oxide layer on the surface of the AlGaN/GaN heterojunction epitaxial layer, and removing organic matters on the surface of the AlGaN/GaN heterojunction epitaxial layer by adopting an organic solution ultrasonic method;
(2) mutual isolation of devices: defining the position of an active region on the upper surface of the AlGaN/GaN heterojunction epitaxial layer by using photoresist and covering the active region, and bombarding and etching the upper surface of the AlGaN/GaN heterojunction epitaxial layer of a non-active region by using plasma, wherein the etching depth is 200nm-600 nm;
(3) stripping the source electrode and the drain electrode, and annealing to form ohmic contact: defining positions and patterns of a source electrode and a drain electrode by using photoresist, enabling the positions of the source electrode and the drain electrode to be at two ends of the upper surface of an active area, covering a non-source electrode and a non-drain electrode area by using the photoresist, forming the source electrode and the drain electrode by using an electron beam evaporation or magnetron sputtering method and a stripping process, and finally annealing in a nitrogen atmosphere at a temperature of over 800 ℃ to enable the source electrode and the drain electrode to form ohmic contact with an AlGaN/GaN heterojunction epitaxial layer;
(4) depositing a gate dielectric layer: a gate dielectric layer is deposited on the upper surface of the AlGaN/GaN heterojunction epitaxial layer, the upper surface of the AlGaN/GaN heterojunction epitaxial layer is connected with a region outside the source region, the side wall of the active region, the upper surface of the active region is connected with a region outside the source electrode and the drain electrode, and the source electrode and the drain electrode;
(5) removing partial gate dielectric layers on the upper surfaces of the source electrode and the drain electrode: the region outside the source electrode and the drain electrode is covered and protected by photoresist, a part of the gate dielectric layer on the upper surfaces of the source electrode and the drain electrode is removed, and the upper surfaces of the source electrode and the drain electrode are exposed;
(6) preparing a gate electrode: depositing double-layer photoresist on the upper surface of the gate dielectric layer and the exposed upper surfaces of the source electrode and the drain electrode, forming a pattern area of a gate cap on the top layer photoresist, exposing partial bottom layer photoresist, forming a pattern area of a gate pin on the exposed partial bottom layer photoresist, depositing a gate electrode material layer on the upper surface of the top layer photoresist, the pattern area of the gate cap and the pattern area of the gate pin, stripping the gate electrode material layer on the upper surface of the top layer photoresist, and removing the double-layer photoresist to form the II-type gate electrode.
Preferably, the method for depositing the gate dielectric layer in the step (4) is any one of a plasma enhanced chemical vapor deposition method, an atomic layer deposition method and a magnetron sputtering method; removing part of the gate dielectric layer on the upper surfaces of the source electrode and the drain electrode by adopting a wet etching or dry etching method in the step (5); and (6) making corresponding gate cap and gate pin pattern areas on the double-layer photoresist by using an electron beam lithography method.
Preferably, the etching solution adopted by the wet etching is an acidic etching solution which can etch insulating oxide and Si3N4Or SiO2(ii) a The dry etching is any one of an inductively coupled plasma etching process, a reactive ion etching process or other ion etching processes.
Preferably, the double-layer photoresist is two types of electron beam photoresist which are not mutually soluble, the sensitivity of the bottom layer photoresist to electron beams is lower than that of the top layer photoresist to electron beams, and the thickness of the top layer photoresist is greater than that of the bottom layer photoresist; in the process of using electron beam lithography, the exposure dose of the grid pin pattern area is larger than that outside the grid pin pattern area; the gate electrode material layer is more than two metal layers, and the metal of the bottommost layer is more than one of nickel or platinum; the metal of the topmost layer is more than one of gold or copper; the total thickness of the gate electrode material layer is larger than that of the bottom layer photoresist and smaller than that of the double-layer photoresist.
Compared with the prior art, the utility model has the following technological effect and advantage:
(1) the utility model provides a two of II type bars and AlGaN/GaN heterojunction epitaxial layer direct contact have certain spaced bars foot, are guaranteeing that the bars hinders under the unchangeable condition, have reduced the length of gate electrode effectively, have improved cut-off frequency.
(2) The grid cap and the grid dielectric layer of the n-shaped grid have air isolation, so that the contact area between the grid dielectric layer and the grid electrode metal is reduced, and the increase of the grid capacitance is reduced;
(3) the utility model provides an adopt the method of peeling off among the preparation method of II type grid electrode, wherein only need once electron beam lithography, need not the sculpture, also need not the secondary alignment, both prevented the sculpture damage, simplified technology again.
Drawings
Figure 1 is a flow chart of a method for fabricating a GaN-based radio frequency device with a Π -type gate as provided in example 1;
figures 2-10 are cross-sectional views of a GaN-based radio frequency device with Π -type gates during fabrication;
figure 11 is a cross-sectional view of a comparative device of a GaN-based radio frequency device with Π -type gate (GaN-based radio frequency device with conventional T-type gate) provided by the embodiments;
figure 12 is a graph of current gain versus frequency for a GaN-based radio frequency device with a Π -type gate as provided by the embodiments;
figure 13 is a graph of gate capacitance versus frequency for a GaN-based radio frequency device with a Π -type gate as provided by the embodiments;
the figures show that: 1-AlGaN/GaN heterojunction epitaxial layer; 2-an active region; 3-a source electrode; 4-a drain electrode; 5-a gate dielectric layer; 6-bottom layer photoresist; 7-top layer photoresist; 8-a gate cap; 9-grid leg; 901-a first gate leg; 902-second gate leg.
The utility model discloses an each drawing only is the schematic in order to understand more easily the utility model discloses, its specific proportion can be adjusted according to the design demand. The relative positions of the elements in the figures described herein are understood by those skilled in the art to refer to the relative positions of the elements.
Detailed Description
The following description is provided to further explain the embodiments of the present invention by referring to the embodiments and the accompanying drawings, but the invention is not limited thereto.
Examples
The present embodiment provides a GaN-based radio frequency device with an n-type gate, as shown in fig. 10, including an AlGaN/GaN heterojunction epitaxial layer 1, where the AlGaN/GaN heterojunction epitaxial layer 1 is of a mesa structure, an upper portion of the mesa is an active region 2, two ends of an upper surface of the active region 2 are respectively connected to a source electrode 3 and a drain electrode 4, an upper surface of the AlGaN/GaN heterojunction epitaxial layer 1 is connected to a region outside the active region 2, a side wall of the active region 2, a region outside the active region 2 and where the upper surface of the active region 2 is connected to the source electrode 3 and the drain electrode 4, and a gate dielectric layer 5 is covered on the source electrode 3 and the drain electrode 4, the gate dielectric layer 5 is provided with an opening on upper surfaces of the source electrode 3 and the drain electrode 4, the upper surfaces of the source electrode 3 and the drain electrode 4 are exposed, an upper surface of the gate dielectric layer 5 is connected to an n-type gate electrode, the n-type gate electrode is located between the source electrode, one end of the grid pin 9 is connected with the upper surface of the grid dielectric layer 5, and the other end is connected with the lower surface of the grid cap 8 so as to support the grid cap 8.
The height of the grid leg is Hg,Hg=300 nm; the gate leg 9 includes a first gate leg 901 and a second gate leg 902, and the lengths of the first gate leg 901 and the second gate leg 902 are both Lg,Lg=100nm and width is Wg,Wg=100 μm, and the distance between the first gate leg 901 and the second gate leg 902 is Linterval,Linterval=300 nm; the height of the grid cap 8 isHcap,HcapLength of L =300nmcap,Lcap=1 μm and width Wcap,Wcap=100 μm. The first gate leg 901 and the source electrode 3 are located at the same side, and the distance between the first gate leg 901 and the source electrode 3 is Lgs,Lgs=2 μm. The second gate leg 902 and the drain electrode 4 are located at the same side, and the distance between the second gate leg 902 and the drain electrode 4 is Lgd,Lgd=2μm。
The source electrode and the drain electrode are Ti/Al/Ni/Au metal layers; the source electrode and the drain electrode are cuboids with the height of HsAnd Hd,Hs=Hd=620nm, length LsAnd Ld,Ls=Ld=500nm and width WsAnd Wd,Ws=Wd=100 μm, and the distance between the source and drain electrodes is Lsd,Lsd=5.5 μm. The lower surfaces of the source electrode and the drain electrode are completely contacted with the upper surface of the active region, and the distances from the edges of the source electrode and the drain electrode to the edge of the active region parallel to the edges of the source electrode and the drain electrode are both 500 nm. The active region has a height H, H =350nm, a length L, L =6.5 μm, a width W, W =101 μm. The AlGaN/GaN heterojunction epitaxial layer is circular, the diameter of the AlGaN/GaN heterojunction epitaxial layer is 2inch, and the thickness of the AlGaN/GaN heterojunction epitaxial layer is 800 micrometers.
The gate dielectric layer is made of Si3N4And the thickness of the gate dielectric layer is 20 nm.
The present embodiment also provides a method for preparing said GaN-based radio frequency device with Π -type gate, as shown in fig. 1, comprising the following steps:
(1) preparing an AlGaN/GaN heterojunction epitaxial layer and cleaning: soaking AlGaN/GaN heterojunction epitaxial layer 1 in H2SO4And H2O2The mass ratio is 6: 1 for 10 minutes (H)2SO4And H2O2Commercially available), removing an oxide layer on the surface of the AlGaN/GaN heterojunction epitaxial layer 1, then respectively performing ultrasonic treatment for 10min by using acetone (commercially available) and isopropanol (commercially available), removing organic matters on the surface of the AlGaN/GaN heterojunction epitaxial layer 1, wherein the schematic diagram of the AlGaN/GaN heterojunction epitaxial layer 1 treated in the step (1) is shown in fig. 2;
(2) mutual isolation of devices: the position of an active region 2 is defined and covered by photoresist on the upper surface of an AlGaN/GaN heterojunction epitaxial layer 1, the upper surface of the AlGaN/GaN heterojunction epitaxial layer of a non-active region is bombarded and etched by plasma, the etching depth is 350nm, the AlGaN/GaN heterojunction epitaxial layer 1 forms a boss structure, and as shown in figure 3, the specific conditions of etching are as follows: BCl3Flow rate of 10sccm, Cl2The flow rate is 90sccm, the RF power is 500W, and the ICP power is 365W;
(3) stripping the source electrode and the drain electrode, and annealing to form ohmic contact: defining positions and patterns of a source electrode 3 and a drain electrode 4 by using photoresist, enabling the positions of the source electrode 3 and the drain electrode 4 to be at two ends of the upper surface of an active region 3, covering a region of a non-source electrode and a region of the non-drain electrode by using the photoresist, depositing a Ti/Al/Ni/Au metal layer by using an electron beam evaporation method, forming the source electrode 3 and the drain electrode 4 by using a stripping process, and finally annealing in a nitrogen atmosphere at 850 ℃ to enable the source electrode 3, the drain electrode 4 and the AlGaN/GaN heterojunction epitaxial layer 1 to form ohmic contact, as shown in FIG. 4;
(4) depositing a gate dielectric layer: depositing a gate dielectric layer 5 on the AlGaN/GaN heterojunction epitaxial layer 1, the upper surface of which is connected with the region outside the source region 2, the side wall of the active region 2, the upper surface of the active region 2 is connected with the region outside the source electrode 3 and the drain electrode 4, and the source electrode 3 and the drain electrode 4 by adopting a plasma enhanced chemical vapor deposition method, wherein the deposition conditions are as follows: NH (NH)3The flow rate is 25 sccm; SiH in an amount of 5% by volume4And N2The flow rate of the mixed gas is 900 sccm; the reaction temperature is 300 ℃; the RF power is 50W, as shown in FIG. 5;
(5) removing partial gate dielectric layers on the upper surfaces of the source electrode and the drain electrode: the region outside the source electrode 3 and the drain electrode 4 is covered and protected by photoresist, and the inductive coupling plasma etching process is adopted to remove part of the gate dielectric layer 5 on the upper surfaces of the source electrode 3 and the drain electrode 4 and expose part of the upper surfaces of the source electrode 3 and the drain electrode 4, as shown in fig. 6, the etching process conditions are as follows: CHF3The flow rate is 50 sccm; o is2The flow rate is 10 sccm; RF radio frequency power is 60W; ICP power is 600W;
(6) preparing a gate electrode: depositing double-layer photoresist on the upper surface of the gate dielectric layer 5 and the upper surfaces of the exposed source electrode 3 and the exposed drain electrode 4, wherein the material of the bottom layer photoresist 6 is poly (alpha-methylstyrene-co-alpha-methyl chloroacrylate), the thickness of the bottom layer photoresist is 300nm, the material of the top layer photoresist 7 is PMMA, and the thickness of the top layer photoresist is 800nm, as shown in FIG. 7; the developing solutions of the bottom photoresist 6 and the top photoresist 7 are both MIBK: IPA =1:3 (volume ratio), the developing rate of the top layer photoresist 7 is greater than that of the bottom layer photoresist 6, a pattern region of the gate cap 8 is formed on the top layer photoresist 7 using an electron beam lithography method to expose a portion of the bottom layer photoresist 6, a pattern region of the gate foot 9 is formed on the exposed portion of the bottom layer photoresist 6, and the exposure dose of the pattern region of the gate foot 9 is 4.4C/m2The exposure dose of the region of the gate cap 8 except the gate pin 9 is 2.4C/m2After photo-etching, the substrate was left to stand and placed in a developing solution at room temperature (23 ℃) for 60 seconds, and then placed in an isopropanol solution at room temperature (23 ℃) for 30 seconds, and then dried by blowing with nitrogen gas, and the longitudinal section of the formed device is shown in FIG. 8. And depositing nickel and gold material layers on the upper surface of the top layer photoresist 7, the pattern area of the gate cap 8 and the pattern area of the gate pin 9 in turn by using an electron beam evaporation process, wherein the thicknesses of the nickel and gold material layers are respectively 100nm and 500nm, as shown in figure 9.
And sequentially placing the device on which the gate electrode material layer is deposited into an acetone solution, an isopropanol solution and deionized water, standing for 5min, stripping the gate electrode material layer on the upper surface of the top photoresist, and removing the double-layer photoresist to form the II-shaped gate electrode. As shown in fig. 10.
The utility model provides a preparation method of GaN base radio frequency device with II type bars, full play electron beam photoresist can set up the characteristic of different exposure doses to different figures simultaneously at the different dissolution rate of the same developer solution and electron beam lithography process, reduce the length of gate electrode effectively. And a metal stripping mode is adopted, so that etching damage is avoided. The stripped gate cap is isolated from the gate dielectric layer by air, so that the gate capacitance is reduced. The GaN-based radio frequency device with the Π -type gate can achieve higher frequencies.
The gate metal is also deposited on the middle portion of the first gate leg and the second gate leg, so as to obtain a conventional GaN-based rf device with T-shaped gate, and the cross-sectional view thereof is shown in fig. 11. The current gain and the gate capacitance of the GaN-based radio frequency device with the T-shaped gate and the examples were simulated by using the Silvaco software, and the simulation results are shown in fig. 12 and 13. As shown in fig. 12, the cut-off frequency of the GaN-based rf device with Π -type gate is 70GHz, which is approximately 30GHz higher than the cut-off frequency of the GaN-based rf device with T-type gate. As shown in fig. 13, the capacitance of the GaN-based rf device with Π -type gate is close to 45fF at Vds =2V, Vg = -5.5V, which is about 25% less than the GaN-based rf device with T-type gate.
The above-described embodiments are only preferred examples of the present invention, and do not constitute any limitation to the present invention, and it is obvious to those skilled in the art that, after understanding the contents and principles of the present invention, various modifications and changes in form and detail can be made according to the method of the present invention without departing from the principles and scope of the present invention, but such modifications and changes are still claimed in the present invention.

Claims (9)

1. A GaN-based radio frequency device with n-shaped gates is characterized by comprising an AlGaN/GaN heterojunction epitaxial layer, wherein the AlGaN/GaN heterojunction epitaxial layer is of a boss structure, the upper part of the boss is an active area, two ends of the upper surface of the active area are respectively connected with a source electrode and a drain electrode, the upper surface of the AlGaN/GaN heterojunction epitaxial layer is connected with a region outside the active area, the side wall of the active area, the upper surface of the active area is connected with a region outside the source electrode and the drain electrode, and the source electrode and the drain electrode are covered with a gate dielectric layer which is provided with an opening on the upper surfaces of the source electrode and the drain electrode to expose partial upper surfaces of the source electrode and the drain electrode, the upper surface of the gate dielectric layer is connected with an n-shaped gate electrode which is positioned between the source electrode and the drain electrode and comprises a gate cap and gate feet, one end of each gate foot is connected with the upper surface of, the other end of the grid pin is connected with the lower surface of the grid cap so as to support the grid cap, the grid pin comprises a first grid pin and a second grid pin, and a space is reserved between the first grid pin and the second grid pin.
2. According to claim 1The GaN-based radio frequency device with the n-shaped gate is characterized in that the left and right length of the cross section of the gate legs is Lg,10nm≤Lg≤300nm。
3. The GaN-based radio frequency device with Π -type gate of claim 1, wherein the upper and lower length, or height, of the cross section of the gate legs is Hg,0nm<Hg≤5Lg
4. The GaN-based radio frequency device with Π -type gate of claim 1, wherein the thickness or width of the gate legs is W perpendicular to the cross-sectional direction of the gate legsg,Wg≥1.2μm。
5. The GaN-based radio frequency device with Π -type gate of claim 1, wherein a spacing between first and second gate legs is Linterval,0nm<Linterval≤6Lg
The length of the grid cap is Lcap,2Lg+Linterval≤Lcap≤6Lg+2Linterval(ii) a The height of the grid cap is Hcap,0nm<Hcap≤18Lg+3Linterval(ii) a The width of the gate cap is Wcap,Wcap=Wg
6. The GaN-based radio frequency device with II-type gate of claim 5, wherein the first gate leg is on the same side as the source electrode, and the distance between the first gate leg and the source electrode is Lgs,Lgs>(Lcap-Linterval-2Lg) 2; the second gate pin and the drain electrode are positioned at the same side, and the distance between the second gate pin and the drain electrode is Lgd,Lgd>(Lcap-Linterval-2Lg)/2。
7. The GaN-based radio frequency device with II-type gate of claim 5, wherein the source and drain electrodes are Ti/Al/Ni/Au goldAn accessory layer; the source electrode and the drain electrode are both cuboid, and the lengths of the source electrode and the drain electrode are L respectivelysAnd LdHeight is respectively HsAnd HdEach width is WsAnd Wd,Ls=Ld≥10nm,Hs=Hd≥10nm,0nm<Ws=Wd≤WgThe distance between the source electrode and the drain electrode is Lsd, Lsd=2Lg+Linterval+Lgs+Lgd+Ls+Ld
8. The GaN-based radio frequency device with II-type gate of claim 5, wherein the AlGaN/GaN heterojunction epitaxial layer is circular, has a diameter of 2-10inch and a thickness of 200 μm-1 mm;
the length of the active region is L, L is more than or equal to LsdThe height is H, H is more than or equal to 100nm and less than or equal to 1mm, the width is W, W is more than or equal to Wg(ii) a The source electrode and the drain electrode are positioned at two ends of the upper surface of the active region, and the lower surface of the source electrode and the lower surface of the drain electrode are completely contacted with the upper surface of the active region.
9. The GaN-based radio frequency device with Π -type gate of claim 1, wherein the gate dielectric layer is made of insulating metal oxide, SiO, or a combination thereof2And Si3N4In the above step, the thickness of the gate dielectric layer is not less than 1 nm.
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Publication number Priority date Publication date Assignee Title
CN110600542A (en) * 2019-08-13 2019-12-20 中山市华南理工大学现代产业技术研究院 GaN-based radio frequency device with П type gate and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110600542A (en) * 2019-08-13 2019-12-20 中山市华南理工大学现代产业技术研究院 GaN-based radio frequency device with П type gate and preparation method thereof

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