CN211454578U - High-speed synchronous control equipment for computer tasks - Google Patents
High-speed synchronous control equipment for computer tasks Download PDFInfo
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- CN211454578U CN211454578U CN202020517295.0U CN202020517295U CN211454578U CN 211454578 U CN211454578 U CN 211454578U CN 202020517295 U CN202020517295 U CN 202020517295U CN 211454578 U CN211454578 U CN 211454578U
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Abstract
The utility model provides a high-speed synchronous controlgear of computer task, including PC host computer and PC from 1, PC from 2. PC from machine N, the PC host computer includes host computer CPU, the synchronous integrated circuit board of host computer and mainboard card slot, each PC is from all including from CPU, from synchronous integrated circuit board of machine and from the integrated circuit board slot, a PC host computer takes N PC from the machine, the synchronous integrated circuit board of host computer is connected with PC from 1, PC from the synchronous integrated circuit board electricity of machine 2. PC from machine N from the machine respectively; the utility model discloses use hardware transmission synchronizing signal's mode, solved the synchronous problem of computer task, improved system response speed and synchronizing signal's transmission rate, strengthened the stability of system, reduce cost.
Description
Technical Field
The utility model belongs to the technical field of the electron, especially, relate to a high-speed synchronous control equipment of computer task.
Background
At present, many technical fields use a master-slave computer control mode, in which a PC master transmits control signals to each PC slave, and each PC slave executes synchronization tasks. For example, in a vision system of a flight simulator, a PC host sends a vision control signal, and each PC slave performs vision drawing and updating, but because there is a time difference in the transmission of the control signal to each PC slave, the vision updating task time of each PC slave is not synchronous, an image tearing phenomenon is generated, and the vision effect does not meet the actual application requirements.
In the prior art, a synchronous updating signal is set in a host software task, a plurality of PC slave machines execute the updating task simultaneously when receiving the synchronous updating signal, but the signal transmission rate of a communication system is slow, so that partial updating delay occurs and the possibility of packet loss exists; and a reflective memory card is also used for network networking, and optical fiber high-speed communication is used, so that the technical scheme can meet most of use environments, but is high in cost and not suitable for wide application.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome the not enough of above-mentioned prior art existence, provide a high-speed synchronous controlgear of computer task, a PC host computer takes a plurality of PCs from the machine, the synchronous integrated circuit board of host computer respectively with each from synchronous integrated circuit board card electric connection, use hardware transmission synchronizing signal's mode, solved the synchronous problem of computer task, improved system response speed and synchronizing signal's transmission rate, strengthened the stability of system, reduce cost.
The utility model provides a computer task high-speed synchronous control device, which comprises a PC host and a PC slave 1, and a PC slave 2. PC slave N;
the PC host comprises a host CPU, a host synchronous board card and a host board card slot, wherein the host CPU is electrically connected with the host synchronous board card, the host synchronous board card is inserted in the host board card slot, each PC slave comprises a slave CPU, a slave synchronous board card and a slave board card slot, the slave CPU is electrically connected with the slave synchronous board card, the slave synchronous board card is inserted in the slave board card slot, the host synchronous board card of the PC host is respectively electrically connected with slave synchronous board cards of a PC slave 1 and a PC slave 2-PC slave N, wherein N is an integer greater than or equal to 3.
Furthermore, the master synchronous board card and each slave synchronous board card are provided with Field Programmable Gate Arrays (FPGA).
Furthermore, the field programmable gate array FPGAs on the host CPU and the host synchronous board card adopt a PCI-E protocol for data transmission, and the field programmable gate array FPGAs on the slave CPU and the slave synchronous board card adopt the PCI-E protocol for data transmission.
Furthermore, the motherboard card slot and the slave board card slot are both PCI-E slots.
Furthermore, the master synchronization board card and each slave synchronization board card are provided with two communication connectors, the first communication connector of the master synchronization board card is electrically connected with the first communication connector of the slave synchronization board card 1 through a signal line, the second communication connector of the slave synchronization board card 1 is electrically connected with the first communication connector of the slave synchronization board card 2 through a signal line, the second communication connector of the slave synchronization board card 2 is electrically connected with the first communication connector of the slave synchronization board card 3 through a signal line, and so on until the second communication connector of the slave synchronization board card N-1 is electrically connected with the first communication connector of the slave synchronization board card N through a signal line.
Further, the signal line is an RJ45 network line.
The utility model has the advantages that:
the utility model provides a high-speed synchronous controlgear of computer task, including PC host computer and PC from 1, PC from 2. PC from machine N, the PC host computer includes host computer CPU, the synchronous integrated circuit board of host computer and mainboard card slot, each PC is from all including from CPU, from synchronous integrated circuit board of machine and from the integrated circuit board slot, a PC host computer takes N PC from the machine, the synchronous integrated circuit board of host computer is connected with PC from 1, PC from the synchronous integrated circuit board electricity of machine 2. PC from machine N from the machine respectively; the utility model discloses use hardware transmission synchronizing signal's mode, solved the synchronous problem of computer task, improved system response speed and synchronizing signal's transmission rate, strengthened the stability of system, reduce cost.
Drawings
The present invention is further explained by using the drawings, but the embodiments in the drawings do not constitute any limitation to the present invention, and for those skilled in the art, other drawings can be obtained according to the following drawings without any inventive work.
Fig. 1 is a schematic block diagram of a high-speed synchronous control device for computer tasks according to the present invention.
Detailed Description
The technical solution of the present invention will be described clearly and completely with reference to the accompanying drawings, and obviously, the described embodiments are some, but not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Example 1:
referring to fig. 1, the present embodiment provides a computer task high-speed synchronous control device, which includes a PC master and a PC slave 1, a PC slave 2 · PC slave N;
the PC host comprises a host CPU, a host synchronous board card and a host board card slot, wherein the host synchronous board card is provided with a Field Programmable Gate Array (FPGA), the host CPU is electrically connected with the host synchronous board card, the host CPU and the FPGA on the host synchronous board card adopt a PCI-E protocol for data transmission, the host synchronous board card is inserted into the host board card slot, and the slot is a PCI-E slot.
Each PC slave machine comprises a slave machine CPU, a slave machine synchronous board card and a slave machine board card slot, wherein the slave machine synchronous board card is provided with a field programmable gate array FPGA, the slave machine CPU is electrically connected with the slave machine synchronous board card, the field programmable gate array FPGA on the slave machine CPU and the slave machine synchronous board card are used for data transmission by adopting a PCI-E protocol, the slave machine synchronous board card is inserted into the slave machine board card slot, and the slot is a PCI-E slot; the host synchronous board card of the PC host is respectively and electrically connected with the slave synchronous board cards of the PC slave 1 and the PC slave 2. the PC slave N, wherein N is an integer which is more than or equal to 3.
The host synchronization board card of the PC host is electrically connected with the slave synchronization board cards of the PC slave 1 and the PC slave 2. PC slave N by adopting a hardware synchronization signal transmission mode, so that the possibility of packet loss in a high-speed communication occasion caused by software synchronization is avoided, the problem of computer task synchronization is solved, and a PCI-E data transmission protocol established on the basis of FPGA is faster in communication control, the system response speed and the transmission rate of synchronization signals are improved, and the cost is reduced.
The master synchronous board card and each slave synchronous board card are provided with two communication connectors, the first communication connector of the master synchronous board card is electrically connected with the first communication connector of the slave synchronous board card 1 through a signal wire, the second communication connector of the slave synchronous board card 1 is electrically connected with the first communication connector of the slave synchronous board card 2 through a signal wire, the second communication connector of the slave synchronous board card 2 is electrically connected with the first communication connector of the slave synchronous board card 3 through a signal wire, and so on until the second communication connector of the slave synchronous board card N-1 is electrically connected with the first communication connector of the slave synchronous board card N through a signal wire. Additionally, the signal line is an RJ45 network line. The connection mode of the RJ45 network cable can improve the stability of the system.
Compared with the prior art, the utility model provides a high-speed synchronous controlgear of computer task, including PC host computer and PC from 1, PC from 2. PC from machine N, the PC host computer includes host computer CPU, host computer synchronization integrated circuit board and mainboard card slot, each PC is from all including following machine CPU, from synchronous integrated circuit board of machine and from quick-witted integrated circuit board slot, a PC host computer takes N PC from the machine, the host computer synchronization integrated circuit board of PC host computer is connected with PC from machine 1, PC from the machine 2. PC from the quick-witted synchronous integrated circuit board electricity of machine N; the utility model discloses use hardware transmission synchronizing signal's mode, solved the synchronous problem of computer task, improved system response speed and synchronizing signal's transmission rate, strengthened the stability of system, reduce cost.
Finally, it should be emphasized that the present invention is not limited to the above-described embodiments, but only to the preferred embodiments of the invention, and is not limited to the embodiments, and any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included within the scope of the present invention.
Claims (6)
1. A computer task high-speed synchronous control device is characterized by comprising a PC host and a PC slave 1, and a PC slave 2. the PC slave N;
the PC host comprises a host CPU, a host synchronous board card and a host board card slot, wherein the host CPU is electrically connected with the host synchronous board card, the host synchronous board card is inserted in the host board card slot, each PC slave comprises a slave CPU, a slave synchronous board card and a slave board card slot, the slave CPU is electrically connected with the slave synchronous board card, the slave synchronous board card is inserted in the slave board card slot, the host synchronous board card of the PC host is respectively electrically connected with slave synchronous board cards of a PC slave 1 and a PC slave 2-PC slave N, wherein N is an integer greater than or equal to 3.
2. The computer task high-speed synchronous control device according to claim 1, wherein the master synchronous board card and each slave synchronous board card are provided with Field Programmable Gate Arrays (FPGAs).
3. The computer task high-speed synchronous control device according to claim 2, wherein the field programmable gate arrays FPGA on the master CPU and the master synchronization board perform data transmission using a PCI-E protocol, and the field programmable gate arrays FPGA on the slave CPU and the slave synchronization board perform data transmission using the PCI-E protocol.
4. A computer task high-speed synchronization control device according to claim 3, wherein the motherboard card slot and the slave board card slot are both PCI-E slots.
5. The computer task high-speed synchronous control device according to claim 3, wherein the master synchronization board and each slave synchronization board are provided with two communication connectors, the first communication connector of the master synchronization board is electrically connected with the first communication connector of the slave synchronization board 1 through a signal line, the second communication connector of the slave synchronization board 1 is electrically connected with the first communication connector of the slave synchronization board 2 through a signal line, the second communication connector of the slave synchronization board 2 is electrically connected with the first communication connector of the slave synchronization board 3 through a signal line, and so on until the second communication connector of the slave synchronization board N-1 is electrically connected with the first communication connector of the slave synchronization board N through a signal line.
6. A computer task high-speed synchronous control device as claimed in claim 5, wherein the signal line is RJ45 network line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020517295.0U CN211454578U (en) | 2020-04-09 | 2020-04-09 | High-speed synchronous control equipment for computer tasks |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020517295.0U CN211454578U (en) | 2020-04-09 | 2020-04-09 | High-speed synchronous control equipment for computer tasks |
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| Publication Number | Publication Date |
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| CN211454578U true CN211454578U (en) | 2020-09-08 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202020517295.0U Active CN211454578U (en) | 2020-04-09 | 2020-04-09 | High-speed synchronous control equipment for computer tasks |
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| CN (1) | CN211454578U (en) |
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- 2020-04-09 CN CN202020517295.0U patent/CN211454578U/en active Active
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