CN211427809U - Backlight driving circuit and liquid crystal display device - Google Patents
Backlight driving circuit and liquid crystal display device Download PDFInfo
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- CN211427809U CN211427809U CN201920561208.9U CN201920561208U CN211427809U CN 211427809 U CN211427809 U CN 211427809U CN 201920561208 U CN201920561208 U CN 201920561208U CN 211427809 U CN211427809 U CN 211427809U
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Abstract
The utility model discloses a backlight drive circuit and liquid crystal display device, backlight drive circuit includes time schedule controller and backlight driver, time schedule controller generates the second pulse width modulation signal according to the first pulse width modulation signal of external input, backlight driver is used for providing drive current to backlight unit according to the second pulse width modulation signal to control backlight brightness of liquid crystal display device, wherein, time schedule controller includes signal detector and signal comparator, signal detector detects the first duty cycle of first pulse width modulation signal, signal comparator compares the first duty cycle with preset threshold, obtain the second duty cycle that is greater than preset threshold according to the comparison result, and generate the second pulse width modulation signal according to the second duty cycle, guarantee that the minimum value of second duty cycle is greater than preset threshold all the time, the problem of the display panel scintillation that produces because of the duty cycle undersize of pulse width modulation signal has been solved, is favorable for improving the display quality.
Description
Technical Field
The utility model relates to a display technical field, more specifically relate to a drive circuit and liquid crystal display device are shaded.
Background
Liquid crystal display devices have the advantages of being light, thin, energy-saving, low in power consumption and the like, and have been widely used in electronic devices such as televisions, computers, mobile phones, digital cameras and the like.
The liquid crystal has anisotropic characteristics, and the liquid crystal display device displays an image through a pixel matrix using electrical and optical characteristics of the liquid crystal. Each pixel of the liquid crystal display device realizes gray scale display by adjusting an optical projection ratio with respect to a polarizing plate according to a change in a data signal using a liquid crystal alignment direction. Fig. 1 shows a schematic configuration diagram of a related art liquid crystal display device, and as shown in fig. 1, a liquid crystal display device 100 includes a display panel 110 for displaying an image by a pixel matrix, a driving circuit 120 for driving the display panel 110, a timing controller 130 for controlling the driving circuit 120, a backlight unit 140, and a backlight driver 150.
The driving circuit 120 includes a source driver 121 and a gate driver 122 for driving the display panel.
The backlight driver 150 is used to drive the luminance of the backlight unit 140, and the backlight driver 150 controls the luminance of the backlight unit by adjusting the on/off time of the backlight unit according to the duty ratio of a Pulse Width Modulation (PWM) signal input from the host or the timing controller 130.
The conventional display device has the following problems: in a certain frequency range, when the duty ratio of the PWM signal is lower than 3%, the turn-on time of the transistor in the backlight driver 150 is short, and then the charging time of the parasitic capacitance of the transistor is short, so that the transistor cannot be in a complete turn-on state, and finally the output of the backlight driver 150 is abnormal, which causes the flicker of the display panel.
SUMMERY OF THE UTILITY MODEL
In view of the above, an object of the present invention is to provide a backlight driving circuit and a liquid crystal display device, which can solve the problem of flicker of a display panel caused by the reduction of the duty ratio of a PWM signal.
According to an aspect of the utility model, a drive circuit is shaded is provided, include: the time schedule controller is used for generating a second pulse width modulation signal according to a first pulse width modulation signal input from the outside; and a backlight driver connected to the backlight unit and the timing controller, and supplying a driving current to the backlight unit according to the second pulse width modulation signal to control the brightness of the backlight unit, wherein the timing controller includes a signal detector and a signal comparator, the signal detector detects a first duty ratio of the first pulse width modulation signal, the signal comparator compares the first duty ratio with a preset threshold, obtains a second duty ratio larger than the preset threshold according to a comparison result, and generates the second pulse width modulation signal according to the second duty ratio.
Preferably, when the first duty ratio is greater than a first preset duty ratio, the signal comparator outputs the second duty ratio of D2 ═ D1, and when the first duty ratio is less than or equal to the first preset duty ratio, the signal comparator outputs the second duty ratio of D2 ═ D1+ (Da-D1) × 0.5+ 0.5%, where D1 represents the first duty ratio, Da represents the first preset duty ratio, and the first preset duty ratio is greater than the preset threshold.
Preferably, when the first duty ratio is greater than a second preset duty ratio, the signal comparator outputs the second duty ratio D2-D1, and when the first duty ratio is less than or equal to the second preset duty ratio, the signal comparator outputs the second duty ratio D2-3 × D1, where D1 represents the first duty ratio and the second preset duty ratio is greater than or equal to the preset threshold.
Preferably, the backlight driving circuit further includes: and the current controller is connected with the backlight driver and used for providing reference current for the backlight driver, wherein when the first duty ratio is smaller than the second preset duty ratio, the time schedule controller provides an effective control signal for the current controller, and the current controller adjusts the reference current according to the effective control signal.
Preferably, the current controller includes a first resistor, a second resistor, a third resistor and a first switch tube, the first resistor and the first switch tube are connected in series between the reference current output end and the ground, a first end of the second resistor is connected to the reference current output end, a second end of the second resistor is connected to the ground, a first end of the third resistor is connected to the control signal input end, and a second end of the third resistor is connected to the control end of the first switch tube.
Preferably, the current controller includes a fourth resistor, a fifth resistor, a sixth resistor and a second switching tube, the fourth resistor and the fifth resistor are connected in series between the reference current output end and the ground, a first end of the second switching tube is connected to an intermediate node of the fourth resistor and the fifth resistor, a second end of the second switching tube is connected to a second end of the fifth resistor, a first end of the sixth resistor is connected to the control signal input end, and a second end of the sixth resistor is connected to the control end of the second switching tube.
According to another aspect of the present invention, there is provided a liquid crystal display device, including: a display panel and a backlight unit for providing backlight to the display panel; and the backlight driving circuit is connected with the backlight unit and provides driving current for the backlight unit so as to control the brightness of the backlight unit.
Preferably, the liquid crystal display device further includes a driving circuit connected to the display panel for driving the display panel according to a timing signal and a gray scale driving signal.
Preferably, the display panel includes a plurality of scan lines, a plurality of data lines, and a plurality of pixel units at intersections thereof, and the driving circuit includes: the grid driver is connected with the plurality of scanning lines and used for sequentially scanning the plurality of scanning lines according to the time sequence signals; and the source electrode driver is connected with the data lines and used for providing gray scale voltage to the pixel units through the data lines according to the gray scale driving signals so as to enable the display panel to display pictures.
Preferably, the backlight unit is a direct type backlight or a side type backlight.
The utility model provides a drive circuit and liquid crystal display device in a poor light has following beneficial effect.
The time schedule controller compares the first duty ratio of the first pulse width modulation signal with a preset threshold value, and adjusts the second duty ratio of the second pulse width modulation signal according to the comparison result, so that the second duty ratio of the second pulse width modulation signal is always larger than the preset threshold value, the backlight driver can be ensured to work normally, and the problem of display panel flicker caused by the undersize duty ratio of the pulse width modulation signal is solved.
In a preferred embodiment, when the first duty ratio is smaller than/equal to the preset duty ratio, the second duty ratio is automatically increased by a certain proportion than the first duty ratio, because the preset duty ratio is greater than the preset threshold, it can be ensured that the minimum value of the second duty ratio is always greater than the preset threshold, so that the backlight driver can work normally, and the gradual change effect of the backlight when the user slides the luminance bar will not be affected.
In a preferred embodiment, the liquid crystal display device further includes a current controller, where the current controller is configured to adjust a reference current in the backlight driver when the first duty ratio is smaller than a preset duty ratio, and reduce a current in the backlight driver while increasing the duty ratio of the pulse width modulation signal, so as to help ensure that the backlight brightness does not change drastically while adjusting the duty ratio of the pulse width modulation signal, and improve the display quality.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 illustrates a schematic configuration of a liquid crystal display device according to the related art;
fig. 2 is a schematic structural view of a liquid crystal display device according to a first embodiment of the present invention;
FIG. 3 is a schematic diagram of the timing controller of FIG. 2;
fig. 4 is a schematic structural view of a liquid crystal display device according to a second embodiment of the present invention;
FIG. 5 is a schematic diagram of one configuration of the current controller of FIG. 4;
fig. 6 shows another schematic diagram of the current controller of fig. 4.
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. Moreover, certain well-known elements may not be shown in the figures.
The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Fig. 2 is a schematic structural view of a liquid crystal display device according to a first embodiment of the present invention. As shown in fig. 2, the liquid crystal display device 200 includes a display panel 210, a driving circuit 220, a backlight unit 240, and a backlight driving circuit. The backlight driving circuit is connected to the backlight unit 240 and is configured to provide a driving current to the backlight unit 240 to control the brightness of the backlight unit 240. The driving circuit 220 includes a source driver 221 and a gate driver 222, and the backlight driving circuit includes a timing controller 230 and a backlight driver 250.
The display panel 110 includes a plurality of scan lines and a plurality of data lines, and a plurality of pixel units (not shown) at intersections thereof, each including a thin film transistor and a pixel electrode, respectively. The grid electrodes of the thin film transistors of the pixel units positioned on the same row are connected to the same scanning line, and the source electrodes of the thin film transistors of the pixel units positioned on the same column are connected to the same data line.
The timing controller 230 is configured to obtain timing signals and gray scale driving signals of each pixel unit according to the received image data, and provide the timing signals and the gray scale driving signals to the driving circuit 220.
Further, the host 300 scales image data input from an external data source according to the resolution of the display panel and supplies the image data to the timing controller 230 together with a plurality of sync signals. The plurality of synchronization signals include at least a dot clock and a data enable signal, and further include a horizontal synchronization signal and a vertical synchronization signal.
The timing controller 230 corrects the image data input from the host pc 300 using various data processing methods that improve image quality and reduce power consumption, and supplies the gray scale driving signals to the source driver 221.
In addition, the timing controller 230 is also used to generate timing signals for controlling the timing of the source driver 221 and the gate driver 222 according to a plurality of synchronization signals input from the host 300. The timing signals include, for example, a source start pulse and a source sampling pulse for controlling latching of data signals of the source driver 221, a polarity control signal for controlling polarity of the data signals, an enable signal for controlling an output period of the data signals, and the like. The timing signals further include a start pulse signal and a shift clock for controlling gate signal scanning of the gate driver 222, an enable signal for controlling an output period of the gate signal, and the like.
The gate driver 222 is connected to the plurality of scan lines for providing gate signals to sequentially scan the plurality of scan lines in each frame period to gate the corresponding thin film transistors. The source driver 221 is connected to the plurality of data lines, and is configured to apply gray scale voltages corresponding to the gray scale driving signals to the corresponding thin film transistors via the data lines.
The backlight unit 240 employs a plurality of LEDs (Light Emitting diodes) as a Light source. In one embodiment, the backlight unit 240 is a direct type backlight, which is disposed opposite to the entire display area of the display panel 110, and sequentially passes through the display panel 110 to the eyes of the viewer when the liquid crystal display device is used. In another embodiment, the backlight unit 240 is a side-in type backlight, and the backlight unit is located at the upper and lower sides or the left and right sides of the display panel 110, and the light path of the backlight is changed by the light guide plate to sequentially pass through the display panel to the eyes of the viewer.
In addition, the host pc 300 also supplies the timing controller 230 with the first pulse width modulation signal PWM1 having a duty ratio that is set in advance according to a design value or set according to user brightness adjustment. The timing controller 230 derives the second pulse width modulation signal PWM2 in response to the first duty ratio D1 of the first pulse width modulation signal PWM1 and supplies the second pulse width modulation signal PWM2 to the backlight driver 250, and the backlight driver 250 drives the backlight unit 240 and controls the luminance of the backlight unit 240 according to the second pulse width modulation signal PWM 2. Further, the timing controller 230 compares the first duty ratio D1 of the first pulse width modulation signal PWM1 with a preset threshold, and adjusts the second duty ratio D2 of the second pulse width modulation signal PWM2 according to the comparison result, so that the second duty ratio D2 of the second pulse width modulation signal PWM2 is always greater than the preset threshold, thereby ensuring that the backlight driver 250 can normally operate. For example, when the first duty ratio of the first pulse width modulation signal PWM1 is less than 3%, the timing controller 230 increases the second duty ratio of the second pulse width modulation signal PWM2, so as to ensure that the backlight driver 250 can normally operate, thereby solving the problem of display panel flicker caused by too small duty ratio of the pulse width modulation signal.
Fig. 3 is a schematic diagram illustrating an internal structure of the timing controller of fig. 2.
As a non-limiting example, the timing controller 230 includes a signal detector 231 and a signal comparator 232.
Here, the signal detector 231 samples and counts the first pulse width modulation signal PWM1 to detect the first duty ratio D1 of the first pulse width modulation signal PWM 1.
Further, the signal detector 231 detects a first switching period and a first on time of the externally input first pulse width modulation signal PWM1, and then determines the first duty ratio D2 of the first pulse width modulation signal PWM1 according to the first switching period and the first on time.
Furthermore, the signal detector 231 detects a rising edge of the first PWM signal PWM1 and starts timing, a time from a first rising edge to a first falling edge is denoted as a first on time T1, and a time from the first rising edge to a second rising edge is denoted as a first switching period T1, so that the first duty ratio D1 of the first PWM signal PWM1 is T1/T1.
The signal comparator 232 generates the second pulse width modulation signal PWM2 according to the preset duty ratio and the first duty ratio D1 of the first pulse width modulation signal PWM1, and outputs the second pulse width modulation signal PWM2 to the backlight driver 250.
Further, the signal comparator 232 compares the first duty ratio D1 of the first pulse width modulation signal PWM1 with a preset duty ratio, and obtains a second duty ratio D2 according to the comparison result, determines the second switching period T2 and the second on-time T2 according to the second duty ratio D2, and finally generates the second pulse width modulation signal PWM2 according to the second switching period T2 and the second on-time T2.
Further, the signal comparator 232 responds to the first duty ratio D1 to obtain the second duty ratio D2, so that the second duty ratio D2 is always greater than the preset threshold value, and the backlight driver 250 can operate normally.
As a non-limiting example, when the first duty cycle D1 is greater than the first preset duty cycle Da, then the second duty cycle D2 is D1; when the first duty ratio D1 is less than/equal to the first preset duty ratio Da, the second duty ratio D2 is D1+ (Da-D1) × 0.5+ 0.5%. For example, when the first duty ratio D1 is less than/equal to 5%, the second duty ratio D2 is automatically increased by a certain ratio compared with the first duty ratio D1, because the first preset duty ratio is greater than the preset threshold, so that it is not only ensured that the minimum value of the second duty ratio D2 is always greater than the preset threshold, so that the backlight driver 250 can operate normally, but also the gradual change effect of the backlight when the user slides the luminance bar is not affected.
Fig. 4 is a schematic structural view of a liquid crystal display device according to a second embodiment of the present invention. The structure and function of the liquid crystal display device 400 in the second embodiment are substantially the same as those of the liquid crystal display device 200 in the first embodiment, except that: in the timing controller 430, when the first duty ratio D1 of the first pulse width modulation signal PWM1 is greater than the second preset duty ratio Db, the second duty ratio D2 is equal to D1; when the first duty ratio D1 of the first pulse width modulation signal PWM1 is less than/equal to the second preset duty ratio Db, the second duty ratio D2 is 3 × D1, wherein the second preset duty ratio is greater than/equal to the preset threshold.
In addition, the backlight driving circuit in the liquid crystal display device 400 further includes a current controller 460, and the current controller 460 is configured to provide the reference current Iset to the backlight driver 450. When the first duty ratio D1 is smaller than the second preset duty ratio Db, the timing controller 430 provides an effective control signal to the current controller 460, and the current controller 460 adjusts the reference current Iset according to the effective control signal, so as to ensure that the backlight brightness does not change drastically.
Further, the current controller 460 may adjust the reference current Iset by changing a resistance value of an equivalent resistor therein according to the control signal.
Fig. 5 and 6 respectively show two structural schematic diagrams of the current controller 460 in fig. 4.
As a non-limiting example, as shown in FIG. 5, the current controller 460 includes first through third resistors R1-R3 and a first switch M1. The first resistor R1 and the first switch M1 are connected in series between the output terminal of the reference current Iset and ground, and the control terminal of the first switch M1 is configured to receive the control signal. The second resistor R2 has a first terminal connected to the output terminal of the reference current Iset and a second terminal connected to ground. The first end of the third resistor R3 is connected to the input end of the control signal, and the second end is connected to the control end of the first switch tube M1.
The first switch M1 can be implemented by, for example, an NMOS (N-Metal-Oxide-Semiconductor, N-type Metal Oxide field effect transistor), and when the first duty ratio D1 is greater than the second preset duty ratio Db, the timing controller 430 provides the inactive control signal (i.e., the control signal is at a high level), the first switch is turned on, and the equivalent resistance Rx is (R1 × R2)/(R1+ R2); when the first duty ratio D1 is less than/equal to the second preset duty ratio Db, the timing controller 430 provides the active control signal (i.e. the control signal is at a low level), the first switch is turned off, and the equivalent resistance Rx is equal to R2.
As another non-limiting example, as shown in fig. 6, the current controller 460 includes a fourth resistor R4 and a fifth resistor R5 connected in series between the output terminal of the reference current Iset and ground, a second switching transistor M2 and a sixth resistor R6. The second switch transistor M2 has a first terminal connected to the middle node of the fourth resistor R4 and the fifth resistor R5, a second terminal connected to the second terminal of the fifth resistor R5, and a control terminal for receiving the control signal. The first end of the sixth resistor R6 is connected to the input end of the control signal, and the second end is connected to the control end of the second switch tube M2.
The second switch tube M2 may be implemented by an NMOS (N-Metal-Oxide-Semiconductor, N-type Metal Oxide field effect transistor), for example, when the first duty ratio D1 is greater than the second preset duty ratio Db, the timing controller 430 provides the invalid control signal (i.e., the control signal is at a high level), the second switch tube M2 is turned on, and the equivalent resistance Rx is equal to R4; when the first duty ratio D1 is less than/equal to the second preset duty ratio Db, the timing controller 430 provides the active control signal (i.e. the control signal is at a low level), the second switch M2 is turned off, and the equivalent resistance Rx is R4+ R5.
In this embodiment, when the first duty ratio D1 is smaller than the second preset duty ratio Db, the current controller 460 increases the resistance of the equivalent resistor of the circuit to decrease the current value of the reference current, so as to ensure that the backlight brightness does not change dramatically when the first duty ratio D1 is smaller than the second preset duty ratio Db.
It should be noted that the types of the first switch tube M1 and the second switch tube M2 are not limited to the embodiment, and those skilled in the art can select the types of the first switch tube M1 and the second switch tube M2 according to specific situations.
To sum up, the utility model provides a drive circuit and liquid crystal display device are shaded, time schedule controller carries out the comparison with the first duty cycle of first pulse width modulation signal and predetermines the threshold value, adjusts the second duty cycle of second pulse width modulation signal according to the comparative result to make the second duty cycle of second pulse width modulation signal be greater than all the time and predetermine the threshold value, guarantee that the driver in a poor light can normally work, solved because of the problem of the display panel scintillation of pulse width modulation signal's duty cycle undersize production.
In a preferred embodiment, when the first duty ratio is smaller than/equal to the preset duty ratio, the second duty ratio is automatically increased by a certain proportion than the first duty ratio, because the preset duty ratio is greater than the preset threshold, it can be ensured that the minimum value of the second duty ratio is always greater than the preset threshold, so that the backlight driver can work normally, and the gradual change effect of the backlight when the user slides the luminance bar will not be affected.
In a preferred embodiment, the liquid crystal display device further includes a current controller, where the current controller is configured to adjust a reference current in the backlight driver when the first duty ratio is smaller than a preset duty ratio, and reduce a current in the backlight driver while increasing the duty ratio of the pulse width modulation signal, which is beneficial to ensuring that the backlight brightness does not change drastically while adjusting the duty ratio of the pulse width modulation signal, and improving the display quality.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
In accordance with the embodiments of the present invention as set forth above, these embodiments are not exhaustive and do not limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, to thereby enable others skilled in the art to best utilize the invention and its various embodiments with various modifications as are suited to the particular use contemplated.
Claims (9)
1. A backlight driving circuit, comprising:
the time schedule controller is used for generating a second pulse width modulation signal according to a first pulse width modulation signal input from the outside; and
a backlight driver connected to the backlight unit and the timing controller, for supplying a driving current to the backlight unit according to the second pulse width modulation signal to control the brightness of the backlight unit,
the time sequence controller comprises a signal detector and a signal comparator, the signal detector detects a first duty ratio of the first pulse width modulation signal, the signal comparator obtains a second duty ratio according to the first duty ratio and a preset duty ratio, the second duty ratio is larger than a preset threshold value, and the second pulse width modulation signal is generated according to the second duty ratio.
2. The backlight driving circuit according to claim 1, wherein the signal comparator is connected to the signal detector to obtain the first duty ratio, and the signal comparator is adapted to compare the first duty ratio with a first preset duty ratio or a second preset duty ratio, and obtain the second duty ratio D2 according to the comparison result.
3. The backlight driving circuit according to claim 2, further comprising: a current controller connected to the backlight driver for providing a reference current to the backlight driver,
when the first duty ratio is smaller than the second preset duty ratio, the time sequence controller provides an effective control signal to the current controller, and the current controller adjusts the reference current according to the effective control signal.
4. The backlight driving circuit according to claim 3, wherein the current controller comprises a first resistor, a second resistor, a third resistor and a first switch transistor,
the first resistor and the first switch tube are connected in series between the reference current output end and the ground,
the first end of the second resistor is connected to the reference current output end, the second end of the second resistor is grounded,
the first end of the third resistor is connected to the control signal input end, and the second end of the third resistor is connected to the control end of the first switch tube.
5. The backlight driving circuit according to claim 3, wherein the current controller comprises a fourth resistor, a fifth resistor, a sixth resistor and a second switch transistor,
the fourth resistor and the fifth resistor are connected in series between the reference current output terminal and ground,
the first end of the second switch tube is connected to the middle node of the fourth resistor and the fifth resistor, the second end of the second switch tube is connected to the second end of the fifth resistor,
and the first end of the sixth resistor is connected to the control signal input end, and the second end of the sixth resistor is connected to the control end of the second switching tube.
6. A liquid crystal display device, comprising:
a display panel and a backlight unit for providing backlight to the display panel; and
the backlight driving circuit of any of claims 1-5, connected to the backlight unit to provide a driving current to the backlight unit to control the brightness of the backlight unit.
7. The liquid crystal display device according to claim 6, further comprising a driving circuit connected to the display panel for driving the display panel according to a timing signal and a gray scale driving signal.
8. The liquid crystal display device according to claim 7, wherein the display panel includes a plurality of scanning lines, a plurality of data lines, and a plurality of pixel units at intersections thereof, and the driving circuit includes:
the grid driver is connected with the plurality of scanning lines and used for sequentially scanning the plurality of scanning lines according to the time sequence signals; and
and the source electrode driver is connected with the data lines and used for providing gray scale voltages to the pixel units through the data lines according to the gray scale driving signals.
9. The liquid crystal display device according to claim 6, wherein the backlight unit is a direct type backlight or a side type backlight.
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| CN201920561208.9U CN211427809U (en) | 2019-04-23 | 2019-04-23 | Backlight driving circuit and liquid crystal display device |
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| CN201920561208.9U CN211427809U (en) | 2019-04-23 | 2019-04-23 | Backlight driving circuit and liquid crystal display device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114255682A (en) * | 2021-12-06 | 2022-03-29 | 四川长虹电器股份有限公司 | Detection device and method for regional dimming function |
| CN114664229A (en) * | 2020-12-22 | 2022-06-24 | 酷矽半导体科技(上海)有限公司 | Display system, display method, driving device and driving chip |
| CN115394267A (en) * | 2022-09-23 | 2022-11-25 | 北京显芯科技有限公司 | Display system |
-
2019
- 2019-04-23 CN CN201920561208.9U patent/CN211427809U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114664229A (en) * | 2020-12-22 | 2022-06-24 | 酷矽半导体科技(上海)有限公司 | Display system, display method, driving device and driving chip |
| CN114664229B (en) * | 2020-12-22 | 2023-08-25 | 酷矽半导体科技(上海)有限公司 | Display system, display method, driving device and driving chip |
| CN114255682A (en) * | 2021-12-06 | 2022-03-29 | 四川长虹电器股份有限公司 | Detection device and method for regional dimming function |
| CN115394267A (en) * | 2022-09-23 | 2022-11-25 | 北京显芯科技有限公司 | Display system |
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