CN114822435B

CN114822435B - Driving circuit of display panel, display and common voltage adjusting method

Info

Publication number: CN114822435B
Application number: CN202210375940.3A
Authority: CN
Inventors: 李建雷; 康报虹
Original assignee: HKC Co Ltd
Current assignee: HKC Co Ltd
Priority date: 2022-04-11
Filing date: 2022-04-11
Publication date: 2023-06-23
Anticipated expiration: 2042-04-11
Also published as: CN114822435A

Abstract

The application provides a driving circuit of a display panel, a display and a common voltage adjusting method. The time sequence controller is used for determining the corresponding polarity and gray scale value of each sub-pixel in the current frame image signal and counting the polarity gray scale accumulated value of all sub-pixels in the same row. According to the driving circuit, when the polarity offset is generated by determining the public voltage according to the polarity gray scale accumulated value through the time sequence controller, the polarity offset signal is output to control the feedback module to output the corresponding feedback signal, so that the public voltage generating module carries out negative feedback adjustment on the public voltage output by the public voltage generating module based on the feedback signal and the preset public voltage signal, the adjustment quantity and the offset quantity of the public voltage are offset, the voltage value of the public voltage received by each sub-pixel is close to the preset public voltage value, and the problem that the picture is greener can be avoided.

Description

Driving circuit of display panel, display and common voltage adjusting method

Technical Field

The present disclosure relates to the field of display panels, and in particular, to a driving circuit for a display panel, a display, and a method for adjusting a common voltage.

Background

Currently, an LCD (Liquid Crystal Display ) is the most widely used display for various industries, and has advantages of thin profile, light weight, and the like. In the conventional LCD, if the liquid crystal molecules are fixed at the same voltage for a long time, the characteristics of the liquid crystal molecules are destroyed to form inertia, and therefore, the conventional LCD generally adopts a method of applying a polarity-inverted voltage to the pixel electrode of each pixel unit to drive the pixel unit to emit light, so that the characteristics of the liquid crystal molecules are prevented from being destroyed, and in the case of a dot inversion method, the polarity of the voltages stored in each sub-pixel unit and the sub-pixel units adjacent to each other in the upper, lower, left and right directions is opposite.

However, due to the coupling effect between the pixel electrode and the common electrode, the voltages of the pixel electrodes with different polarities simultaneously pull the voltage of the common electrode. When the LCD displays some special pictures, as shown in fig. 1, the pixel electrodes of the red sub-pixel 301 and the blue sub-pixel 303 in the light-emitting pixel unit 300 are driven by voltages with the same polarity (e.g., negative polarity), and the pixel electrode of the green sub-pixel 302 is driven by voltages with another polarity (e.g., positive polarity), at this time, the polarity coupling of the green sub-pixel 302 to the common electrode cannot offset the polarity coupling of the red sub-pixel 301 and the blue sub-pixel 303 to the common electrode, which results in the voltage of the common electrode in the first row pixel unit being shifted (e.g., shifted to the negative polarity), so that the display picture of the first row pixel unit is greener and the visual experience of the user is affected.

Disclosure of Invention

In view of this, the main purpose of the present application is to provide a driving circuit, a display and a common voltage adjusting method for a display panel, which aim to solve the problem that the display screen of the first row of pixel units is greener when the existing display panel displays the screen with unbalanced polarity.

In order to achieve the above object, the present application provides a driving circuit of a display panel, the display panel includes a plurality of rows of sub-pixels, and the driving circuit includes a timing controller, a feedback module, and a common voltage generating module. The time sequence controller is used for receiving the image signals and determining the corresponding polarity and gray scale value of each sub-pixel in the current frame image signals; the time sequence controller is also used for subtracting the accumulated value of the gray scale value of each anode sub-pixel from the accumulated value of the gray scale value of each cathode sub-pixel in the same row to obtain a polar gray scale accumulated value, and outputting a polar offset signal when the polar gray scale accumulated value is not within a preset threshold value range. The feedback module is electrically connected with the time sequence controller and is used for outputting corresponding feedback signals according to the polarity deviation signals. The public voltage generation module is electrically connected with the feedback module and is used for generating public voltage based on a preset public voltage signal and outputting the public voltage to each sub-pixel; the public voltage generation module is also used for comparing the preset public voltage signal with the feedback signal, and carrying out negative feedback adjustment on the public voltage output by the public voltage generation module according to the comparison result, so that the voltage value of the public voltage received by each sub-pixel approaches to the preset public voltage value corresponding to the preset public voltage signal.

According to the driving circuit, when the polarity offset signal is output when the common voltage is determined to generate the polarity offset according to the polarity gray scale accumulated value in the same row of sub-pixels through the time sequence controller, the feedback module is controlled to output the corresponding feedback signal, so that the common voltage generating module carries out negative feedback adjustment on the common voltage output by the common voltage generating module based on the feedback signal and the preset common voltage signal, the adjustment quantity and the offset quantity of the common voltage are mutually offset, the voltage value of the common voltage received by each sub-pixel can be ensured to be close to the preset common voltage value corresponding to the preset common voltage signal, the problem that the display picture of the first row of pixel units is greenish can be avoided, and the visual experience of a user can be improved.

Optionally, the polarity offset signal includes a positive polarity offset signal and a negative polarity offset signal, the preset threshold range includes an upper threshold and a lower threshold, and the feedback signal includes a first feedback signal and a second feedback signal, where the upper threshold is greater than or equal to the lower threshold. The timing controller is used for outputting the positive electrode offset signal when the polarity gray scale accumulated value is larger than the upper threshold value, and outputting the negative electrode offset signal when the polarity gray scale accumulated value is smaller than the lower threshold value. The feedback module is used for outputting the first feedback signal when the positive electrode offset signal is received and outputting the second feedback signal when the negative electrode offset signal is received. The common voltage generating module is used for outputting a common voltage with a voltage value equal to the preset common voltage value when the feedback signal is not received, reducing the voltage value of the common voltage output by the common voltage generating module when the first feedback signal is received, and increasing the voltage value of the common voltage output by the common voltage generating module when the second feedback signal is received.

Optionally, the common voltage generating module includes an operational amplifier, a non-inverting input end of the operational amplifier is configured to receive the preset common voltage signal, an inverting input end of the operational amplifier is electrically connected with the feedback module, an inverting input end of the operational amplifier is configured to receive the feedback signal, and an output end of the operational amplifier is configured to output the common voltage to each sub-pixel. And the operational amplifier works in a negative feedback state when receiving the feedback signal, so that the public voltage received by each sub-pixel approaches to a preset public voltage value corresponding to the preset public voltage signal.

Optionally, the feedback module includes a control unit, a voltage input terminal, a feedback signal output terminal, a first switching tube, and a second switching tube. The control unit is electrically connected with the time schedule controller, and is used for outputting a first control signal when the positive electrode offset signal is received and outputting a second control signal when the negative electrode offset signal is received. The voltage input terminal is used for receiving a reference voltage. The feedback signal output end is electrically connected with the inverting input end of the operational amplifier. The first switching tube is electrically connected between the voltage input end and the feedback signal output end, the control end of the first switching tube is also electrically connected with the control unit, and the first switching tube is used for receiving and responding to the first control signal to conduct, so that the feedback signal output end is in a high level state through the conducted first switching tube and the voltage input end, and outputs the first feedback signal. The second switching tube is electrically connected between the feedback signal output end and the grounding end, the control end of the second switching tube is also electrically connected with the control unit, and the second switching tube is used for receiving and responding to the second control signal to conduct, so that the feedback signal output end is in a low level state through the conducted second switching tube being electrically connected with the grounding end, and the second feedback signal is output.

Optionally, the time sequence controller is further configured to generate an intensity identification signal according to the magnitude of the polar gray scale accumulated value, and output the intensity identification signal to the control unit of the feedback module, where the intensity identification signal is used to control intensity parameters of the first control signal and the second control signal output by the control unit, where the intensity parameters include a voltage value of the signal and/or a duration of the signal. When the polarity gray scale accumulated value is larger than the upper threshold value, the larger the difference value between the polarity gray scale accumulated value and the upper threshold value is, the smaller the voltage value of the first control signal is, and/or the longer the duration of the first control signal is. The conducting degree of the first switch tube and the voltage value of the first control signal are in negative correlation, so that the signal value of the first feedback signal and the voltage value of the first control signal are in negative correlation. When the polarity gray scale accumulated value is smaller than the lower threshold value, the larger the difference value between the polarity gray scale accumulated value and the lower threshold value is, the larger the voltage value of the second control signal is, and/or the longer the duration of the second control signal is. The conducting degree of the second switch tube and the voltage value of the second control signal are in positive correlation, so that the voltage value of the second feedback signal and the voltage value of the second control signal are in positive correlation.

Optionally, the display panel further includes a plurality of scan lines, each of the scan lines is electrically connected to a row of sub-pixels, and the driving circuit further includes a gate driver electrically connected to the plurality of scan lines, respectively. The time sequence controller is also used for generating a frame starting signal, and the frame starting signal is used for starting the grid driver to scan a plurality of scanning lines line by line so as to drive the display panel to start displaying the current frame image. The time sequence controller is also used for generating and outputting a trigger signal to the feedback module according to the frame starting signal, wherein the trigger signal is used for triggering the control unit to output the first control signal or the second control signal.

Optionally, the first switching tube includes a PMOS tube, a gate of the PMOS tube corresponds to a control end of the first switching tube, a source of the PMOS tube is electrically connected with the voltage input end, and a drain of the PMOS tube is electrically connected with the feedback signal output end. The second switching tube comprises an NMOS tube, the grid electrode of the NMOS tube corresponds to the control end of the second switching tube, the source electrode of the NMOS tube is electrically connected with the grounding end, and the drain electrode of the NMOS tube is electrically connected with the feedback signal output end.

The application also provides a display, the display includes display panel and foretell drive circuit, with the display panel electricity is connected, drive circuit is used for the drive display panel carries out luminous display.

The present application also provides a common voltage adjusting method applied to a driving circuit of a display panel, the method for adjusting a common voltage of the display panel, the display panel including a plurality of rows of sub-pixels, the method comprising:

receiving image signals, and determining the corresponding polarity and gray scale value of each sub-pixel in the current frame image signals;

subtracting the accumulated value of the gray scale value of each negative polarity sub-pixel from the accumulated value of the gray scale value of each positive polarity sub-pixel in the same row to obtain a polar gray scale accumulated value;

generating a polarity offset signal when the polarity gray scale accumulated value is not within a preset threshold value range;

generating a corresponding feedback signal according to the polarity offset signal;

and comparing the feedback signal with a preset public voltage signal, and performing negative feedback adjustment on the public voltage according to the comparison result, so that the voltage value of the public voltage received by each sub-pixel approaches to the preset public voltage value corresponding to the preset public voltage signal.

Optionally, the polarity offset signal includes a positive polarity offset signal and a negative polarity offset signal, the preset threshold range includes an upper threshold and a lower threshold, and the feedback signal includes a first feedback signal and a second feedback signal, where the upper threshold is greater than or equal to the lower threshold.

When the polarity gray scale accumulated value is not within a preset threshold value range, generating a polarity offset signal comprises:

judging whether the polarity gray scale accumulated value is larger than the upper threshold value or smaller than the lower threshold value;

if the polarity gray scale accumulated value is larger than the upper threshold value, generating a positive electrode offset signal;

and if the polarity gray scale accumulated value is smaller than the lower threshold value, generating a negative electrode offset signal.

The generating a corresponding feedback signal according to the polarity offset signal includes:

if the polarity offset signal is a positive polarity offset signal, generating the first feedback signal;

and if the polarity offset signal is a negative polarity offset signal, generating the second feedback signal.

The negative feedback adjustment of the common voltage includes:

if the feedback signal is the first feedback signal, reducing the voltage value of the output common voltage;

And if the feedback signal is the second feedback signal, improving the voltage value of the output common voltage.

Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.

Drawings

Fig. 1 is a schematic diagram of polarities of an exemplary LCD when displaying a special screen.

Fig. 2 is a schematic structural diagram of a display according to an embodiment of the present application.

Fig. 3 is a schematic circuit configuration of a sub-pixel in the display shown in fig. 2.

Fig. 4 is a circuit configuration diagram of a driving circuit in the display shown in fig. 2.

Fig. 5 is a schematic flow chart of a common voltage adjusting method according to an embodiment of the present application.

Fig. 6 is a schematic flow chart of another common voltage adjusting method according to an embodiment of the present application.

Description of main reference numerals:

display 1000

Display panel 100

Pixel unit 300

Red sub-pixel 301

Blue subpixel 303

Green sub-pixel 302

Gate driver 240

Data driver 250

Scan line 140

Data line 150

Sub-pixel P

Storage capacitor C1

Liquid crystal capacitor C2

Driving circuit 200

Timing controller 210

Feedback module 220

Control unit 221

First switching tube Q1

Second switching tube Q2

Voltage input 222

Feedback signal output 223

Common voltage generation module 230

Operational amplifier OP

Steps 601-605, 6031-6039

The following detailed description will further illustrate the application in conjunction with the above-described figures.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without undue burden, are within the scope of the present application.

In the description of the present application, it should be noted that the azimuth or positional relationship indicated by the terms "upper", "lower", "left", "right", etc. are based on the azimuth or positional relationship shown in the drawings, and are merely for convenience of description of the present application and simplification of the description, and do not indicate or imply that the apparatus or element in question must have a specific azimuth, be configured and operated in a specific azimuth, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

Referring to fig. 2, the present application provides a display 1000, where the display 1000 is applied to an electronic device. The electronic device may be a smart phone, a tablet computer, an electronic reader, a vehicle-mounted computer, a navigator, a digital camera, a smart television, a smart wearable device, or any other type of electronic device, which is not limited herein.

The display 1000 includes a display panel 100 and a driving circuit 200, wherein the driving circuit 200 is electrically connected to the display panel 100, and the driving circuit 200 is used for driving the display panel 100 to perform light emitting display.

In the embodiment of the present application, the driving circuit 200 includes a timing controller (Timing Controller, TCON) 210, a common voltage generating module 230, a gate driver 240, and a data driver 250.

The display panel 100 is provided with a plurality of scan lines 140 extending in a row direction, a plurality of data lines 150 extending in a column direction, and sub-pixels P arranged in an array defined by the plurality of scan lines 140 and the plurality of data lines 150. The display panel 100 is further provided with a plurality of common electrode lines (not shown) extending along the row direction, and the plurality of common electrode lines are in one-to-one correspondence with the plurality of scan lines 140. Illustratively, as shown in fig. 1, the sub-pixel P may be a red sub-pixel 301, a green sub-pixel 302 or a blue sub-pixel 303, and in the row direction, the green sub-pixel 302 and the adjacent red sub-pixel 301, the blue sub-pixel 303 together form a pixel unit 300.

The timing controller 210 is electrically connected to the gate driver 240 and the data driver 250, the gate driver 240 is electrically connected to the plurality of scan lines 140, the data driver 250 is electrically connected to the plurality of data lines 150, and the common voltage generating module 230 is electrically connected to the plurality of common electrode lines.

In operation, the timing controller 210 is configured to provide control signals to the gate driver 240 and the data driver 250, control the gate driver 240 to provide a scan voltage to the sub-pixel P through the scan line 140, and control the data driver 250 to provide a data voltage Vdata to the sub-pixel P through the data line 150. The common voltage generating module 230 supplies the common voltage VCOM to the sub-pixel P through the common electrode line.

Fig. 3 schematically shows the structure of one of the sub-pixels P of fig. 2. In each sub-pixel P, the gate electrode of the thin film transistor is electrically connected to the scan line 140 and receives the scan voltage. The source of the thin film transistor is electrically connected to the data line 150 and receives the data voltage Vdata. The first poles of the storage capacitor C1 and the liquid crystal capacitor C2 are electrically connected with the drain electrode of the thin film transistor, and the second poles of the storage capacitor C1 and the liquid crystal capacitor C2 are electrically connected with the common electrode line and connected with the common voltage VCOM.

With this structure, when the thin film transistor is turned on during display, a coupling capacitor (i.e., the lc capacitor C1 and the storage capacitor C2) is present between the common electrode line and the data line 150, and when the data line 150 is connected to the data voltage Vdata, voltages across the coupling capacitor will also be suddenly changed. Specifically, if the data voltage Vdata suddenly changes to positive polarity, the common voltage VCOM on the common electrode line is shifted to positive polarity, i.e. increased, due to the capacitive coupling effect. When the data voltage Vdata suddenly changes to the negative polarity, the common voltage VCOM on the common electrode line is shifted to the negative polarity, i.e. decreased, due to the capacitive coupling effect. It should be noted that, in the embodiment of the present application, the positive polarity of the sub-pixel P means that the received data voltage Vdata is higher than the common voltage VCOM, and the negative polarity of the sub-pixel P means that the received data voltage Vdata is lower than the common voltage VCOM.

Thus, the data voltage Vdata on the data line 150 is suddenly changed, and the common voltage VCOM on the common electrode line is difficult to be maintained stable. In particular, when the display 1000 displays some special pictures, as shown in fig. 1, the pixel electrodes of the red sub-pixel 301 and the blue sub-pixel 303 in the light-emitting pixel unit 300 are driven by voltages with the same polarity (e.g., negative polarity), and the pixel electrode of the green sub-pixel 302 is driven by voltages with another polarity (e.g., positive polarity), at this time, the polarity coupling of the green sub-pixel 302 to the common electrode cannot offset the polarity coupling of the red sub-pixel 301 and the blue sub-pixel 303 to the common electrode, which results in a shift (e.g., shift to the negative polarity) of the voltage of the common electrode in the first row pixel unit, so that the display picture of the first row pixel unit is greener and the visual experience of the user is affected.

In view of this, the driving circuit 200 provided herein is further provided with a feedback module 220, and the feedback module 220 is electrically connected between the timing controller 210 and the common voltage generating module 230.

In the embodiment of the present application, the timing controller 210 is configured to receive the image signal and determine the polarity and the gray-scale value corresponding to each sub-pixel P in the current frame image signal. The timing controller 210 is further configured to subtract the accumulated value of the gray-scale values of the positive sub-pixels from the accumulated value of the gray-scale values of the negative sub-pixels in the same row to obtain a polar gray-scale accumulated value, and output a polar offset signal when the polar gray-scale accumulated value is not within a preset threshold value range.

It should be noted that the gray scale values may represent different brightness levels, and the brightness change between the brightest and darkest may be divided into a plurality of levels, so as to obtain the gray scale values of a plurality of levels. By taking 255 gray scales as an example, the gray scale value is darkest in the 0 time, brightest in the 255 time, the gray scale value ranges from 0 to 255, and the display brightness is gradually improved along with the increase of the gray scale value. In this embodiment, when counting the polarity gray scale accumulated values of a row of sub-pixels, the gray scale values of all the positive polarity sub-pixels in the row are accumulated to obtain a positive polarity gray scale accumulated value, the gray scale values of all the negative polarity sub-pixels in the row are accumulated to obtain a negative polarity gray scale accumulated value, and then the positive polarity gray scale accumulated value is subtracted from the negative polarity gray scale accumulated value to obtain the polarity gray scale accumulated value of the sub-pixels in the changed row. The timing controller 210 predicts whether the common voltage VCOM will be shifted according to the accumulated value of the polarity gray scale of one row of sub-pixels. For example, if the first row of sub-pixels includes 150 positive sub-pixels and 150 negative sub-pixels, and the gray scale value of each pixel is 255, then the polarity gray scale accumulated value of the first row of sub-pixels=150×255-150×255=0, at this time, the polarity coupling of the negative sub-pixels to the common electrode and the polarity coupling of the positive sub-pixels to the common electrode cancel, and the timing controller 210 determines that the common voltage VCOM drops without offset.

Further, the preset threshold range includes an upper threshold and a lower threshold, and the polarity offset signal includes a positive polarity offset signal and a negative polarity offset signal, where the upper threshold is greater than or equal to the lower threshold. The timing controller 210 is configured to output the positive offset signal when the polarity gray-scale accumulated value is greater than the upper threshold value, and output the negative offset signal when the polarity gray-scale accumulated value is less than the lower threshold value. If the polarity gray-scale accumulated value is greater than the upper threshold value, the timing controller 210 determines that the common voltage VCOM will be shifted to the positive polarity when the current frame image is displayed. If the polarity gray-scale accumulated value is greater than the upper threshold value, the timing controller 210 determines that the common voltage VCOM will be shifted toward the negative polarity when the current frame image is displayed.

The feedback module 220 is electrically connected to the timing controller 210, and the feedback module 220 is configured to output a corresponding feedback signal according to the polarity offset signal.

Further, the feedback signal includes a first feedback signal and a second feedback signal. The feedback module 220 is configured to output the first feedback signal when the positive offset signal is received, and output the second feedback signal when the negative offset signal is received.

The common voltage generating module 230 is configured to generate the common voltage VCOM and output the common voltage VCOM to each of the sub-pixels P based on a preset common voltage signal Vref. The common voltage generating module 230 is further configured to compare the preset common voltage signal Vref with the feedback signal, and perform negative feedback adjustment on the common voltage output by the comparison result, so that the voltage value of the common voltage received by each sub-pixel P approaches to the preset common voltage value Vref (e.g. 6V) corresponding to the preset common voltage signal Vref. Specifically, the common voltage generating module 230 is configured to output a common voltage VCOM having a voltage value equal to the preset common voltage value VREF when the feedback signal is not received, and to decrease the voltage value of the common voltage VCOM output when the first feedback signal is received, and to increase the voltage value of the common voltage VCOM output when the second feedback signal is received.

In operation, if the timing controller 210 determines that the common voltage VCOM does not deviate, the polarity deviation signal is not output, and the common voltage generating module 230 outputs the common voltage VCOM having a voltage value equal to the preset common voltage value VREF. In this way, the common voltage VCOM received by each sub-pixel P will approach VREF.

If the timing controller 210 determines that the common voltage VCOM will be shifted to the positive polarity, a positive polarity shift signal is output to the feedback module 220, so that the feedback module 220 outputs a first feedback signal to the common voltage generating module 230, and the common voltage generating module 230 reduces the output common voltage VCOM according to the first feedback signal. At this time, the polarity coupling action of all the sub-pixels P in the current row on the common voltage VCOM will cause the common voltage VCOM to be pulled up, and since the common voltage generating module 230 decreases the output common voltage VCOM, the pulled up value and the decreased value of the common voltage VCOM may cancel each other. Thus, the common voltage VCOM received by each sub-pixel P is still close to VREF.

If the timing controller 210 determines that the common voltage VCOM will be shifted toward the negative polarity, the negative polarity shift signal is output to the feedback module 220, so that the feedback module 220 outputs a second feedback signal to the common voltage generating module 230, and the common voltage generating module 230 increases the output common voltage VCOM according to the second feedback signal. At this time, the polarity coupling action of all the sub-pixels P in the current row on the common voltage VCOM will cause the common voltage VCOM to be pulled down, and since the common voltage generating module 230 increases the output common voltage VCOM, the pulled down value and the increased value of the common voltage VCOM may cancel each other. Thus, the common voltage VCOM received by each sub-pixel P is still close to VREF.

According to the driving circuit 200 provided by the application, when the timing controller 210 determines that the common voltage VCOM will generate polarity offset according to the polarity gray scale accumulated values in the same row of sub-pixels, the polarity offset signal is output to control the feedback module 220 to output the corresponding feedback signal, so that the common voltage generating module 230 carries out negative feedback adjustment on the common voltage VCOM output by the common voltage generating module based on the feedback signal and the preset common voltage signal Vref, thereby ensuring that the adjustment amount and offset amount of the common voltage VCOM are mutually offset, and ensuring that the voltage value of the common voltage VCOM received by each sub-pixel P approaches to the preset common voltage value VREF corresponding to the preset common voltage signal Vref, thereby avoiding the problem that the display picture of the first row of pixel units is greenish, and improving the visual experience of users.

The circuit structure and operation principle of the feedback module 220 and the common voltage generating module 230 in the driving circuit 200 will be described in detail with reference to fig. 4.

In this embodiment, the feedback module 220 includes a control unit 221, a voltage input end 222, a feedback signal output end 223, a first switching tube Q1, and a second switching tube Q2.

Wherein the voltage input 222 is configured to receive a reference voltage VCC (e.g., 12V). The control unit 221 is electrically connected to the timing controller 210, and is configured to output a first control signal when the positive offset signal is received, and to output a second control signal when the negative offset signal is received.

The feedback signal output terminal 223 is electrically connected to the common voltage generating module 230.

The first switching tube Q1 is electrically connected between the voltage input end 222 and the feedback signal output end 223, the control end of the first switching tube Q1 is further electrically connected with the control unit 221, the first switching tube Q1 is configured to receive and respond to the first control signal to conduct, so that the feedback signal output end 223 is electrically connected with the voltage input end 222 through the conducted first switching tube Q1 to be in a high level state, and outputs the first feedback signal.

The second switching tube Q2 is electrically connected between the feedback signal output end 223 and the ground end, the control end of the second switching tube Q2 is further electrically connected with the control unit 221, the second switching tube Q2 is configured to receive and respond to the second control signal to conduct, so that the feedback signal output end 223 is electrically connected with the ground end through the conducted second switching tube Q2 to be in a low level state, and outputs the second feedback signal.

Illustratively, the first switching tube Q1 includes a PMOS tube, a gate of the PMOS tube corresponds to the control end of the first switching tube Q1, a source of the PMOS tube is electrically connected to the voltage input end 222, and a drain of the PMOS tube is electrically connected to the feedback signal output end 223. The second switching tube Q2 includes an NMOS tube, a gate of the NMOS tube corresponds to the control end of the second switching tube Q2, a source of the NMOS tube is electrically connected to the ground end, and a drain of the NMOS tube is electrically connected to the feedback signal output end 223.

In this embodiment of the present application, the common voltage generating module 230 includes an operational amplifier OP, where a non-inverting input end of the operational amplifier OP is configured to receive the preset common voltage signal Vref, an inverting input end of the operational amplifier OP is electrically connected to the feedback signal output end 223 of the feedback module 220, an inverting input end of the operational amplifier OP is configured to receive the feedback signal, and an output end of the operational amplifier OP is configured to output the common voltage VCOM to each sub-pixel P. The operational amplifier OP works in a negative feedback state when receiving the feedback signal, so that the common voltage received by each sub-pixel P approaches to a preset common voltage value Vref corresponding to the preset common voltage signal Vref.

In this embodiment, the timing controller 210 is further configured to generate a frame start signal STV, where the frame start signal STV is used to start the gate driver 240 to scan the scan lines 140 line by line, so as to drive the display panel 100 to start displaying the current frame image. The timing controller 210 is further configured to generate and output a trigger signal to the feedback module 220 according to the frame start signal STV, where the trigger signal is used to trigger the control unit 221 to output the first control signal or the second control signal. In one embodiment, the trigger signal is the frame start signal STV. In other embodiments, the trigger signal may lead the frame start signal STV or lag the frame start signal STV in time sequence, depending on the characteristics of the display 1000. It can be appreciated that, when the gate driver 240 is started to scan the scan lines 140 line by line, the control unit 221 is triggered to output the first control signal or the second control signal, so that the operational amplifier OP performs negative feedback adjustment on the common voltage synchronously, and the common voltage received by the first row sub-pixels P of the display 1000 approaches VREF, so that the problem that the first row picture of the display 1000 is greenish can be avoided.

In this embodiment of the present application, the timing controller 210 is further configured to generate an intensity identification signal according to the magnitude of the polarity gray scale accumulated value, and output the intensity identification signal to the control unit 221 of the feedback module 220, where the intensity identification signal is used to control an intensity parameter of the first control signal and the second control signal output by the control unit 221, where the intensity parameter includes a voltage value of the signal and/or a duration of the signal.

Specifically, when the polarity gray scale accumulated value is greater than the upper threshold value, the greater the difference between the polarity gray scale accumulated value and the upper threshold value, the smaller the voltage value of the first control signal and/or the longer the duration of the first control signal. In this embodiment of the present application, the first switching tube Q1 is a PMOS tube, so when the first switching tube Q1 works in the amplifying region, the conducting degree of the first switching tube Q1 and the voltage value of the first control signal are in a negative correlation, so that the signal value of the first feedback signal and the voltage value of the first control signal are in a negative correlation. It will be appreciated that the larger the difference between the polarity grayscale accumulated value and the upper threshold value, the larger the forward offset that the common voltage VCOM will generate.

It should be noted that, when the first switching tube Q1 is fully turned on, the voltage at the feedback signal output terminal 223 is the highest, i.e., VCC. When the first switching tube Q1 is not fully turned on, the larger the conduction degree of the first switching tube Q1 is, the smaller the source gate voltage Vds is, the higher the voltage of the feedback signal output terminal 223 is, and the larger the voltage value of the first feedback signal is. The longer the duration of the first control signal is, the longer the conduction duration of the first switch tube Q1 is. Accordingly, the negative feedback regulation of the operational amplifier OP is stronger.

When the polarity gray scale accumulated value is smaller than the lower threshold value, the larger the difference value between the polarity gray scale accumulated value and the lower threshold value is, the larger the voltage value of the second control signal is, and/or the longer the duration of the second control signal is. In this embodiment of the present application, the second switching tube Q2 is an NMOS tube, so when the second switching tube Q2 works in the amplifying region, the conduction degree of the second switching tube Q2 and the voltage value of the second control signal are in a positive correlation, so that the voltage value of the second feedback signal and the voltage value of the second control signal are in a positive correlation. It is understood that the larger the difference between the polarity gray scale accumulated value and the lower threshold value, the larger the negative offset that the common voltage VCOM will generate.

It should be noted that, when the second switching transistor Q2 is fully turned on, the voltage at the feedback signal output terminal 223 is the lowest, i.e., 0V. When the second switching tube Q2 is not fully turned on, the larger the conduction degree of the second switching tube Q2 is, the smaller the source gate voltage Vds is, the lower the voltage of the feedback signal output terminal 223 is, and the smaller the voltage value of the second feedback signal is. The longer the duration of the second control signal is, the longer the conduction duration of the second switch tube Q1 is. Accordingly, the negative feedback regulation of the operational amplifier OP is stronger.

It should be noted that, the use of PMOS transistors for the first switching transistor Q1 and NMOS transistors for the second switching transistor Q2 is only exemplary, and should not be taken as a limitation of the present application. In other embodiments, the first switching tube Q1 and the second switching tube Q2 may be optionally selected from PMOS tubes and NMOS tubes, for example, in another embodiment, the first switching tube Q1 and the second switching tube Q2 are both NMOS tubes, and the voltage values of the first control signal and the second control signal are also adjusted accordingly: when the polarity gray scale accumulated value is larger than the upper threshold value, the larger the difference value between the polarity gray scale accumulated value and the upper threshold value is, the larger the voltage value of the first control signal is, and/or the longer the duration of the first control signal is. When the polarity gray scale accumulated value is smaller than the lower threshold value, the larger the difference value between the polarity gray scale accumulated value and the lower threshold value is, the larger the voltage value of the second control signal is, and/or the longer the duration of the second control signal is.

For example, taking a row of sub-pixels including 150 positive sub-pixels and 150 negative sub-pixels, and the maximum gray level value being 255 as an example, if the gray levels of the positive sub-pixels and the negative sub-pixels in the first row are all 255, the polarity gray level accumulated value=150×255-150×0= 38250 of the first row sub-pixels, and at this time, the polarity gray level accumulated value of the first row sub-pixels is the theoretical maximum value Lmax, then the positive polarity offset generated by the common voltage VCOM is the maximum. The timing controller 210 divides the intensity of the intensity identification signal into 4 levels, and outputs a corresponding intensity identification signal according to the relationship between the polarity gray-scale accumulated value L and the maximum value Lmax, with the following specific rules:

in this embodiment, the intensity identification signal includes a sub-signal a and a sub-signal B, and the signal group formed by the sub-signals A, B represents intensity parameters of the intensity identification signal and used for controlling the first control signal and the second control signal output by the control unit 221, where signal values of the sub-signals A, B each include a first voltage (e.g., 3.3V) and a second voltage (e.g., 0V).

If L is less than or equal to 0.25 XLmax, A, B are both the second voltages. At this time, the control unit 221 does not output the control signal.

If 0.25×Lmax < L is less than or equal to 0.5×Lmax, A is the second voltage, and B is the first voltage. At this time, the voltage value of the control signal output by the control unit 221 is V1, and the duration is t1.

If 0.5×Lmax < L is less than or equal to 0.75×Lmax, A is the first voltage, and B is the second voltage. At this time, the voltage value of the control signal output by the control unit 221 is V2, and the duration is t2.

If 0.75Lmax < L.ltoreq.Lmax, A, B are all the first voltages. At this time, the voltage value of the control signal output by the control unit 221 is V3, and the duration is t3.

Wherein V1< V2< V3, t1< t2< t3. Preferably, V1, V2, V3 take equal steps, for example 7V, 8V, 9V respectively. t1, t2, t3 are also valued at equal steps, for example 1us, 2us, 3us respectively. Of course, in other embodiments, the intensity parameter of the control signal may be divided into fewer or more levels, such as 2, 8, and not limited herein. It should be noted that, when the polarity gray scale accumulated value of the first row of sub-pixels is a negative value, the principle is similar, and the description is omitted here.

Therefore, as the offset of the common voltage VCOM increases, the negative feedback adjustment strength of the operational amplifier OP also increases, so that the adjustment amount of the common voltage VCOM is matched with the offset, the situation of overcompensation or undercompensation is avoided, and the adjustment effect is better.

Referring to fig. 5, based on the same inventive concept, the present application also provides a common voltage adjusting method applied to a driving circuit of a display panel for adjusting a common voltage of the display panel including a plurality of rows of sub-pixels, the method comprising the steps of:

in step 601, an image signal is received, and a polarity and a gray scale value corresponding to each sub-pixel P in the current frame image signal are determined.

Step 602, subtracting the accumulated value of the gray scale value of each negative polarity subpixel from the accumulated value of the gray scale value of each positive polarity subpixel in the same row to obtain a polar gray scale accumulated value.

And 603, generating a polarity offset signal when the polarity gray scale accumulated value is not within a preset threshold value range.

Step 604, generating a corresponding feedback signal according to the polarity shift signal.

Step 605, comparing the feedback signal with a preset common voltage signal Vref, and performing negative feedback adjustment on the common voltage according to the comparison result, so that the voltage value of the common voltage received by each sub-pixel P approaches to the preset common voltage value Vref corresponding to the preset common voltage signal Vref.

In an embodiment of the present application, the method further includes:

And when the polarity gray scale accumulated value is within a preset threshold value range, outputting a common voltage VCOM with a voltage value equal to the preset common voltage value VREF.

Specifically, referring to fig. 6, fig. 6 is a flow chart of another common voltage adjusting method according to an embodiment of the present application. In this embodiment, the polarity offset signal includes a positive polarity offset signal and a negative polarity offset signal, the preset threshold range includes an upper threshold and a lower threshold, and the feedback signal includes a first feedback signal and a second feedback signal, where the upper threshold is greater than or equal to the lower threshold. The method comprises the following steps:

Step 6031, judging whether the polarity gray scale accumulated value is within a preset threshold value range. If the polarity gray scale accumulated value is within the preset threshold value range, step 6032 is executed. Otherwise, step 6033 is performed.

In step 6032, the output voltage value is equal to the common voltage VCOM of the preset common voltage value VREF.

Step 6033, judging whether the polarity gray scale accumulated value is larger than an upper threshold value of the preset threshold value range. If the polarity gray-scale accumulated value is greater than the upper threshold value, step 6034 is performed. Otherwise, step 6037 is performed.

Step 6034, generating a positive electrode offset signal.

Step 6035, generating the first feedback signal.

In step 6036, the voltage value of the output common voltage VCOM is reduced. Specifically, the first feedback signal is compared with a preset common voltage signal Vref, and the voltage value of the output common voltage VCOM is reduced according to the comparison result, so that the voltage value of the common voltage VCOM received by each sub-pixel P approaches to the preset common voltage value Vref corresponding to the preset common voltage signal Vref.

Step 6037 generates a negative offset signal.

Step 6038, generating the second feedback signal.

In step 6039, the voltage value of the output common voltage VCOM is increased. Specifically, the second feedback signal is compared with the preset common voltage signal Vref, and the voltage value of the output common voltage VCOM is increased according to the comparison result, so that the voltage value of the common voltage VCOM received by each sub-pixel P approaches to the preset common voltage value Vref corresponding to the preset common voltage signal Vref.

While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the application, the scope of which is defined by the claims and their equivalents.

Claims

1. A driving circuit of a display panel, the display panel including a plurality of rows of sub-pixels, the driving circuit comprising:

the time sequence controller is used for receiving the image signals and determining the corresponding polarity and gray scale value of each sub-pixel in the current frame image signals; the time sequence controller is also used for subtracting the accumulated value of the gray scale value of each anode sub-pixel from the accumulated value of the gray scale value of each cathode sub-pixel in the same row to obtain a polar gray scale accumulated value, and outputting a polar offset signal when the polar gray scale accumulated value is not within a preset threshold value range;

the feedback module is electrically connected with the time sequence controller and is used for outputting corresponding feedback signals according to the polarity deviation signals; and

the public voltage generation module is electrically connected with the feedback module and is used for generating public voltage based on a preset public voltage signal and outputting the public voltage to each sub-pixel; the public voltage generation module is also used for comparing the preset public voltage signal with the feedback signal, and carrying out negative feedback adjustment on the public voltage output by the public voltage generation module according to the comparison result, so that the voltage value of the public voltage received by each sub-pixel approaches to the preset public voltage value corresponding to the preset public voltage signal.

2. The drive circuit of claim 1, wherein the polarity offset signal comprises a positive offset signal and a negative offset signal, the preset threshold range comprises an upper threshold and a lower threshold, the feedback signal comprises a first feedback signal and a second feedback signal, wherein the upper threshold is greater than or equal to the lower threshold;

the time sequence controller is used for outputting the positive electrode offset signal when the polarity gray scale accumulated value is larger than the upper threshold value, and outputting the negative electrode offset signal when the polarity gray scale accumulated value is smaller than the lower threshold value;

the feedback module is used for outputting the first feedback signal when the positive electrode offset signal is received and outputting the second feedback signal when the negative electrode offset signal is received;

the common voltage generating module is used for outputting a common voltage with a voltage value equal to the preset common voltage value when the feedback signal is not received, reducing the voltage value of the common voltage output by the common voltage generating module when the first feedback signal is received, and increasing the voltage value of the common voltage output by the common voltage generating module when the second feedback signal is received.

3. The driving circuit according to claim 2, wherein the common voltage generating module includes an operational amplifier having a non-inverting input for receiving the preset common voltage signal, an inverting input electrically connected to the feedback module, an inverting input for receiving the feedback signal, and an output for outputting the common voltage to each of the sub-pixels;

and the operational amplifier works in a negative feedback state when receiving the feedback signal, so that the public voltage received by each sub-pixel approaches to a preset public voltage value corresponding to the preset public voltage signal.

4. The drive circuit of claim 3, wherein the feedback module comprises:

a control unit electrically connected with the time schedule controller, and used for outputting a first control signal when the positive electrode offset signal is received and outputting a second control signal when the negative electrode offset signal is received;

a voltage input for receiving a reference voltage;

the feedback signal output end is electrically connected with the inverting input end of the operational amplifier;

The first switching tube is electrically connected between the voltage input end and the feedback signal output end, the control end of the first switching tube is also electrically connected with the control unit, and the first switching tube is used for receiving and responding to the first control signal to conduct, so that the feedback signal output end is in a high level state through the conducted first switching tube and the voltage input end, and outputs the first feedback signal; and

the second switching tube is electrically connected between the feedback signal output end and the grounding end, the control end of the second switching tube is also electrically connected with the control unit, and the second switching tube is used for receiving and responding to the second control signal to conduct, so that the feedback signal output end is in a low level state through the conducted second switching tube and the grounding end, and outputs the second feedback signal.

5. The driving circuit according to claim 4, wherein the timing controller is further configured to generate an intensity identification signal according to the magnitude of the polarity gray scale accumulated value, and output the intensity identification signal to the control unit of the feedback module, where the intensity identification signal is used to control intensity parameters of the first control signal and the second control signal output by the control unit, where the intensity parameters include a voltage value of the signal, and/or a duration of the signal;

When the polarity gray scale accumulated value is larger than the upper threshold value, the larger the difference value between the polarity gray scale accumulated value and the upper threshold value is, the smaller the voltage value of the first control signal is, and/or the longer the duration of the first control signal is; the conduction degree of the first switch tube and the voltage value of the first control signal are in negative correlation, so that the signal value of the first feedback signal and the voltage value of the first control signal are in negative correlation;

when the polarity gray scale accumulated value is smaller than the lower threshold value, the larger the difference value between the polarity gray scale accumulated value and the lower threshold value is, the larger the voltage value of the second control signal is, and/or the longer the duration of the second control signal is; the conducting degree of the second switch tube and the voltage value of the second control signal are in positive correlation, so that the voltage value of the second feedback signal and the voltage value of the second control signal are in positive correlation.

6. The drive circuit of claim 5, wherein the display panel further comprises a plurality of scan lines, each of the scan lines being electrically connected to a row of sub-pixels, the drive circuit further comprising a gate driver electrically connected to the plurality of scan lines, respectively;

The time sequence controller is also used for generating a frame starting signal, and the frame starting signal is used for starting the grid driver to scan a plurality of scanning lines line by line so as to drive the display panel to start displaying the current frame image; the time sequence controller is also used for generating and outputting a trigger signal to the feedback module according to the frame starting signal, wherein the trigger signal is used for triggering the control unit to output the first control signal or the second control signal.

7. The driving circuit according to any one of claims 4 to 6, wherein the first switching tube comprises a PMOS tube, a gate of the PMOS tube corresponds to a control terminal of the first switching tube, a source of the PMOS tube is electrically connected to the voltage input terminal, and a drain of the PMOS tube is electrically connected to the feedback signal output terminal;

the second switching tube comprises an NMOS tube, the grid electrode of the NMOS tube corresponds to the control end of the second switching tube, the source electrode of the NMOS tube is electrically connected with the grounding end, and the drain electrode of the NMOS tube is electrically connected with the feedback signal output end.

8. A display, the display comprising:

a display panel; and

The driving circuit according to any one of claims 1 to 7, electrically connected to the display panel, and configured to drive the display panel to perform light-emitting display.

9. A common voltage adjusting method applied to a driving circuit of a display panel for adjusting a common voltage of the display panel, the display panel including a plurality of rows of sub-pixels, the method comprising:

receiving image signals and determining the corresponding polarity and gray scale value of each sub-pixel in the current frame image signals;

10. The method of claim 9, wherein the polarity offset signal comprises a positive offset signal and a negative offset signal, the preset threshold range comprises an upper threshold and a lower threshold, the feedback signal comprises a first feedback signal and a second feedback signal, and wherein the upper threshold is greater than or equal to the lower threshold;

if the polarity gray scale accumulated value is smaller than the lower threshold value, generating a negative electrode offset signal;

if the polarity offset signal is a negative polarity offset signal, generating the second feedback signal;

the negative feedback adjustment of the common voltage includes: