CN211263593U - Load current sampling and conditioning circuit - Google Patents
Load current sampling and conditioning circuit Download PDFInfo
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- CN211263593U CN211263593U CN201922100400.0U CN201922100400U CN211263593U CN 211263593 U CN211263593 U CN 211263593U CN 201922100400 U CN201922100400 U CN 201922100400U CN 211263593 U CN211263593 U CN 211263593U
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Abstract
The utility model discloses a load current sampling and conditioning circuit, including operational amplifier U2D, operational amplifier U2C, its characterized in that, operational amplifier U2D's in-phase input end respectively with current transformer CT's third pin, diode D1's one end, the one end electric connection of diode, operational amplifier U2D's in-phase input end ground connection; the inverting input end of the operational amplifier U2D is electrically connected to the second pin of the current transformer CT, the other end of the diode D1, the other end of the diode, one end of the resistor R76, and one end of the capacitor C20, respectively, wherein the other end of the resistor R76 and the other end of the capacitor C20 are electrically connected to the output end of the operational amplifier U2D; the utility model discloses current load current sampling and conditioning circuit have been solved and have been not suitable for in the low voltage electric wire netting to the technical problem that the noise is high.
Description
Technical Field
The utility model relates to a load current sampling and conditioning circuit.
Background
The sampling circuit has an analog signal input, a control signal input, and an analog signal output. The circuit functions to receive an input voltage at a given time and hold the voltage at the output until the next sampling begins. The sampling circuit is usually composed of an analog switch, a holding capacitor and a non-inverting circuit with a unity gain of 1. The sampling operates in one of two states, a sample state and a hold state. In the sampling state, the switch is turned on, which tracks the level change of the analog input signal as fast as possible until the arrival of the hold signal; in the hold state, the switch is opened and the tracking process is stopped, which keeps the instantaneous value of the input signal until the switch is opened.
Signal conditioning simply means converting various signals detected by the sensing element into standard signals. The signal conditioning in the digital input channel mainly comprises jitter elimination, filtering, protection, level conversion, isolation and the like. Signal conditioning converts your data acquisition device into a complete set of data acquisition systems by helping you connect directly to a wide range of sensors and signal types (from thermocouples to high voltage signals). The critical signal conditioning techniques can improve the overall performance and accuracy of the data acquisition system by a factor of 10. The signal conditioning is simple to say that the signal to be measured is converted into a standard signal which can be identified by the acquisition equipment through operations such as amplification, filtering and the like. It uses internal circuits (such as filter, converter, amplifier, etc. …) to change the input signal type and output it. Since some industrial signals are high voltage, overcurrent, surge, etc., which cannot be correctly identified by the system, they must be conditioned for cleaning.
The existing load current sampling and conditioning circuit is not suitable for a low-voltage power grid and has high noise.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is that current load current sampling and conditioning circuit are not suitable for in the low voltage electric wire netting to the technical problem that the noise is high provides a load current sampling and conditioning circuit.
In order to solve the technical problem, the utility model provides a following technical scheme:
a load current sampling and conditioning circuit comprises an operational amplifier U2D and an operational amplifier U2C, wherein the non-inverting input end of the operational amplifier U2D is electrically connected with a third pin of a current transformer CT, one end of a diode D1 and one end of a diode respectively, and the non-inverting input end of the operational amplifier U2D is grounded; the inverting input end of the operational amplifier U2D is electrically connected to the second pin of the current transformer CT, the other end of the diode D1, the other end of the diode, one end of the resistor R76, and one end of the capacitor C20, respectively, wherein the other end of the resistor R76 and the other end of the capacitor C20 are electrically connected to the output end of the operational amplifier U2D; the non-inverting input terminal of the operational amplifier U2C is electrically connected to one terminal of a resistor R84 and one terminal of a resistor R89, respectively, wherein the other terminal of the resistor R84 is electrically connected to the output terminal of the operational amplifier U2D, the inverting input terminal of the operational amplifier U2C is electrically connected to one terminal of a resistor R83 and one terminal of a resistor R92, respectively, and the other terminal of the resistor R92 is electrically connected to the output terminal of the operational amplifier U2C.
Preferably, the positive power terminal of the operational amplifier U2D is connected to +8V voltage, and the negative power terminal of the operational amplifier U2D is connected to-8V voltage.
Preferably, the other end of the resistor R89 is grounded.
Preferably, the other end of the resistor R83 is grounded.
Preferably, the diode D1 is connected in parallel with the diode.
The utility model discloses the beneficial effect who reaches is:
the utility model selects the current transformer CT with model HWGS-9, the secondary side output is transmitted to AD7865AS-1 for analog-to-digital conversion through a high-speed switch diode (BAV99SM), current-voltage conversion and an in-phase proportion operation circuit, and is transmitted to a DSP (TMS320F28335) controller, the controller separates fundamental wave components, extracts all harmonic waves and processes the harmonic waves; the controller can compare the collected harmonic components with the compensation current sent by GetWave, carry out algorithm logic calculation, output the comparison difference value as a real-time compensation signal to the driving current, trigger the IGBT converter to generate harmonic current with the same magnitude as the load harmonic current and with the opposite phase, and inject the harmonic current into the power grid, so as to realize the function of filtering harmonic; the utility model is suitable for an among the low voltage electric wire netting to the noise is low.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the invention and not to limit the invention.
In the drawings:
fig. 1 is a circuit diagram of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are presented herein only to illustrate and explain the present invention, and not to limit the present invention.
As shown in fig. 1, a load current sampling and conditioning circuit includes an operational amplifier U2D and an operational amplifier U2C, wherein a non-inverting input terminal of the operational amplifier U2D is electrically connected to a third pin of a current transformer CT, one terminal of a diode D1 and one terminal of a diode, respectively, the non-inverting input terminal of the operational amplifier U2D is grounded, and the diode D1 is connected in parallel with the diode; the inverting input end of the operational amplifier U2D is electrically connected to the second pin of the current transformer CT, the other end of the diode D1, the other end of the diode, one end of the resistor R76, and one end of the capacitor C20, respectively, wherein the other end of the resistor R76 and the other end of the capacitor C20 are electrically connected to the output end of the operational amplifier U2D; the positive power supply end of the operational amplifier U2D is connected with +8V voltage, and the negative power supply end of the operational amplifier U2D is connected with-8V voltage; the non-inverting input end of the operational amplifier U2C is electrically connected to one end of a resistor R84 and one end of a resistor R89, respectively, wherein the other end of the resistor R84 is electrically connected to the output end of the operational amplifier U2D, and wherein the other end of the resistor R89 is grounded; the inverting input terminal of the operational amplifier U2C is electrically connected to one end of the resistor R83 and one end of the resistor R92, respectively, wherein the other end of the resistor R83 is grounded, and wherein the other end of the resistor R92 is electrically connected to the output terminal of the operational amplifier U2C.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (5)
1. A load current sampling and conditioning circuit comprises an operational amplifier U2D and an operational amplifier U2C, and is characterized in that a non-inverting input end of the operational amplifier U2D is electrically connected with a third pin of a current transformer CT, one end of a diode D1 and one end of a diode respectively, and the non-inverting input end of the operational amplifier U2D is grounded; the inverting input end of the operational amplifier U2D is electrically connected to the second pin of the current transformer CT, the other end of the diode D1, the other end of the diode, one end of the resistor R76, and one end of the capacitor C20, respectively, wherein the other end of the resistor R76 and the other end of the capacitor C20 are electrically connected to the output end of the operational amplifier U2D; the non-inverting input terminal of the operational amplifier U2C is electrically connected to one terminal of a resistor R84 and one terminal of a resistor R89, respectively, wherein the other terminal of the resistor R84 is electrically connected to the output terminal of the operational amplifier U2D, the inverting input terminal of the operational amplifier U2C is electrically connected to one terminal of a resistor R83 and one terminal of a resistor R92, respectively, and the other terminal of the resistor R92 is electrically connected to the output terminal of the operational amplifier U2C.
2. The load current sampling and conditioning circuit of claim 1, wherein: the positive power supply end of the operational amplifier U2D is connected with +8V voltage, and the negative power supply end of the operational amplifier U2D is connected with-8V voltage.
3. The load current sampling and conditioning circuit of claim 1, wherein: the other end of the resistor R89 is grounded.
4. The load current sampling and conditioning circuit of claim 1, wherein: the other end of the resistor R83 is grounded.
5. The load current sampling and conditioning circuit of claim 1, wherein: the diode D1 is connected in parallel with the diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922100400.0U CN211263593U (en) | 2019-11-29 | 2019-11-29 | Load current sampling and conditioning circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922100400.0U CN211263593U (en) | 2019-11-29 | 2019-11-29 | Load current sampling and conditioning circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211263593U true CN211263593U (en) | 2020-08-14 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922100400.0U Active CN211263593U (en) | 2019-11-29 | 2019-11-29 | Load current sampling and conditioning circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211263593U (en) |
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2019
- 2019-11-29 CN CN201922100400.0U patent/CN211263593U/en active Active
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