CN212514771U - Collection voltage processing device - Google Patents
Collection voltage processing device Download PDFInfo
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- CN212514771U CN212514771U CN202020809271.2U CN202020809271U CN212514771U CN 212514771 U CN212514771 U CN 212514771U CN 202020809271 U CN202020809271 U CN 202020809271U CN 212514771 U CN212514771 U CN 212514771U
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Abstract
The utility model discloses a collected voltage processing device, which collects the low-end voltage of a load by a low-end resistor, wherein the first end of the low-end resistor is connected with the load, and the second end of the low-end resistor is grounded; the low-end resistor is connected with the input end of the first voltage amplifying circuit, and the output end of the first voltage amplifying circuit is connected with the voltage receiver; the first voltage amplifying circuit amplifies the load low-end voltage collected by the low-end resistor and inputs the amplified load low-end voltage to the voltage receiver. The device can effectively improve the detection sensitivity and precision, can simultaneously detect low-end voltage and high-end voltage, comprehensively detect the voltage, has simple structure and high efficiency, and is applicable to each line of a server through which a plurality of currents pass.
Description
Technical Field
The field relates to a voltage acquisition circuit, in particular to a processing device for acquiring voltage.
Background
The acquisition voltage circuit has an analog signal input, a control signal input and an analog signal output. The circuit functions to receive an input voltage at a given time and hold the voltage at the output until the next sampling begins. The sampling circuit usually has an analog switch, which is turned on in the sampling state, and which tracks the level change of the analog input signal as fast as possible until the arrival of the hold signal; in the hold state, the switch is opened and the tracking process is stopped, which keeps the instantaneous value of the input signal until the switch is opened. In the prior art, when a resistor is used for collecting voltage, the resistor voltage is directly used as an input signal for detection, and the sensitivity and the precision are not high.
Disclosure of Invention
In order to solve the problem, the utility model provides a gather voltage processing apparatus, to resistance collection voltage processing back input detection end, improve sensitivity and precision.
The technical scheme of the utility model is that: a collected voltage processing device collects the low-end voltage of a load through a low-end resistor, wherein the first end of the low-end resistor is connected with the load, and the second end of the low-end resistor is grounded;
the low-end resistor is connected with the input end of the first voltage amplifying circuit, and the output end of the first voltage amplifying circuit is connected with the voltage receiver; the first voltage amplifying circuit amplifies the load low-end voltage collected by the low-end resistor and inputs the amplified load low-end voltage to the voltage receiver.
Further, the first voltage amplifying circuit includes a resistor R1Resistance R2Resistance R3Resistance R4A first amplifier U1;
the first terminal of the low-terminal resistor passes through a resistor R2The positive input end of the first amplifier U1 is connected; resistance R1One end of the first switch is connected with the positive input end of the first amplifier U1, and the other end of the first switch is connected with the ground; the second end of the low-end resistor passes through a resistor R3The negative input end of the first amplifier U1 is connected; resistance R4One is connected with the negative input end of the first amplifier U1, and the other is connected with the output end of the first amplifier U1; the output of the first amplifier U1 is connected to a voltage receiver.
Further, a high-end resistor is used for collecting high-end voltage of a load, the first end of the high-end resistor is connected with the load, and the second end of the high-end resistor is connected with a power supply voltage;
the device also comprises a second voltage amplifying circuit;
the high-end resistor is connected with the input end of the second voltage amplifying circuit, and the output end of the second voltage amplifying circuit is connected with the voltage receiver; the second voltage amplifying circuit amplifies the load high-end voltage collected by the high-end resistor and inputs the amplified load high-end voltage to the voltage receiver.
Further, the second voltage amplifying circuit includes a resistor R5Resistance R6Resistance R7Resistance R8A second amplifier U2;
the first end of the high-end resistor passes through the resistor R5The negative input end of the second amplifier U2 is connected; resistance R6One end of the first amplifier is connected with the negative input end of the second amplifier U2, and the other end of the first amplifier is connected with the output end of the second amplifier U2; the output end of the second amplifier U2 is connected with a voltage receiver; the second end of the high-end resistor passes through the resistor R7The positive input end of the second amplifier U2 is connected; resistance R8One end is connected to the positive input of a second amplifier U2 and the other end is connected to ground.
Further, the second amplifier U2 is an LMV321 voltage amplifying chip.
Further, the voltage receiver is a BMC chip.
The utility model provides a pair of gather voltage processing apparatus sets up voltage amplification circuit, and input voltage receiver carries out voltage detection after handling the voltage amplification to gathering resistance, can effectively improve detectivity and precision. And the device can simultaneously detect the low-end voltage and the high-end voltage and comprehensively detect the voltage. The device has the advantages of structural detection, high efficiency and applicability to various lines of a server through which a plurality of currents pass.
Drawings
Fig. 1 is a schematic diagram of a low-side resistor acquisition voltage processing circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of the voltage processing circuit for high-end resistor acquisition according to the embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings by way of specific examples, which are illustrative of the present invention and are not limited to the following embodiments.
This embodiment provides a processing apparatus for collecting voltage, which comprises a low-end resistor RDCollecting the low-end voltage and low-end resistance R of the load 1DIs connected to the load 1, and a low-side resistor RDThe second terminal of (a) is grounded. Note that the low-side resistor RDIs connected to the load 1 through an analog switch Q1, the analog switch Q1 controlling the sampling state.
As shown in fig. 1, the apparatus includes a first voltage amplifying circuit, a voltage receiver 2. Low side resistor RDThe output end of the first voltage amplifying circuit is connected with the voltage receiver 2; the first voltage amplifying circuit connects the low-side resistor RDThe collected low-end voltage of the load 1 is amplified and then input into the voltage receiver 2.
The first voltage amplifying circuit comprises a resistor R1Resistance R2Resistance R3Resistance R4And a first amplifier U1.
Low side resistor RDThrough a resistor R2The positive input end of the first amplifier U1 is connected; resistance R1One end of the first switch is connected with the positive input end of the first amplifier U1, and the other end of the first switch is connected with the ground; low side resistor RDThrough a resistor R3The negative input end of the first amplifier U1 is connected; resistance R4One is connected with the negative input end of the first amplifier U1, and the other is connected with the output end of the first amplifier U1; the output of the first amplifier U1 is connected to the voltage receiver 2.
The final purpose of detecting the current is to obtain V in FIG. 1OUT1And V11、V12The detection principle is analyzed as follows:
according to the virtual break characteristic of the first amplifier U1, (V)11-V1+）/R2=V1+/R1;
According to the pseudo-short characteristic of the first amplifier U1, (V)12-V1-）/R3=（V1--VOUT1）/R4，V1+=V1-；
Usually there is R when using the circuit1=R4、R2=R3；
From the above equations, V can be obtainedOUT1 = (V11-V12)*R1/R2；
In addition, V11-V12=I1*RD;
Therefore, I1 =VOUT1*R2/(R1*RD)。
As shown in FIG. 2, the voltage acquisition and processing device of this embodiment uses a high-end resistor RGCollecting load 1 high-end voltage, high-end resistor RGIs connected to the load 1, a high-end resistance RGIs connected to the supply voltage. It should be noted that the load 1 is grounded through an analog switch Q2, and the analog switch Q2 controls the sampling state.
The apparatus also includes a second voltage amplification circuit. High-end resistance RGIs connected with the input end of the second voltage amplifying circuit, and the output end of the second voltage amplifying circuit is connected with the voltage receiver 2; the second voltage amplifying circuit amplifies the high-end resistor RGThe collected high-end voltage of the load 1 is amplified and then input into the voltage receiver 2.
The second voltage amplifying circuit comprises a resistor R5Resistance R6Resistance R7Resistance R8And a second amplifier U2.
High-end resistance RGThrough a resistor R5The negative input end of the second amplifier U2 is connected; resistance R6One end of the first amplifier is connected with the negative input end of the second amplifier U2, and the other end of the first amplifier is connected with the output end of the second amplifier U2; the output end of the second amplifier U2 is connected with the voltage receiver 2; high-end resistance RGThrough a resistor R7The positive input end of the second amplifier U2 is connected; resistance R8One end is connected to the positive input of a second amplifier U2 and the other end is connected to ground.
The final purpose of detecting the current is to obtain V in FIG. 2OUT2And V21、V22The detection principle is analyzed as follows:
according to the firstVirtual break characteristic of an amplifier U2, (V)22-V2+）/R7=V2+/R8;
According to the pseudo-short characteristic of the first amplifier U2, (V)21-V2-）/R5=（V2--VOUT2）/R6，V2+=V2-；
Usually there is R when using the circuit6=R8、R5=R7；
From the above equations, V can be obtainedOUT2 = (V22-V21)*R6/R5；
In addition, V22-V21=I2*RG;
Therefore, I 2 =VOUT2*R5/(R6*RG)。
In this embodiment, the second amplifier U2 may be an LMV321 voltage amplifying chip. The voltage receiver 2 is a BMC chip, and the output voltage of the amplifying circuit is sampled by an analog-to-digital conversion circuit of the BMC chip.
The above disclosure is only for the preferred embodiments of the present invention, but the present invention is not limited thereto, and any person skilled in the art can think of the inventive changes, and several improvements and decorations made without departing from the principle of the present invention should fall within the protection scope of the present invention.
Claims (6)
1. A collected voltage processing device collects the low-end voltage of a load through a low-end resistor, the first end of the low-end resistor is connected with the load, and the second end of the low-end resistor is grounded;
the low-end resistor is connected with the input end of the first voltage amplifying circuit, and the output end of the first voltage amplifying circuit is connected with the voltage receiver; the first voltage amplifying circuit amplifies the load low-end voltage collected by the low-end resistor and inputs the amplified load low-end voltage to the voltage receiver.
2. According toThe collected voltage processing apparatus according to claim 1, wherein the first voltage amplifying circuit includes a resistor R1Resistance R2Resistance R3Resistance R4A first amplifier U1;
the first terminal of the low-terminal resistor passes through a resistor R2The positive input end of the first amplifier U1 is connected; resistance R1One end of the first switch is connected with the positive input end of the first amplifier U1, and the other end of the first switch is connected with the ground; the second end of the low-end resistor passes through a resistor R3The negative input end of the first amplifier U1 is connected; resistance R4One is connected with the negative input end of the first amplifier U1, and the other is connected with the output end of the first amplifier U1; the output of the first amplifier U1 is connected to a voltage receiver.
3. The collected voltage processing device according to claim 1 or 2, wherein a high-end resistor is used for collecting a high-end voltage of the load, a first end of the high-end resistor is connected with the load, and a second end of the high-end resistor is connected with the supply voltage;
the device also comprises a second voltage amplifying circuit;
the high-end resistor is connected with the input end of the second voltage amplifying circuit, and the output end of the second voltage amplifying circuit is connected with the voltage receiver; the second voltage amplifying circuit amplifies the load high-end voltage collected by the high-end resistor and inputs the amplified load high-end voltage to the voltage receiver.
4. The device of claim 3, wherein the second voltage amplifying circuit comprises a resistor R5Resistance R6Resistance R7Resistance R8A second amplifier U2;
the first end of the high-end resistor passes through the resistor R5The negative input end of the second amplifier U2 is connected; resistance R6One end of the first amplifier is connected with the negative input end of the second amplifier U2, and the other end of the first amplifier is connected with the output end of the second amplifier U2; the output end of the second amplifier U2 is connected with a voltage receiver; the second end of the high-end resistor passes through the resistor R7The positive input end of the second amplifier U2 is connected; resistance R8One end of the first amplifier is connected with the positive input end of a second amplifier U2, and the other end of the first amplifier is connected with the positive input end of the second amplifier U2One end is grounded.
5. The device as claimed in claim 4, wherein the second amplifier U2 is LMV321 voltage amplification chip.
6. The device of claim 1, 2, 4 or 5, wherein the voltage receiver is a BMC chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020809271.2U CN212514771U (en) | 2020-05-15 | 2020-05-15 | Collection voltage processing device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020809271.2U CN212514771U (en) | 2020-05-15 | 2020-05-15 | Collection voltage processing device |
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| CN212514771U true CN212514771U (en) | 2021-02-09 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114236226A (en) * | 2021-12-20 | 2022-03-25 | 上海瑞浦青创新能源有限公司 | Voltage measurement circuit |
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- 2020-05-15 CN CN202020809271.2U patent/CN212514771U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114236226A (en) * | 2021-12-20 | 2022-03-25 | 上海瑞浦青创新能源有限公司 | Voltage measurement circuit |
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