CN211088282U - Fast recovery diode - Google Patents
Fast recovery diode Download PDFInfo
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- CN211088282U CN211088282U CN201922050171.6U CN201922050171U CN211088282U CN 211088282 U CN211088282 U CN 211088282U CN 201922050171 U CN201922050171 U CN 201922050171U CN 211088282 U CN211088282 U CN 211088282U
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Abstract
The utility model provides a fast recovery diode relates to semiconductor technology field. Wherein, fast recovery diode includes: a wafer; the cell area is arranged on the wafer and comprises first ion parts and second ion parts, the first ion parts are distributed at intervals along a preset direction, and the second ion parts are arranged between every two adjacent first ion parts. The first ion part and the second ion part are arranged in the cell area, wherein the first ion part and the second ion part can be doped ion types with different concentrations, and main junction areas distributed between the first ion part and the second ion part are formed, so that the advantages of the fast recovery diode under the ion concentration of the first ion part and the advantages of the fast recovery diode under the ion concentration of the second ion part can be taken into consideration, and the performance of the fast recovery diode is effectively improved.
Description
Technical Field
The utility model relates to the field of semiconductor technology, particularly, relate to a fast recovery diode.
Background
Along with the progress of technology and the development of society, the power consumption is larger and larger, and the demand on power electronic devices is larger and larger for realizing green sustainable development; among them, the power semiconductor device is the mainstream device in the field of power electronics, and is a key device for controlling strong electricity by weak electricity. The power semiconductor device is widely applied to various power control circuits, driving circuits and other circuits, and has irreplaceable effects in the fields of various variable frequency motors, photovoltaic inversion, smart power grids, new energy automobiles, electric locomotives, traction driving and the like.
The power semiconductor device mainly includes: GTOs (thyristors), IGBTs (insulated gate bipolar transistors), power MOSFETs (metal oxide semiconductor field effect transistors), FRDs (fast recovery diodes), and the like.
A cell region of a conventional FRD (fast recovery diode) generally has only one main junction, as shown in fig. 1, there is no repeated cell unit, so that a fast recovery diode device is also limited to only one main junction, and one main junction can only focus on one characteristic of the device, so that the performance of the fast recovery diode device cannot be improved well.
SUMMERY OF THE UTILITY MODEL
For solving the relatively poor technical problem of fast recovery diode device performance among the prior art, the utility model aims to provide a can effectively promote the fast recovery diode of performance.
An embodiment of the utility model provides a fast recovery diode, include:
a wafer;
the cell area is arranged on the wafer and comprises first ion parts and second ion parts, the first ion parts are distributed at intervals along a preset direction, and the second ion parts are arranged between every two adjacent first ion parts.
Further, in a preferred embodiment of the present invention, the wafer includes: the cell structure comprises a substrate layer and an epitaxial layer formed on the surface of the substrate layer, wherein the cell area is formed on one side, away from the substrate layer, of the epitaxial layer, and the cell area extends along the direction from the epitaxial layer to the substrate layer.
Further, in a preferred embodiment of the present invention, an arc-shaped groove is disposed on a surface of the epitaxial layer between two adjacent first ion portions, and the second ion portion is disposed in the arc-shaped groove.
Further, in a preferred embodiment of the present invention, the first ion portion extends a distance greater than the second ion portion.
Further, in a preferred embodiment of the present invention, the first ion portion includes heavily doped P-type ions, and the second ion portion includes lightly doped P-type ions.
Further, in a preferred embodiment of the present invention, the epitaxial layer includes a first epitaxial layer and a second epitaxial layer sequentially disposed on the surface of the substrate, and the cell region is formed on the second epitaxial layer.
The embodiment of the utility model provides a pair of fast recovery diode is provided with first ion subtotal second ion subtotal in the cell district, wherein, first ion subtotal second ion part can be for the doping ion type that concentration is different, form first ion subtotal second ion part interval distribution's main junction region, can compromise fast recovery diode's advantage under the first ion part ion concentration from this, fast recovery diode's advantage under the second ion part concentration, effectively improve fast recovery diode's performance.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is a schematic diagram of a prior art fast recovery diode;
fig. 2 is a schematic structural diagram of a fast recovery diode according to an embodiment of the present invention.
Reference numerals:
1. the semiconductor device comprises a wafer, 11, a substrate layer, 12, a first epitaxial layer, 13, a second epitaxial layer, 2, a terminal region, 3, a cell region, 31, a first ion part, 32, a second ion part, 4, an oxide layer, 5 and a metal layer.
Detailed Description
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and that for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
As shown in fig. 1, a conventional power semiconductor device generally includes a termination region 2(Terminal) and a Cell region 3(Cell), and the termination region 2 is mainly used to improve a fringe electric field and to improve a lateral breakdown voltage of the device. In FRD (fast recovery diode), the cell region 3 is generally only a main junction, and there is no repetitive cell unit.
Research shows that the fast recovery diode device in the prior art is limited to only one main junction (main junction), and if the Vf (conduction voltage drop) is lower, a heavily doped and deep P-type junction is needed; if the good switching characteristic is realized, a lightly doped and shallow junction deep P-type junction is needed; the two implementation modes are contradictory, and in order to balance the device performance in the prior art, a mode of performance compromise is often adopted, and the performance of two parameters cannot be improved at the same time.
As shown in fig. 2, an embodiment of the present invention provides a fast recovery diode, including: a wafer 1; the cell region 3 is disposed on the wafer 1, the cell region 3 includes first ion parts 31 and second ion parts 32, the first ion parts 31 are distributed at intervals along a predetermined direction, and the second ion part 32 is disposed between two adjacent first ion parts 31. The embodiment of the present invention provides a fast recovery diode, which is provided with a first ion portion 31 and a second ion portion 32 in a cell region 3, wherein the first ion portion 31 and the second ion portion 32 can be doped ion types with different concentrations, and a main junction region (cell region 3) is formed in which the first ion portion 31 and the second ion portion 32 are alternately distributed, so that the advantages of the fast recovery diode under the ion concentration of the first ion portion 31 and the advantages of the fast recovery diode under the ion concentration of the second ion portion 32 can be considered, and the performance of the fast recovery diode can be effectively improved.
In this embodiment, the predetermined direction is a radial direction of the silicon wafer 1.
As shown in fig. 2, the silicon wafer 1 includes: the cell structure comprises a substrate layer 11 and an epitaxial layer formed on the surface of the substrate layer 11, wherein a cell area 3 is formed on one side of the epitaxial layer, which is far away from the substrate layer 11, and the cell area 3 extends along the direction from the epitaxial layer to the substrate layer 11. The substrate layer 11 is a semiconductor silicon epitaxial substrate layer 11, and parameters such as the thickness, the resistivity and the like of the substrate layer 11 are different according to the voltage withstanding requirements of different products; in this embodiment, the epitaxial layer is of a double-layer epitaxial structure, that is, the epitaxial layer includes a first epitaxial layer 12 and a second epitaxial layer 13 that are sequentially disposed on the surface of the substrate layer 11; on a silicon wafer (N + Sub)11, growing a first epitaxial layer (N Buffer)12 structure, and then growing a second epitaxial layer (N-EPI)13 structure; an oxide layer 4 is then grown on the second epitaxial layer 13, and the cell region 3 and the termination region 2 are both formed on the second epitaxial layer 13.
As shown in fig. 2, in the present embodiment, the first ion portion 31 extends a distance greater than the second ion portion 32, that is, the thickness of the doped region of the first ion portion 31 is greater than the thickness of the doped region of the second ion portion 32 in the axial direction of the wafer 1. When the first ion portion 31 includes heavily doped P-type ions and the second ion portion 32 includes lightly doped P-type ions, the first ion portion 31 forms heavily doped deep P-type ions and the second ion portion 32 forms lightly doped shallow P-type ions according to the extension distance. Therefore, the fast recovery diode provided in the embodiment has the dual advantages of lower Vf (conduction loss) of the heavily doped deep P-type junction and better switching characteristics of the lightly doped shallow P-type junction, and effectively improves the performance of the device.
The heavy doping and the light doping are directed at different concentrations of impurities doped in ions, and the heavy doping refers to a doping mode which is usually adopted by a person skilled in the art because the amount of the impurities doped in a semiconductor material is large.
In this embodiment, an arc groove is etched on the surface of the epitaxial layer between two adjacent first ion portions 31 or the surface of the epitaxial layer is etched into a bowl-shaped surface, a second ion portion 32 is disposed in the arc groove, and the second ion portion 32 is formed by implanting second ions into the arc groove. The cellular region 3 of the fast recovery diode adopts a cellular region 3 structure combining a heavily doped deep P-type junction and a lightly doped shallow P-type junction, and the lightly doped shallow P-type junction adopts an ion doping distribution mode similar to an arc structure.
The utility model discloses another embodiment provides a fast recovery diode's manufacturing method, including following step:
s101, a first ion portion 31 (heavily doped P-type ion portion) is grown on the wafer 1.
S102, etching the wafer 1 by adopting a preset process to form an etching groove between two adjacent first ion parts 31; etching the wafer 1 by adopting a preset process, comprising the following steps of: the surface of the substrate layer 11 is etched by wet etching or dry isotropic silicon etching of silicon.
And S103, implanting second ions (lightly doped P-type ions) into the etching groove to form a second ion part.
The utility model discloses the manufacturing method of the fast recovery diode that other embodiments provided, including following step:
s201, growing a first epitaxial layer 12 on the surface of the substrate layer 11.
And S202, growing a second epitaxial layer 13 on the side, away from the substrate layer 11, of the first epitaxial layer 12.
And S203, growing an oxide layer 4 on the side, far away from the substrate layer 11, of the second epitaxial layer 13.
S204, the oxide layer 4 is etched, and a first ion portion 31 (heavily doped P-type ion portion) is grown in the predetermined region.
S205, etching is performed on the wafer 1 by using a predetermined process to form an etching groove between two adjacent first ion portions 31.
And S206, implanting second ions (lightly doped P-type ions) into the etching groove to form a second ion part.
The embodiment of the utility model provides a fast recovery diode cell region 3 domain structure can match different terminal structure, add field plate structure, junction terminal extension structure (JTE), transversely become doping structure (V L D) etc. like field limiting ring structure, field limiting ring, the utility model discloses an embodiment only explains with regard to a condition in cell structure field limiting ring adds field plate structure, as shown in FIG. 2, the manufacturing method of the fast recovery diode in this embodiment, include following step:
and S301, growing a first epitaxial layer 12 on the surface of the substrate layer 11.
And S302, growing a second epitaxial layer 13 on the side, far away from the substrate layer 11, of the first epitaxial layer 12.
And S303, growing an oxide layer 4 on one side of the second epitaxial layer 13 far away from the substrate layer 11.
And S304, coating photoresist on the oxide layer 4, exposing and developing the photoresist by using a mask, photoetching and etching the terminal region 2, and performing ion implantation and trap (activation) of the terminal region 2 on an implantation window formed by etching.
S305, carrying out active area photoetching and etching: coating photoresist on the oxide layer 4 corresponding to the cellular region 3, and exposing and developing the photoresist by using a first mask; etching the oxide layer 4, implanting first ions (heavily doped deep P-type ions) into a plurality of first implantation windows (namely, in a preset region) which are formed by etching and distributed at intervals to form a first ion part 31, and performing trap pushing (activation);
the shape of the first mask involved in this step may be set to be the same as the distribution of the first ion portions 31, that is, the first mask is set to have a plurality of first annular openings distributed at intervals, each first annular opening corresponds to one first implantation window, so that after etching, the first implantation windows are implanted with first ions.
S306, coating photoresist on the oxide layer 4, and carrying out exposure development on the photoresist by using a mask; etching to form a plurality of second injection windows distributed at intervals, wherein each second injection window is positioned between every two adjacent first injection windows in the step S305;
simultaneously, etching the surface of the substrate layer 11 of the wafer 1 by adopting a wet etching process or a dry isotropic silicon etching process of silicon, and forming a bowl-mouth-shaped etching groove on the surface of the substrate layer 11 between two adjacent first ion parts 31;
the shape of the second mask plate involved in the step is complementary to the shape of the first mask plate in the step S305, that is, the second mask plate has a plurality of second annular openings distributed at intervals, and each second annular opening is correspondingly located between every two first annular openings on the first mask plate; each second annular opening corresponds to one second injection window, so that second ions are injected into the second injection windows after etching.
S307, implanting second ions (lightly doped shallow P-type ions) into the etching trench to form a second ion portion 32; and the lightly doped shallow P-type ions are driven (activated).
S308, photoetching and etching the stop ring by adopting a conventional technical means in the field of power semiconductor devices; and the injection and trapping of the ring-cut ions are performed.
And S309, depositing a dielectric layer by adopting a conventional technical means in the field of power semiconductor devices.
And S310, performing contact hole photoetching and etching by adopting a conventional technical means in the field of power semiconductor devices.
S311, depositing the metal layer 5 by adopting a conventional technical means in the field of power semiconductor devices, and photoetching and etching the metal.
S312, depositing, photoetching and etching a passivation layer by adopting a conventional technical means in the field of power semiconductor devices; this step is not essential and is set according to the product characteristics.
In the description of the present invention, it is to be understood that the terms "upper", "lower", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. This is merely for convenience in describing the invention and to simplify the description and is not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation and is therefore not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," and "fixed" are to be construed broadly and may, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present invention can be understood according to specific situations by those skilled in the art.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (6)
1. A fast recovery diode, comprising:
a wafer (1);
the wafer structure comprises a cell area (3) arranged on the wafer (1), wherein the cell area (3) comprises first ion parts (31) and second ion parts (32), the first ion parts (31) are distributed at intervals along a preset direction, and the second ion parts (32) are arranged between every two adjacent first ion parts (31).
2. Fast recovery diode according to claim 1, characterized in that said wafer (1) comprises: the cell structure comprises a substrate layer (11) and an epitaxial layer formed on the surface of the substrate layer (11), wherein the cell area (3) is formed on one side, away from the substrate layer (11), of the epitaxial layer, and the cell area (3) extends in the direction from the epitaxial layer to the substrate layer (11).
3. Fast recovery diode according to claim 2, characterized in that the surface of the epitaxial layer between two adjacent first ion parts (31) is provided with an arc-shaped slot in which the second ion part (32) is provided.
4. Fast recovery diode according to claim 2, characterized in that said first ion portion (31) extends a distance greater than said second ion portion (32).
5. The fast recovery diode of claim 2, wherein the first ion portion (31) comprises heavily doped P-type ions and the second ion portion (32) comprises lightly doped P-type ions.
6. The fast recovery diode of claim 2, wherein the epitaxial layer comprises a first epitaxial layer (12) and a second epitaxial layer (13) sequentially disposed on the surface of the substrate layer (11), and the cell region (3) is formed on the second epitaxial layer (13).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922050171.6U CN211088282U (en) | 2019-11-22 | 2019-11-22 | Fast recovery diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922050171.6U CN211088282U (en) | 2019-11-22 | 2019-11-22 | Fast recovery diode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211088282U true CN211088282U (en) | 2020-07-24 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922050171.6U Active CN211088282U (en) | 2019-11-22 | 2019-11-22 | Fast recovery diode |
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| Country | Link |
|---|---|
| CN (1) | CN211088282U (en) |
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- 2019-11-22 CN CN201922050171.6U patent/CN211088282U/en active Active
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