CN211017079U - Structure of gallium nitride MISHEMT power device - Google Patents
Structure of gallium nitride MISHEMT power device Download PDFInfo
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- CN211017079U CN211017079U CN201920553600.9U CN201920553600U CN211017079U CN 211017079 U CN211017079 U CN 211017079U CN 201920553600 U CN201920553600 U CN 201920553600U CN 211017079 U CN211017079 U CN 211017079U
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Abstract
The utility model discloses a structure of gallium nitride MISHEMT power device, include from the supreme silicon substrate, gallium nitride circuit layer, gallium nitride barrier layer, the silicon nitride dielectric layer that combines together in proper order down, high resistant district, titanium aluminium alloy ohm channel, nickel/gold conduction region, first silicon nitride pierce through coating, first titanium/gold conductive coating, second silicon nitride pierce through coating, second titanium/gold conductive coating, third silicon nitride pierce through coating, source electrode, grid, drain electrode in addition; the silicon-based layer is made of low-resistance silicon material; the gallium nitride circuit layer is an epitaxial layer; the gallium nitride MISHEMT power device is an N-type two-dimensional electron gas channel, and a silicon-based metal oxide grid electrode contacts a high electron mobility transistor. The gallium nitride MISHEMT power device with the structure has high irradiation resistance, low leakage current in an off state, low static power consumption, low failure probability of irradiation condition and high borne breakdown voltage.
Description
Technical Field
The utility model relates to a power device's structure especially relates to a structure of gallium nitride MISHEMT power device.
Background
The traditional silicon device has low radiation resistance, high leakage current in an off state, high static power consumption, high failure probability of radiation condition and low borne breakdown voltage.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is to provide a gallium nitride MISHEMT power device's structure, the gallium nitride MISHEMT power device anti-irradiation ability of this structure is high, and leakage current when the off-state is low, and static low power dissipation, the probability of failure of the irradiation condition is low, and the breakdown voltage who bears is high.
In order to solve the technical problem, the utility model provides a structure of gallium nitride MISHEMT power device, including silicon substrate, gallium nitride circuit layer, gallium nitride barrier layer, silicon nitride dielectric layer from bottom to top combined together in proper order, the silicon nitride dielectric layer has two slots (the left slot is the source ohmic slot, the right slot is the drain ohmic slot), two the slot divide into the silicon nitride dielectric layer three-section, the area of first section the silicon nitride dielectric layer is less than the area of second section the silicon nitride dielectric layer, the area of second section the silicon nitride dielectric layer is less than the area of third section the silicon nitride dielectric layer, two be provided with titanium-aluminum alloy ohmic channel in the slot respectively, the left side upper portion of gallium nitride circuit layer, the left side of gallium nitride barrier layer, the left side of first section the silicon nitride dielectric layer forms the high resistance region through the ion implantation isolation silicon constant oxygen technology, the upper part of the right side of the gallium nitride circuit layer, the right side of the gallium nitride barrier layer and the right side of the third section of the silicon nitride dielectric layer form a high-resistance region through an ion implantation silicon-isolation constant oxygen process, the middle part of the upper surface of the second section of the silicon nitride dielectric layer is provided with a nickel/gold conductive region to the left, a first silicon nitride penetrating coating is coated on the left upper surface of the high-resistance region and stops on the right side of the third section of the silicon nitride dielectric layer, the first silicon nitride penetrating coating is positioned on the middle parts of the upper surfaces of the two titanium-aluminum alloy ohmic channels and is in a disconnected state to divide the first silicon nitride penetrating coating into three sections, a right-angle notch (the right-angle notch is a SiN mask right-angle notch) is arranged on the left upper surface of the first section of the first silicon nitride penetrating coating, the technology of silicon nitride (SiN) passivation can effectively inhibit, two grooves are arranged on the first silicon nitride penetrating coating of the second section (the groove on the left side is a Ti/Au source electrode contact electrode groove which improves the ohmic contact performance, the groove on the right side is a Ti/Au drain electrode contact electrode which improves the ohmic contact performance), the groove on the left side is arranged above the position between the titanium-aluminum alloy ohmic channel and the nickel/gold conductive region on the left side, the groove on the right side is arranged above the position between the titanium-aluminum alloy ohmic channel and the nickel/gold conductive region on the right side, the width of the groove on the left side is smaller than that of the groove on the right side, a right-angle notch (which is an SiN mask right-angle notch) is arranged on the right side of the first silicon nitride penetrating coating of the third section, and a first titanium/gold conductive coating is coated in the right-angle notch on the left side of the first silicon nitride penetrating coating of the first section and is stopped at the right side of the first silicon, the first titanium/gold conductive coating is positioned on the right side of the first silicon nitride penetrating coating, the middle part in the groove is in a disconnected state, so that the first titanium/gold conductive coating is divided into two sections, a right-angle notch is arranged on the left side of the first titanium/gold conductive coating (the right-angle notch is an SiN mask right-angle notch), two grooves are arranged in the middle of the first titanium/gold conductive coating (the left groove is a metal layer SiN source mask groove, the right groove is a metal layer SiN drain mask groove), the left groove is positioned above the first silicon nitride penetrating coating and the first silicon nitride penetrating coating, the right groove is positioned on the left side of the first silicon nitride penetrating coating, the depth of the right groove is smaller than that of the left groove, the middle of the first titanium/gold conductive coating of the second section is provided with a groove, the groove is positioned above the first silicon nitride penetrating coating of the second section and the first silicon nitride penetrating coating of the third section, the right side of the first silicon nitride penetrating coating of the third section from the left side of the first silicon nitride penetrating coating of the first section is coated with a second silicon nitride penetrating coating, the middle of the second silicon nitride penetrating coating positioned in the groove at the left side of the first titanium/gold conductive coating of the first section is in a disconnected state, the middle of the second silicon nitride penetrating coating positioned in the groove of the first titanium/gold conductive coating of the second section is in a disconnected state, so that the second silicon nitride penetrating coating is divided into three sections, and the middle of the second silicon nitride penetrating coating of the second section is provided with two grooves (the groove at the left side is an SiN source mask groove, the groove on the right side is a SiN drain mask groove), the groove on the left side is positioned above the groove on the right side of the first titanium/gold conductive coating, the groove on the right side is positioned above the groove between the first titanium/gold conductive coating and the second titanium/gold conductive coating, the groove is formed in the way that the left side of the second silicon nitride penetrating coating on the first section is slightly rightwards stopped at the third section, the second titanium/gold conductive coating is coated on the right side of the second silicon nitride penetrating coating on the third section, the middle part of the second titanium/gold conductive coating, which is positioned at the right side of the second silicon nitride penetrating coating on the second section, is in a disconnected state, so that the second titanium/gold conductive coating is divided into two sections, a right-angle notch is formed in the left side of the second titanium/gold, the root of the right-angle notch extends downwards to form a groove (the groove is a metal layer Ti/Au Drain mask groove), a right-angle notch is arranged on the right side of the first section of the second titanium/gold conductive coating (the right-angle notch is a metal layer Ti/Au Drain contact electrode right-angle notch), the left part of the first section of the second titanium/gold conductive coating is a Source, the right part of the first section of the second titanium/gold conductive coating is a grid Gate, a right-angle notch is arranged on the right side of the second section of the second titanium/gold conductive coating (the right-angle notch is a metal layer Ti/Au Drain contact electrode right-angle notch), the right part of the second section of the second titanium/gold conductive coating is formed by coating a Drain Drain on the left side of the first section of the second silicon nitride penetrating coating and on the right side of the high-resistance area with a third silicon nitride penetrating coating, the third silicon nitride penetrating coating is provided with three grooves (the groove on the left side is a Contact layer source electrode mask groove, the groove on the middle side is a Contact layer grid electrode mask groove, the groove on the right side is a Contact layer drain electrode mask groove), the third silicon nitride penetrating coating is divided into four sections by the three grooves, a right-angle notch (the right-angle notch is a source electrode grid electrode right-angle notch) is arranged on the right side of the second section of the third silicon nitride penetrating coating, and a right-angle notch (the right-angle notch is a grid electrode drain electrode right-angle notch) is arranged on the right side of the fourth silicon nitride penetrating coating.
The thickness of the silicon-based layer is 200 nm;
the thickness of the gallium nitride circuit layer is 200 nm;
the thickness of the gallium nitride barrier layer is 75 nm;
the thickness of the silicon nitride dielectric layer is 200 nm;
the groove widths of the two grooves are the same;
the groove width of the two grooves is 200 nm;
the cross section of the titanium-aluminum alloy ohmic channel is concave;
the upper parts of the two arms of the concave shape are respectively bent outwards by ninety degrees;
the high-resistance region on the left side is smaller than the high-resistance region on the right side;
the nickel/gold conductive region comprises a lower gold layer and an upper nickel layer;
the thickness of the lower gold layer is 200 nm;
the thickness of the upper nickel layer is 45 nm;
the average thickness of the first silicon nitride penetrating coating is 200 nm;
the first titanium/gold conductive coating comprises a lower gold coating and an upper titanium coating;
the average thickness of the lower gold coating is 460 nm;
the average thickness of the upper titanium coating is 400 nm;
the second silicon nitride penetrating coating has an average thickness of 400 nm;
the second titanium/gold conductive coating comprises a lower gold coating and an upper titanium coating;
the average thickness of the lower gold coating is 1900 nm;
the average thickness of the upper titanium coating is 100 nm;
the third silicon nitride through-coating 12 has an average thickness of 400 nm.
The silicon-based layer is made of low-resistance silicon material;
the gallium nitride circuit layer is an epitaxial layer;
the gallium nitride MISHEMT power device is an N-type two-dimensional electron gas channel, and a silicon-based metal oxide grid electrode contacts a high electron mobility transistor.
Compared with the prior art, the structure of the gallium nitride MISHEMT power device of the utility model has the following beneficial effects.
1. According to the technical scheme, the silicon nitride substrate, the gallium nitride circuit layer, the gallium nitride barrier layer and the silicon nitride medium layer are sequentially combined from bottom to top, the silicon nitride medium layer is provided with two grooves (the groove on the left side is a source electrode ohm groove, the groove on the right side is a drain electrode ohm groove), the silicon nitride medium layer is divided into three sections by the two grooves, the area of the silicon nitride medium layer on the first section is smaller than that of the silicon nitride medium layer on the second section, the area of the silicon nitride medium layer on the second section is smaller than that of the silicon nitride medium layer on the third section, titanium-aluminum alloy ohm channels are respectively arranged in the two grooves, a high-resistance area is formed on the upper portion on the left side of the gallium nitride circuit layer, the left side of the gallium nitride barrier layer and the left side of the silicon nitride medium layer on the first section through a silicon-oxygen isolation, The right side of the gallium nitride barrier layer and the right side of the third section of the silicon nitride medium layer form a high-resistance region through an ion implantation silicon-isolation constant oxygen process, a nickel/gold conductive region is arranged on the left side of the upper part of the second section of the silicon nitride medium layer, a first silicon nitride penetrating coating is coated on the right side of the silicon nitride medium layer starting from the left side of the high-resistance region and ending at the third section of the high-resistance region, the first silicon nitride penetrating coating is positioned on the upper middle parts of the two titanium-aluminum alloy ohmic channels and is in a disconnected state, so that the first silicon nitride penetrating coating is divided into three sections, a right-angle notch (the right-angle notch is an SiN mask right-angle notch) is formed on the left side of the first silicon nitride penetrating coating in the first section, a GaN surface trap can be effectively inhibited through a silicon nitride (SiN) passivation technology, and power additional efficiency higher than 40 percent is realized), and two grooves are formed on the first The electrode groove is contacted, so that the ohmic contact performance is improved; the groove on the right side is a Ti/Au drain contact electrode to improve ohmic contact performance), the groove on the left side is positioned above the position between the titanium-aluminum alloy ohmic channel and the nickel/gold conductive region on the left side, the groove on the right side is positioned above the position between the titanium-aluminum alloy ohmic channel and the nickel/gold conductive region on the right side, the width of the groove on the left side is smaller than that of the groove on the right side, a right-angle notch (which is an SiN mask right-angle notch) is formed in the right side of the first silicon nitride penetrating coating in the third section, a first titanium/gold conductive coating is coated in the right-angle notch in the upper side of the first silicon nitride penetrating coating from the first section, the middle part of the first titanium/gold conductive coating, which is positioned on the right side of the first silicon nitride penetrating coating in the second section, in the groove in a disconnected state to ensure that the first titanium/gold conductive coating is in the right side of the The electric coating is divided into two sections, a right-angle notch (the right-angle notch is an SiN mask right-angle notch) is arranged on the left side of the first titanium/gold conductive coating in the first section, two grooves are arranged in the middle of the first titanium/gold conductive coating in the first section (the groove on the left side is a metal layer SiN source mask groove, the groove on the right side is a metal layer SiN drain mask groove), the left-side groove is positioned above the space between the first silicon nitride penetrating coating and the second silicon nitride penetrating coating in the first section, the right-side groove is positioned above the left-side groove of the first silicon nitride penetrating coating in the second section, the depth of the right-side groove is smaller than that of the left-side groove, a groove is arranged in the middle of the first titanium/gold conductive coating in the second section, and the groove is positioned above the space between the first silicon nitride penetrating coating and the first silicon nitride penetrating coating in the, starting from the left side of the first section of the first silicon nitride penetrating coating and ending at the right side of the third section of the first silicon nitride penetrating coating, a second silicon nitride penetrating coating is coated, the middle of the second silicon nitride penetrating coating, which is positioned in a left groove of the first section of the first titanium/gold conductive coating, is in a disconnected state, the middle of the second silicon nitride penetrating coating, which is positioned in a groove of the second section of the first titanium/gold conductive coating, is in a disconnected state, so that the second silicon nitride penetrating coating is divided into three sections, two grooves are arranged in the middle of the second silicon nitride penetrating coating (the groove on the left side is an SiN source mask groove, the groove on the right side is an SiN drain mask groove), the groove on the left side is positioned above the groove on the right side of the first section of the first titanium/gold conductive coating, and the groove on the right side is positioned above the space between the first section of the first titanium/gold conductive coating and the second section of the first titanium, a second titanium/gold conductive coating is coated on the left side of the second silicon nitride penetrating coating on the first section and on the right side of the second silicon nitride penetrating coating on the third section, the middle part of the second titanium/gold conductive coating, which is positioned in the groove on the right side of the second silicon nitride penetrating coating on the second section, is in a disconnected state, so that the second titanium/gold conductive coating is divided into two sections, a right-angle notch is arranged on the left side of the second titanium/gold conductive coating on the first section (the right-angle notch is a metal layer Ti/Au source contact electrode right-angle notch), the root part of the right-angle notch extends downwards to form a groove (the groove is a metal layer Ti/Au drain mask groove), a right-angle notch is arranged on the right side of the second titanium/gold conductive coating on the first section (the right-angle notch is a metal layer Ti/Au drain contact electrode right-angle notch), the left part of the second titanium/gold conductive coating of the first section is a source S, the right part of the second titanium/gold conductive coating of the first section is a grid G, the right part of the second titanium/gold conductive coating of the second section is a right-angle notch (the right-angle notch is a metal layer Ti/Au drain Contact electrode right-angle notch), the right part of the second titanium/gold conductive coating of the second section is a drain D, the right side of the high-resistance region starting from the upper side of the left side of the second silicon nitride penetrating coating of the first section and ending at the right side is coated with a third silicon nitride penetrating coating, the third silicon nitride penetrating coating is provided with three grooves (the groove at the left side is a Contact layer source mask groove, the groove at the middle part is a Contact layer grid mask groove, the groove at the right side is a Contact layer drain mask groove), the third silicon nitride penetrating coating is divided into four sections by the three grooves, the technical means that a right-angle notch (the right-angle notch is a source grid electrode right-angle notch) is arranged on the right side of the third silicon nitride penetrating coating in the second section, and a right-angle notch (the right-angle notch is a grid electrode drain electrode right-angle notch) is arranged on the right side of the fourth silicon nitride penetrating coating. Because the GaN HEMT device can form high-density two-dimensional electron gas without doping, the defect density in the device is low, and the failure probability of the device under irradiation is low; the intrinsic carrier concentration of the GaN device is low, the leakage current of the device in an off state is low, the static power consumption is low, and the failure probability of the irradiation condition is low; the GaN material has high forbidden band width, high breakdown voltage and stronger radiation resistance. Therefore, the gallium nitride MISHEMT power device with the structure has high radiation resistance, low leakage current in an off state, low static power consumption, low failure probability of radiation condition and high breakdown voltage.
2. According to the technical scheme, the thickness of the silicon-based layer is 200 nm; the thickness of the gallium nitride circuit layer is 200 nm; the thickness of the gallium nitride barrier layer is 75 nm; the thickness of the silicon nitride dielectric layer is 200 nm; the groove widths of the two grooves are the same; the groove width of the two grooves is 200 nm; the cross section of the titanium-aluminum alloy ohmic channel is concave; the upper parts of the two arms of the concave shape are respectively bent outwards by ninety degrees; the high-resistance region on the left side is smaller than the high-resistance region on the right side; the nickel/gold conductive region comprises a lower gold layer and an upper nickel layer; the thickness of the lower gold layer is 200 nm; the thickness of the upper nickel layer is 45 nm; the average thickness of the first silicon nitride penetrating coating is 200 nm; the first titanium/gold conductive coating comprises a lower gold coating and an upper titanium coating; the average thickness of the lower gold coating is 460 nm; the average thickness of the upper titanium coating is 400 nm; the second silicon nitride penetrating coating has an average thickness of 400 nm; the second titanium/gold conductive coating comprises a lower gold coating and an upper titanium coating; the average thickness of the lower gold coating is 1900 nm; the average thickness of the upper titanium coating is 100 nm; the average thickness of the third silicon nitride penetrating coating 12 is 400nm, so that the gallium nitride MISHEMT power device with the structure has higher radiation resistance, lower leakage current in an off state, lower static power consumption, lower failure probability of radiation condition and higher borne breakdown voltage, can be applied as an aerospace-level DC/DC power supply, and has the advantages of low power consumption, few peripheral devices and high conversion efficiency.
3. The silicon-based layer is made of low-resistance silicon material; the gallium nitride circuit layer is an epitaxial layer; the gallium nitride MISHEMT power device is an N-type two-dimensional electron gas channel, and a silicon-based metal oxide grid electrode is contacted with a high electron mobility transistor, so that the service life of the gallium nitride MISHEMT power device with the structure can be greatly prolonged, and the electrical performance of the gallium nitride MISHEMT power device with the structure is as follows: tube output current 20A (amperes); the input end is controlled by a grid electrode, and the output end is a drain electrode output current; the device turn-on voltage, namely the bias above the grid electrode is more than-8V (volt), the drain electrode voltage bias is more than 10V, and 8/20A current can be output by the drain electrode; when the device is in an off state, the grid bias is less than-8V, the device is in an off state, and the drain voltage can reach more than 600V, namely the breakdown voltage of the device; the gallium nitride electrical index application voltage range is 200-1500V, the current range is 20-100A, the threshold voltage is 1.5-2.5V, the on-resistance is less than 50m omega, and the semiconductor device is based on a Si-MOS cascode structure; a GaNHEMT structure of the N-type GaN grid; the PAD area is small, the parasitic capacitance is small, the Drain area is large, the bearable current is larger, the S/D source/Drain distance is short, and the internal resistance is small (50 haoho).
Drawings
The structure of the gallium nitride MISHEMT power device of the present invention is described in further detail below with reference to the accompanying drawings and the detailed description.
Fig. 1 is a schematic cross-sectional structure diagram after the first step of the process is completed in the production of the gallium nitride MISHEMT power device of the present invention.
Fig. 2 is a schematic cross-sectional structure diagram after the second step of the process is completed in the production of the gallium nitride MISHEMT power device of the present invention.
Fig. 3 is a schematic cross-sectional structure diagram after the third step of the process is completed in the production of the gallium nitride MISHEMT power device of the present invention.
Fig. 4 is a schematic cross-sectional structure diagram after the fourth step of the process is completed in the production of the gallium nitride MISHEMT power device of the present invention.
Fig. 5 is a schematic cross-sectional structure diagram after the fifth step of the process is completed in the production of the gallium nitride MISHEMT power device of the present invention.
Fig. 6 is a schematic cross-sectional structure diagram after the sixth step of the process is completed in the production of the gallium nitride MISHEMT power device of the present invention.
Fig. 7 is a schematic cross-sectional structure diagram after the seventh step of the process is completed in the production of the gallium nitride MISHEMT power device of the present invention.
Fig. 8 is a schematic cross-sectional structure diagram after the eighth step of the process is completed in the production of the gallium nitride MISHEMT power device of the present invention.
Fig. 9 is a schematic view of a volt-ampere transfer characteristic curve of the gallium nitride MISHEMT power device of the present invention.
The reference numerals are explained below.
1-a silicon substrate layer;
2-a gallium nitride circuit layer;
3-a gallium nitride barrier layer;
4-silicon nitride dielectric layer;
5-high resistance area;
6-titanium aluminum alloy ohmic channel;
7-nickel/gold conductive area;
8-a first silicon nitride through coating;
9-a first titanium/gold conductive coating;
10-second silicon nitride penetrating coating;
11-a second titanium/gold conductive coating;
12-a third silicon nitride through coating;
s-source electrode;
g, grid electrode;
d, drain electrode.
Detailed Description
As shown in fig. 1 to 8, the present embodiment provides a structure of a gallium nitride MISHEMT power device, including
A silicon substrate layer 1, a gallium nitride circuit layer 2, a gallium nitride barrier layer 3 and a silicon nitride dielectric layer 4 which are combined together in sequence from bottom to top.
The silicon nitride dielectric layer 4 is provided with two grooves (the groove on the left side is a source electrode ohmic groove, the groove on the right side is a drain electrode ohmic groove), the silicon nitride dielectric layer 4 is divided into three sections by the two grooves, the area of the silicon nitride dielectric layer 4 on the first section is smaller than that of the silicon nitride dielectric layer 4 on the second section, and the area of the silicon nitride dielectric layer 4 on the second section is smaller than that of the silicon nitride dielectric layer 4 on the third section.
And titanium-aluminum alloy ohmic channels 6 are respectively arranged in the two grooves.
The high-resistance region 5 is formed on the upper portion of the left side of the gallium nitride circuit layer 2, the left side of the gallium nitride barrier layer 3 and the left side of the first section of the silicon nitride dielectric layer 4 through an ion implantation silicon isolation constant oxygen process, and the high-resistance region 5 is formed on the upper portion of the right side of the gallium nitride circuit layer 2, the right side of the gallium nitride barrier layer 3 and the right side of the third section of the silicon nitride dielectric layer 4 through an ion implantation silicon isolation constant oxygen process.
And a nickel/gold conductive region 7 is arranged on the left part of the middle part of the upper surface of the second section of the silicon nitride dielectric layer 4.
A first silicon nitride penetrating coating 8 is coated on the left side of the high-resistance region 5 and on the right side of the third silicon nitride medium layer 4, the first silicon nitride penetrating coating 8 is positioned on the middle parts of the upper surfaces of the two titanium-aluminum alloy ohmic channels 6 and is in a disconnected state, so that the first silicon nitride penetrating coating 8 is divided into three sections, a right-angle notch (the right-angle notch is an SiN mask right-angle notch) is formed on the left side of the first silicon nitride penetrating coating 8, the technology of passivating silicon nitride (SiN) can effectively inhibit GaN surface traps and achieve more than 40% of power additional efficiency), two grooves are formed on the first silicon nitride penetrating coating 8 (the groove on the left side is a Ti/Au source contact electrode groove to improve ohmic contact performance, the groove on the right side is a Ti/Au drain contact electrode, improving ohmic contact performance), the left side groove is positioned above the left side between the titanium-aluminum alloy ohmic channel 6 and the nickel/gold conductive region 7, the right side groove is positioned above the right side between the titanium-aluminum alloy ohmic channel 6 and the nickel/gold conductive region 7, the width of the left side groove is smaller than that of the right side groove, and a right-angle notch (which is an SiN mask right-angle notch) is arranged on the right side of the first silicon nitride penetrating coating 8 in the third section.
Starting from the right-angled notch on the left side of the first silicon nitride through coating 8 and ending at the right-angled notch on the right side of the first silicon nitride through coating 8 in the third section, a first titanium/gold conductive coating 9 is coated in the right-angled notch on the right side of the first silicon nitride through coating 8, the middle part of the first titanium/gold conductive coating 9, which is positioned in the right side of the second section of the first silicon nitride through coating 8, is in a disconnected state, so that the first titanium/gold conductive coating 9 is divided into two sections, the left side of the first titanium/gold conductive coating 9 is provided with a right-angled notch (the right-angled notch is a SiN mask right-angled notch), the middle part of the first titanium/gold conductive coating 9 is provided with two grooves (the groove on the left side is a metal layer SiN source mask groove, the groove on the right side is a metal layer SiN drain mask groove), the left side of the groove is positioned above the first section of the first silicon nitride through coating 8 and the, the groove on the right side is positioned above the groove on the left side of the first silicon nitride penetrating coating 8 on the second section, the depth of the groove on the right side is smaller than that of the groove on the left side, a groove is formed in the middle of the first titanium/gold conductive coating 9 on the second section, and the groove is positioned above the position between the first silicon nitride penetrating coating 8 on the second section and the first silicon nitride penetrating coating 8 on the third section.
A second silicon nitride through coating 10 is coated on the left side of the first silicon nitride through coating 8 at a first section and on the right side of the first silicon nitride through coating 8 at a third section, the second silicon nitride through coating 10 is positioned in the left groove of the first titanium/gold conductive coating 9 at a first section and is in a disconnected state in the middle, the second silicon nitride through coating 10 is positioned in the first titanium/gold conductive coating 9 at a second section and is in a disconnected state in the middle, so that the second silicon nitride through coating 10 is divided into three sections, two grooves are arranged in the middle of the second silicon nitride through coating 10 at the second section (the groove on the left side is an SiN source mask groove, the groove on the right side is an SiN drain mask groove), the groove on the left side is positioned above the groove on the right side of the first titanium/gold conductive coating 9 at the first section, and the groove on the right side is positioned above the first titanium/gold conductive coating 9 at the first section and the first titanium/gold conductive coating 9 at the second section Above and between the conductive coatings 9.
A second titanium/gold conductive coating 11 is coated on the left side of the first section of the second silicon nitride through coating 10 and the right side of the third section of the second silicon nitride through coating 10, the middle part of the second titanium/gold conductive coating 11, which is positioned in the groove on the right side of the second section of the second silicon nitride through coating 10, is in an off state, so that the second titanium/gold conductive coating 11 is divided into two sections, a right-angle notch (the right-angle notch is a metal layer Ti/Au source contact electrode right-angle notch) is arranged on the left side of the first section of the second titanium/gold conductive coating 11, the root of the right-angle notch extends downwards to form a groove (the groove is a metal layer Ti/Au drain mask groove), a right-angle notch (the right-angle notch is a metal layer Ti/Au drain contact electrode right-angle notch) is arranged on the right side of the first section of the second titanium/gold conductive coating 11, the left part of the second titanium/gold conductive coating 11 of the first section is a source electrode S, the right part of the second titanium/gold conductive coating 11 of the first section is a gate electrode G, the right upper surface of the second titanium/gold conductive coating 11 of the second section is provided with a right-angle notch (the right-angle notch is a metal layer Ti/Au drain contact electrode right-angle notch), and the right part of the second titanium/gold conductive coating 11 of the second section is a drain electrode D.
Starting from the left side of the first section of the second silicon nitride through coating 10, the right side of the high resistance region 5 ending at the right side is coated with a third silicon nitride through coating 12, the third silicon nitride through coating 12 is provided with three grooves (the groove at the left side is a Contact layer source mask groove, the groove at the middle part is a Contact layer gate mask groove, the groove at the right side is a Contact layer drain mask groove), the three grooves divide the third silicon nitride through coating 12 into four sections, the right side of the third silicon nitride through coating 12 at the second section is provided with a right-angle notch (the right-angle notch is a source gate right-angle notch), and the right side of the fourth silicon nitride through coating 12 at the fourth section is provided with a right-angle notch (the right-angle notch is a gate drain right-angle notch).
In the embodiment, the silicon nitride substrate, the gallium nitride circuit layer, the gallium nitride barrier layer and the silicon nitride medium layer are sequentially combined from bottom to top, the silicon nitride medium layer is provided with two grooves (the groove on the left side is a source electrode ohm groove, the groove on the right side is a drain electrode ohm groove), the silicon nitride medium layer is divided into three sections by the two grooves, the area of the silicon nitride medium layer on the first section is smaller than that of the silicon nitride medium layer on the second section, the area of the silicon nitride medium layer on the second section is smaller than that of the silicon nitride medium layer on the third section, titanium-aluminum alloy ohm channels are respectively arranged in the two grooves, a high-resistance area is formed by isolating silicon constant oxygen process through ion implantation on the upper portion on the left side of the gallium nitride circuit layer, the left side of the gallium nitride barrier layer and the left side of the silicon nitride medium layer on the first, The right side of the gallium nitride barrier layer and the right side of the third section of the silicon nitride medium layer form a high-resistance region through an ion implantation silicon-isolation constant oxygen process, a nickel/gold conductive region is arranged on the left side of the upper part of the second section of the silicon nitride medium layer, a first silicon nitride penetrating coating is coated on the right side of the silicon nitride medium layer starting from the left side of the high-resistance region and ending at the third section of the high-resistance region, the first silicon nitride penetrating coating is positioned on the upper middle parts of the two titanium-aluminum alloy ohmic channels and is in a disconnected state, so that the first silicon nitride penetrating coating is divided into three sections, a right-angle notch (the right-angle notch is an SiN mask right-angle notch) is formed on the left side of the first silicon nitride penetrating coating in the first section, a GaN surface trap can be effectively inhibited through a silicon nitride (SiN) passivation technology, and power additional efficiency higher than 40 percent is realized), and two grooves are formed on the first The electrode groove is contacted, so that the ohmic contact performance is improved; the groove on the right side is a Ti/Au drain contact electrode to improve ohmic contact performance), the groove on the left side is positioned above the position between the titanium-aluminum alloy ohmic channel and the nickel/gold conductive region on the left side, the groove on the right side is positioned above the position between the titanium-aluminum alloy ohmic channel and the nickel/gold conductive region on the right side, the width of the groove on the left side is smaller than that of the groove on the right side, a right-angle notch (which is an SiN mask right-angle notch) is formed in the right side of the first silicon nitride penetrating coating in the third section, a first titanium/gold conductive coating is coated in the right-angle notch in the upper side of the first silicon nitride penetrating coating in the first section, the middle part of the first titanium/gold conductive coating, which is positioned on the right side of the first silicon nitride penetrating coating in the second section, in the groove in a disconnected state to ensure that the first titanium/gold conductive coating is positioned in the right side The conductive coating is divided into two sections, a right-angle notch (the right-angle notch is an SiN mask right-angle notch) is arranged on the left side of the first titanium/gold conductive coating in the first section, two grooves are arranged in the middle of the first titanium/gold conductive coating in the first section (the groove on the left side is a metal layer SiN source mask groove, the groove on the right side is a metal layer SiN drain mask groove), the left-side groove is positioned above the space between the first silicon nitride penetrating coating and the second silicon nitride penetrating coating in the first section, the right-side groove is positioned above the left-side groove of the first silicon nitride penetrating coating in the second section, the depth of the right-side groove is smaller than that of the left-side groove, a groove is arranged in the middle of the first titanium/gold conductive coating in the second section, and the groove is positioned above the space between the first silicon nitride penetrating coating and the first silicon nitride penetrating coating in the, starting from the left side of the first section of the first silicon nitride penetrating coating and ending at the right side of the third section of the first silicon nitride penetrating coating, a second silicon nitride penetrating coating is coated, the middle of the second silicon nitride penetrating coating, which is positioned in a left groove of the first section of the first titanium/gold conductive coating, is in a disconnected state, the middle of the second silicon nitride penetrating coating, which is positioned in a groove of the second section of the first titanium/gold conductive coating, is in a disconnected state, so that the second silicon nitride penetrating coating is divided into three sections, two grooves are arranged in the middle of the second silicon nitride penetrating coating (the groove on the left side is an SiN source mask groove, the groove on the right side is an SiN drain mask groove), the groove on the left side is positioned above the groove on the right side of the first section of the first titanium/gold conductive coating, and the groove on the right side is positioned above the space between the first section of the first titanium/gold conductive coating and the second section of the first titanium, a second titanium/gold conductive coating is coated on the left side of the second silicon nitride penetrating coating on the first section and on the right side of the second silicon nitride penetrating coating on the third section, the middle part of the second titanium/gold conductive coating, which is positioned in the groove on the right side of the second silicon nitride penetrating coating on the second section, is in a disconnected state, so that the second titanium/gold conductive coating is divided into two sections, a right-angle notch is arranged on the left side of the second titanium/gold conductive coating on the first section (the right-angle notch is a metal layer Ti/Au source contact electrode right-angle notch), the root part of the right-angle notch extends downwards to form a groove (the groove is a metal layer Ti/Au drain mask groove), a right-angle notch is arranged on the right side of the second titanium/gold conductive coating on the first section (the right-angle notch is a metal layer Ti/Au drain contact electrode right-angle notch), the left part of the second titanium/gold conductive coating of the first section is a source S, the right part of the second titanium/gold conductive coating of the first section is a grid G, the right part of the second titanium/gold conductive coating of the second section is a right-angle notch (the right-angle notch is a metal layer Ti/Au drain Contact electrode right-angle notch), the right part of the second titanium/gold conductive coating of the second section is a drain D, the right side of the high-resistance region starting from the upper side of the left side of the second silicon nitride penetrating coating of the first section and ending at the right side is coated with a third silicon nitride penetrating coating, the third silicon nitride penetrating coating is provided with three grooves (the groove at the left side is a Contact layer source mask groove, the groove at the middle part is a Contact layer grid mask groove, the groove at the right side is a Contact layer drain mask groove), the third silicon nitride penetrating coating is divided into four sections by the three grooves, the technical means that a right-angle notch (the right-angle notch is a source grid electrode right-angle notch) is arranged on the right side of the third silicon nitride penetrating coating in the second section, and a right-angle notch (the right-angle notch is a grid electrode drain electrode right-angle notch) is arranged on the right side of the fourth silicon nitride penetrating coating. The GaNHEMT device can form high-density two-dimensional electron gas without doping, so that the defect density in the device is low, and the failure probability of the device under irradiation is low; the intrinsic carrier concentration of the GaN device is low, the leakage current of the device in an off state is low, the static power consumption is low, and the failure probability of the irradiation condition is low; the GaN material has high forbidden band width, high breakdown voltage and stronger radiation resistance. Therefore, the gallium nitride MISHEMT power device with the structure has high radiation resistance, low leakage current in an off state, low static power consumption, low failure probability of radiation condition and high breakdown voltage.
As shown in fig. 1 to 8, the thickness of the silicon base layer 1 is 200 nm;
the thickness of the gallium nitride circuit layer 2 is 200 nm;
the thickness of the gallium nitride barrier layer 3 is 75 nm;
the thickness of the silicon nitride dielectric layer 4 is 200 nm;
the groove widths of the two grooves are the same;
the groove width of the two grooves is 200 nm;
the cross section of the titanium-aluminum alloy ohmic channel 6 is concave;
the upper parts of the two arms of the concave shape are respectively bent outwards by ninety degrees;
the high-resistance region 5 on the left side is smaller than the high-resistance region 5 on the right side;
the nickel/gold conductive region 7 comprises a lower gold layer and an upper nickel layer;
the thickness of the lower gold layer is 200 nm;
the thickness of the upper nickel layer is 45 nm;
the first silicon nitride through-coating layer 8 has an average thickness of 200 nm;
the first titanium/gold conductive coating 9 comprises a lower gold coating and an upper titanium coating;
the average thickness of the lower gold coating is 460 nm;
the average thickness of the upper titanium coating is 400 nm;
the second silicon nitride through-coating 10 has an average thickness of 400 nm;
the second titanium/gold conductive coating 11 comprises a lower gold coating and an upper titanium coating;
the average thickness of the lower gold coating is 1900 nm;
the average thickness of the upper titanium coating is 100 nm;
the third silicon nitride through-coating 12 has an average thickness of 400 nm.
In the embodiment, the thickness of the silicon-based layer is 200 nm; the thickness of the gallium nitride circuit layer is 200 nm; the thickness of the gallium nitride barrier layer is 75 nm; the thickness of the silicon nitride dielectric layer is 200 nm; the groove widths of the two grooves are the same; the groove width of the two grooves is 200 nm; the cross section of the titanium-aluminum alloy ohmic channel is concave; the upper parts of the two arms of the concave shape are respectively bent outwards by ninety degrees; the high-resistance region on the left side is smaller than the high-resistance region on the right side; the nickel/gold conductive region comprises a lower gold layer and an upper nickel layer; the thickness of the lower gold layer is 200 nm; the thickness of the upper nickel layer is 45 nm; the average thickness of the first silicon nitride penetrating coating is 200 nm; the first titanium/gold conductive coating comprises a lower gold coating and an upper titanium coating; the average thickness of the lower gold coating is 460 nm; the average thickness of the upper titanium coating is 400 nm; the second silicon nitride penetrating coating has an average thickness of 400 nm; the second titanium/gold conductive coating comprises a lower gold coating and an upper titanium coating; the average thickness of the lower gold coating is 1900 nm; the average thickness of the upper titanium coating is 100 nm; the average thickness of the third silicon nitride penetrating coating 12 is 400nm, so that the gallium nitride MISHEMT power device with the structure has higher radiation resistance, lower leakage current in an off state, lower static power consumption, lower failure probability of radiation condition and higher borne breakdown voltage, can be applied as an aerospace-level DC/DC power supply, and has the advantages of low power consumption, few peripheral devices and high conversion efficiency.
As shown in fig. 1 to 8, the silicon base layer 1 is made of a low-resistance silicon material;
the gallium nitride circuit layer 2 is an epitaxial layer;
the gallium nitride MISHEMT power device is an N-type two-dimensional electron gas channel, and a silicon-based metal oxide grid electrode contacts a high electron mobility transistor.
In the embodiment, the silicon-based layer is made of low-resistance silicon material; the gallium nitride circuit layer is an epitaxial layer; the gallium nitride MISHEMT power device is a technical means of an N-type two-dimensional electron gas channel, and a silicon-based metal oxide grid electrode is contacted with a high electron mobility transistor, so that the service life of the gallium nitride MISHEMT power device with the structure can be greatly prolonged, and as shown in figure 9, the electrical performance of the gallium nitride MISHEMT power device with the structure is as follows: tube output current 20A (amperes); the input end is controlled by a grid electrode, and the output end is a drain electrode output current; the device turn-on voltage, namely the bias above the grid electrode is more than-8V (volt), the drain electrode voltage bias is more than 10V, and 8/20A current can be output by the drain electrode; when the device is in an off state, the grid bias is less than-8V, the device is in an off state, and the drain voltage can reach more than 600V, namely the breakdown voltage of the device; the gallium nitride electrical index application voltage range is 200-1500V, the current range is 20-100A, the threshold voltage is 1.5-2.5V, the on-resistance is less than 50m omega, and the semiconductor device is based on a Si-MOS cascode structure; a GaNHEMT structure of the N-type GaN grid; the PAD area is small, the parasitic capacitance is small, the Drain area is large, the bearable current is larger, the S/D source/Drain distance is short, and the internal resistance is small (50 haoho).
Claims (3)
1. A structure of a gallium nitride MISHEMT power device is characterized in that: comprises that
A silicon base layer (1), a gallium nitride circuit layer (2), a gallium nitride barrier layer (3) and a silicon nitride dielectric layer (4) which are combined together from bottom to top in sequence,
the silicon nitride dielectric layer (4) is provided with two grooves, the silicon nitride dielectric layer (4) is divided into three sections by the two grooves, the area of the silicon nitride dielectric layer (4) at the first section is smaller than that of the silicon nitride dielectric layer (4) at the second section, the area of the silicon nitride dielectric layer (4) at the second section is smaller than that of the silicon nitride dielectric layer (4) at the third section,
titanium-aluminum alloy ohmic channels (6) are respectively arranged in the two grooves,
the upper part of the left side of the gallium nitride circuit layer (2), the left side of the gallium nitride barrier layer (3) and the left side of the first section of the silicon nitride dielectric layer (4) form a high-resistance area (5) through an ion implantation silicon isolation oxygen constant process, the upper part of the right side of the gallium nitride circuit layer (2), the right side of the gallium nitride barrier layer (3) and the right side of the third section of the silicon nitride dielectric layer (4) form the high-resistance area (5) through the ion implantation silicon isolation oxygen constant process,
a nickel/gold conductive region (7) is arranged on the left part of the middle part of the upper surface of the second section of the silicon nitride dielectric layer (4),
starting from the left side of the high-resistance region (5) and ending at the right side of the third section of the silicon nitride dielectric layer (4), a first silicon nitride penetrating coating (8) is coated on the left side of the high-resistance region (5), the first silicon nitride penetrating coating (8) is positioned on the middle part of the upper surfaces of the two titanium-aluminum alloy ohmic channels (6) and is in a disconnected state, so that the first silicon nitride penetrating coating (8) is divided into three sections, a right-angle notch is formed in the left side of the first silicon nitride penetrating coating (8), two grooves are formed in the second section of the first silicon nitride penetrating coating (8), the left groove is positioned above the position between the left side of the titanium-aluminum alloy ohmic channel (6) and the nickel/gold conductive region (7), the right groove is positioned above the position between the right side of the titanium-aluminum alloy ohmic channel (6) and the nickel/gold conductive region (7), and the width of the left groove is smaller than the width of, a right-angle notch is arranged on the right side of the first silicon nitride penetrating coating (8) of the third section,
starting from a right-angled notch on the left side of a first section of the first silicon nitride penetrating coating (8), a first titanium/gold conductive coating (9) is coated in the right-angled notch on the right side of a third section of the first silicon nitride penetrating coating (8), the middle part of the first titanium/gold conductive coating (9) positioned in a groove on the right side of the second section of the first silicon nitride penetrating coating (8) is in a disconnected state, so that the first titanium/gold conductive coating (9) is divided into two sections, a right-angled notch is arranged on the left side of the first section of the first titanium/gold conductive coating (9), two grooves are arranged in the middle part of the first section of the first titanium/gold conductive coating (9), and the groove on the left side is positioned above the space between the first section of the first silicon nitride penetrating coating (8) and the second section of the first silicon nitride penetrating coating (8), the groove on the right side is positioned above the groove on the left side of the first silicon nitride penetrating coating (8) on the second section, the depth of the groove on the right side is smaller than that of the groove on the left side, a groove is arranged in the middle of the first titanium/gold conductive coating (9) on the second section, the groove is positioned above the space between the first silicon nitride penetrating coating (8) on the second section and the first silicon nitride penetrating coating (8) on the third section,
a second silicon nitride penetrating coating (10) is coated on the left side of the first silicon nitride penetrating coating (8) from the first section to the right side of the first silicon nitride penetrating coating (8) from the third section, the middle of the second silicon nitride penetrating coating (10) in a left groove of the first titanium/gold conductive coating (9) in the first section is in a disconnected state, the middle of the second silicon nitride penetrating coating (10) in a groove of the first titanium/gold conductive coating (9) in the second section is in a disconnected state, so that the second silicon nitride penetrating coating (10) is divided into three sections, two grooves are formed in the middle of the second silicon nitride penetrating coating (10) in the second section, the left groove is positioned above a right groove of the first titanium/gold conductive coating (9) in the first section, and the right groove is positioned between the first titanium/gold conductive coating (9) in the first section and the first titanium/gold conductive coating (9) in the second section The upper part of the compartment is provided with a plurality of grooves,
starting from the left side of the first section of the second silicon nitride penetrating coating (10) and ending at the right side of the third section of the second silicon nitride penetrating coating (10), a second titanium/gold conductive coating (11) is coated on the right side of the first section of the second silicon nitride penetrating coating (10), the middle part of the second titanium/gold conductive coating (11), which is positioned in the groove on the right side of the second section of the second silicon nitride penetrating coating (10), is in a disconnected state, so that the second titanium/gold conductive coating (11) is divided into two sections, a right-angle notch is formed in the left side of the first section of the second titanium/gold conductive coating (11), the root of the right-angle notch extends downwards to form a groove, a right-angle notch is formed in the right side of the first section of the second titanium/gold conductive coating (11), the left part of the first section of the second titanium/gold conductive coating (11) is a source electrode (S), and the right part of the first section of the second titanium/gold conductive coating (11) is a, a right-angle notch is arranged on the right side of the second titanium/gold conductive coating (11) of the second section, the right part of the second titanium/gold conductive coating (11) of the second section is a drain electrode (D),
a third silicon nitride penetrating coating (12) is coated on the right side of the high-resistance area (5) starting from the upper side of the left side of the first section of the second silicon nitride penetrating coating (10) and ending at the right side, three grooves are formed in the third silicon nitride penetrating coating (12), the third silicon nitride penetrating coating (12) is divided into four sections by the three grooves, a right-angle notch is formed in the upper side of the right side of the third silicon nitride penetrating coating (12) in the second section, and a right-angle notch is formed in the upper side of the right side of the fourth silicon nitride penetrating coating (12).
2. The structure of the gallium nitride MISHEMT power device of claim 1, characterized in that:
the thickness of the silicon-based layer (1) is 200 nm;
the thickness of the gallium nitride circuit layer (2) is 200 nm;
the thickness of the gallium nitride barrier layer (3) is 75 nm;
the thickness of the silicon nitride dielectric layer (4) is 200 nm;
the groove widths of the two grooves are the same;
the groove width of the two grooves is 200 nm;
the cross section of the titanium-aluminum alloy ohmic channel (6) is concave;
the upper parts of the two arms of the concave shape are respectively bent outwards by ninety degrees;
the high-resistance region (5) on the left side is smaller than the high-resistance region (5) on the right side;
the nickel/gold conductive region (7) comprises a lower gold layer and an upper nickel layer;
the thickness of the lower gold layer is 200 nm;
the thickness of the upper nickel layer is 45 nm;
the first silicon nitride through-coating (8) has an average thickness of 200 nm;
the first titanium/gold conductive coating (9) comprises a lower gold coating and an upper titanium coating;
the average thickness of the lower gold coating is 460 nm;
the average thickness of the upper titanium coating is 400 nm;
the second silicon nitride through-coating (10) has an average thickness of 400 nm;
the second titanium/gold conductive coating (11) comprises a lower gold coating and an upper titanium coating;
the average thickness of the lower gold coating is 1900 nm;
the average thickness of the upper titanium coating is 100 nm;
the third silicon nitride through-coating layer (12) has an average thickness of 400 nm.
3. The structure of the gallium nitride MISHEMT power device of claim 2, characterized in that:
the silicon-based layer (1) is made of low-resistance silicon material;
the gallium nitride circuit layer (2) is an epitaxial layer;
the gallium nitride MISHEMT power device is an N-type two-dimensional electron gas channel, and a silicon-based metal oxide grid electrode contacts a high electron mobility transistor.
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