CN210958284U - Millimeter wave receiving low-noise amplifier and millimeter wave receiver - Google Patents
Millimeter wave receiving low-noise amplifier and millimeter wave receiver Download PDFInfo
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- CN210958284U CN210958284U CN201922484892.8U CN201922484892U CN210958284U CN 210958284 U CN210958284 U CN 210958284U CN 201922484892 U CN201922484892 U CN 201922484892U CN 210958284 U CN210958284 U CN 210958284U
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Abstract
The utility model provides a low noise amplifier is received to millimeter wave, include: the single-ended to differential conversion circuit comprises a single-ended to differential conversion circuit, a first-stage transformer coupling circuit and a second-stage transformer coupling circuit; the single-ended to differential conversion circuit, the first-stage transformer coupling circuit and the second-stage transformer coupling circuit are electrically connected in sequence; the single-end to differential circuit is used for converting the received millimeter wave signal into a differential output signal; the first-stage transformer coupling circuit is used for realizing noise reduction processing of differential signals; and the second-stage transformer coupling circuit is used for realizing gain amplification processing. The millimeter wave receiving low-noise amplifier can effectively improve the signal output amplitude, the signal-to-noise ratio, the noise coefficient and the sensitivity.
Description
Technical Field
The utility model relates to an integrated circuit designs technical field, especially relates to a low noise amplifier and millimeter wave receiver are received to millimeter wave.
Background
The millimeter wave has unique propagation characteristics, long transmission distance, low atmospheric attenuation and loss in a transmission window and strong penetrability. The window frequency with the center frequency of 24GHz and 77GHz can be used for communication and automobile distance detection. The millimeter wave radar is a general name of a radar working in a millimeter wave frequency band, the working frequency of the millimeter wave radar is generally 30-300 GHz, and the signal wavelength is 1-10 mm. The millimeter wave radar frequency ranges of the mainstream automobile at home and abroad are 24GHz (for short-medium distance radar, 15-30 m) and 77GHz (for long-distance radar, 100-200 m). The automobile millimeter wave radar sensor can meet the requirement of a vehicle on adaptability to all-day climate, the characteristics of small size, light weight and the like of the millimeter wave radar sensor are determined by the characteristics of the millimeter wave, and the use scenes of other sensors such as infrared sensors, laser sensors, ultrasonic sensors, cameras and the like which are not possessed in vehicle-mounted application are well made up.
The millimeter wave radar mainly transmits millimeter waves outwards through an antenna, receives a target transmitting signal, accurately acquires physical environment information around a target after processing, such as relative distance, relative speed and the like between an automobile and other objects, then carries out current tracking, identification and classification according to the detected object information, combines with dynamic information of the target, carries out intelligent processing through a central processing unit, and informs the target of correct intervention reaction in time through screen display, sound or vibration and other modes.
The millimeter wave radar is a short name for millimeter wave transceiving system, and in an automobile millimeter wave radar system, the millimeter wave radar comprises a millimeter wave frequency synthesizer, a millimeter wave transmitter, a millimeter wave receiver, a millimeter wave mixer and the like. In the millimeter wave receiver, a Low Noise Amplifier (LNA) is a key, and is located at the front end of a receiving system, so that the received weak radio frequency signal is amplified, and noise is introduced as little as possible in the amplification process, thereby ensuring the normal operation of the whole system. The low noise amplifier designed by the current CMOS process adopts a circuit structure as shown in fig. 1, and the low noise amplifier adopts a common source structure, and the gain is reduced due to negative feedback introduced by the gate-drain parasitic capacitance (Cgd) of the transistor, and the input-output isolation is deteriorated, the matching performance is affected, and the sensitivity performance is poor.
SUMMERY OF THE UTILITY MODEL
In view of this, the utility model provides a millimeter wave receives low noise amplifier and millimeter wave receiver aims at solving the low high gain of low noise amplifier among the prior art, and the not good problem of sensitivity performance.
The embodiment of the application provides a millimeter wave receiving low noise amplifier, including: the single-ended to differential conversion circuit comprises a single-ended to differential conversion circuit, a first-stage transformer coupling circuit and a second-stage transformer coupling circuit; the single-ended to differential conversion circuit, the first-stage transformer coupling circuit and the second-stage transformer coupling circuit are electrically connected in sequence; the single-end to differential circuit is used for converting the received millimeter wave signal into a differential output signal; the first-stage transformer coupling circuit is used for realizing noise reduction processing of differential signals; and the second-stage transformer coupling circuit is used for realizing gain first-stage amplification processing.
Further, the single-ended to differential circuit comprises: a balun; the input end of the balun is connected with a radio frequency signal input end; the middle tap of the balun output is connected with a first bias power supply; and the output end of the balun is connected with the input end of the first-stage transformer coupling circuit.
Further, the first stage transformer coupling circuit comprises: the first NMOS transistor, the second NMOS transistor, the first capacitor, the second capacitor and the first transformer; the grid electrode of the first NMOS transistor is connected with one end of the single-end to differential circuit, the grid electrode of the first NMOS transistor is also connected with one end of the first capacitor, and the other end of the first capacitor is connected with the drain electrode of the second NMOS transistor; the source electrode of the first NMOS transistor is connected with the ground wire; the drain electrode of the first NMOS transistor is connected with one end of the primary coil of the first transformer; the grid electrode of the second NMOS transistor is connected with the other end of the single-ended to differential circuit, the grid electrode of the second NMOS transistor is also connected with one end of a second capacitor, and the other end of the second capacitor is connected with the drain electrode of the first NMOS transistor; the source electrode of the second NMOS transistor is connected with the ground wire; the drain electrode of the second NMOS transistor is connected with the other end of the primary coil of the first transformer; the middle tap of the primary coil of the first transformer is connected with a reference power supply; the center tap of the secondary coil of the first transformer is connected with a second bias power supply; and two ends of the secondary coil of the first transformer are connected with the second-stage transformer coupling circuit.
Further, the second stage transformer coupling circuit comprises: a third NMOS transistor, a fourth NMOS transistor, a third capacitor, a fourth capacitor and a second transformer; the grid electrode of the third NMOS transistor is connected with one end of the first-stage transformer coupling circuit, the grid electrode of the third NMOS transistor is also connected with one end of a third capacitor, and the other end of the third capacitor is connected with the drain electrode of the fourth NMOS transistor; the source electrode of the third NMOS transistor is connected with the ground wire; the drain electrode of the third NMOS transistor is connected with one end of the primary coil of the second transformer; the grid electrode of the fourth NMOS transistor is connected with the other end of the first-stage transformer coupling circuit, the grid electrode of the fourth NMOS transistor is also connected with one end of a fourth capacitor, and the other end of the fourth capacitor is connected with the drain electrode of the third NMOS transistor; the source level of the fourth NMOS transistor is connected with the ground wire; the drain electrode of the fourth NMOS transistor is connected with the other end of the primary coil of the second transformer; the middle tap of the primary coil of the second transformer is connected with a reference power supply; and the middle tap of the secondary coil of the second transformer is grounded through a capacitor.
Further, still include: and the input end of the third-stage transformer coupling circuit is connected with the output end of the second-stage transformer coupling circuit.
Further, the third stage transformer coupling circuit includes: a fifth NMOS transistor, a sixth NMOS transistor, a fifth capacitor, a sixth capacitor and a third transformer; the grid electrode of the fifth NMOS transistor is connected with one end of the second-stage transformer coupling circuit, the grid electrode of the fifth NMOS transistor is also connected with one end of a fifth capacitor, and the other end of the fifth capacitor is connected with the drain electrode of the sixth NMOS transistor; the source level of the fifth NMOS transistor is connected with the ground wire; the drain electrode of the fifth NMOS transistor is connected with one end of the primary coil of the third transformer; the grid electrode of the sixth NMOS transistor is connected with the other end of the second-stage transformer coupling circuit, the grid electrode of the sixth NMOS transistor is also connected with one end of a sixth capacitor, and the other end of the sixth capacitor is connected with the drain electrode of the fifth NMOS transistor; the source level of the sixth NMOS transistor is connected with the ground wire; the drain electrode of the sixth NMOS transistor is connected with the other end of the primary coil of the third transformer; the middle tap of the primary coil of the third transformer is connected with a reference power supply; and the middle tap of the secondary coil of the third transformer is grounded through a capacitor.
Further, the front and rear coils of the transformer used in the first-stage transformer coupling circuit and the second-stage transformer coupling circuit are in a vertical stacking structure of two layers of metal.
Further, the front and rear coils of the transformer used in the third-stage transformer coupling circuit are in a vertical stacking structure of two layers of metal.
Further, the front and rear coils of the transformer used in the first-stage transformer coupling circuit and the second-stage transformer coupling circuit are both in a single-coil structure.
Furthermore, the front and rear coils of the transformer used in the third-stage transformer coupling circuit are all in a single-coil structure.
The embodiment of the application also provides a millimeter wave receiver, which comprises the millimeter wave receiving low-noise amplifier.
The utility model provides a conversion of signal from single-ended to difference is realized to low-noise amplifier input is received to millimeter wave, and the interstage adopts the transformer second grade coupling, and the processing of making an uproar is fallen for realizing to the first grade coupling, and the gain amplification is realized in the second grade coupling to improve signal output amplitude, improve the SNR, improve noise figure, improve sensitivity.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is an electrical connection diagram of a prior art low noise amplifier;
fig. 2 is a circuit structure diagram of a millimeter wave receiving low noise amplifier according to an embodiment of the present invention;
fig. 3 is a circuit structure diagram of a millimeter wave receiving low noise amplifier according to another embodiment of the present invention;
fig. 4 is a schematic stacked view of a transformer according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
As shown in fig. 2, a millimeter wave receiving low noise amplifier includes: a single-ended to differential circuit 100, a first stage transformer coupling circuit 101, and a second stage transformer coupling circuit 102; the single-ended to differential circuit 100, the first-stage transformer coupling circuit 101 and the second-stage transformer coupling circuit 102 are electrically connected in sequence; the single-ended to differential circuit 100 is configured to convert a received millimeter wave signal into a differential output signal; the first-stage transformer coupling circuit 101 is used for realizing noise reduction processing of differential signals; the second transformer coupling circuit 102 is used to implement a gain first amplification process.
Specifically, in the present embodiment, the single-ended to differential circuit 100 includes: balun B1; the input end of the balun B1 is connected with a radio frequency signal input end RF; the middle tap of the balun B1 output is connected with a first bias power supply VB 1; the output end of the balun B1 is connected with the input end of the first-stage transformer coupling circuit 101. A balun is a broadband radio frequency transmission line transformer that enables connection between a balanced transmission line circuit and an unbalanced transmission line circuit by converting a matched input to a differential output.
Millimeter wave signals received from the antenna are input to the input end of the balun B1, single-end input signals are converted into differential output, and isolation of radio frequency input RF and grid bias voltage is achieved, so that an input blocking capacitor is omitted, and noise performance is improved.
Specifically, in the present embodiment, the first-stage transformer coupling circuit 101 includes: a first NMOS transistor M1, a second NMOS transistor M2, a first capacitor C1, a second capacitor C2, and a first transformer T1; the gate of the first NMOS transistor M1 is connected to one end of the single-ended to differential circuit 100, i.e., the gate of the first NMOS transistor M1 is connected to one end of the balun B1 output; the gate of the first NMOS transistor M1 is further connected to one end of a first capacitor C1, and the other end of the first capacitor C1 is connected to the drain of the second NMOS transistor M2; the source of the first NMOS transistor M1 is connected to ground; the drain of the first NMOS transistor M1 is connected to one end of the primary winding of the first transformer T1; the gate M2 of the second NMOS transistor is connected to the other end of the single-ended to differential circuit 100, that is, the gate of the second NMOS transistor M2 is connected to the other end of the balun B1 output; the gate of the second NMOS transistor M2 is further connected to one end of a second capacitor C2, and the other end of the second capacitor C2 is connected to the drain of the first NMOS transistor M1; the source of the second NMOS transistor M2 is connected to ground; the drain of the second NMOS transistor M2 is connected to the other end of the primary winding of the first transformer T1; the middle tap of the primary coil of the first transformer T1 is connected to the reference power supply VDD; a center tap of a secondary coil of the first transformer T1 is connected to a second bias power supply VB 2; the secondary winding of the first transformer T1 has two ends connected to the second stage transformer coupling circuit 102.
The negative feedback introduced by the gate-drain parasitic capacitance Cgd of the transistor lowers the gain and deteriorates the input-output isolation, affecting the matching performance. Cross-coupling neutralizing capacitances are therefore employed to counteract the effect of Cgd, thereby improving gain. The input front end adopts a single balanced-double balanced converter (balun B1) to convert a single-end signal into a differential signal, and the interstage adopts transformer coupling to reduce insertion loss and chip area. The influence of the gate-drain parasitic capacitance Cgd of the first NMOS transistor M1 can be eliminated by the first capacitance C1 connected across. The small signal current flowing through Cgd and C1 are opposite in direction, and under the condition that the currents are equal and the capacitance value of C1 is equal to that of Cgd, the influence of Cgd can be completely eliminated, so that the high gain of the amplifier is improved, and meanwhile, no extra power consumption is introduced. The effect of Cgd can also be eliminated by bridging the capacitance for other NMOS transistors in the same way. The adverse effect of the gate-drain parasitic capacitance Cgd is eliminated by the first capacitance C1 connected across the first NMOS transistor M1 and the second capacitance C2 connected across the second NMOS transistor M2, thereby achieving gain enhancement over a wider frequency band and significantly improving the gain and stability of the low noise amplifier.
Specifically, in the present embodiment, the second-stage transformer coupling circuit 102 includes: a third NMOS transistor M3, a fourth NMOS transistor M4, a third capacitor C3, a fourth capacitor C4, and a second transformer T2.
The gate of the third NMOS transistor M3 is connected to one end of the first-stage transformer coupling circuit 101, i.e., the gate of the third NMOS transistor M3 is connected to one end of the secondary winding of the first transformer T1; the gate of the third NMOS transistor M3 is further connected to one end of a third capacitor C3, and the other end of the third capacitor C3 is connected to the drain of the fourth NMOS transistor M4; the source of the third NMOS transistor M3 is connected to ground; the drain of the third NMOS transistor M3 is connected to one end of the primary coil of the second transformer T2.
The gate of the fourth NMOS transistor M4 is connected to the other end of the first-stage transformer coupling circuit 101, i.e., the gate of the fourth NMOS transistor M4 is connected to the other end of the secondary winding of the first transformer T1; the gate of the fourth NMOS transistor M4 is further connected to one end of a fourth capacitor C4, and the other end of the fourth capacitor C4 is connected to the drain of the third NMOS transistor M3; the source of the fourth NMOS transistor M4 is connected to ground; the drain of the fourth NMOS transistor M4 is connected to the other end of the primary coil of the second transformer T2.
The middle tap of the primary coil of the second transformer T2 is connected to the reference power supply VDD; the center tap of the secondary coil of the second transformer T2 is grounded via a capacitor; two ends of the secondary coil of the second transformer T2 are output ends V respectivelyON、VOP。
The influence of the gate-drain parasitic capacitance Cgd is eliminated by the third capacitance C3 across the third NMOS transistor M3 and the fourth capacitance C4 across the fourth NMOS transistor M4.
In other embodiments, the single-ended to differential circuit 100, the first stage transformer coupling circuit 101, and the second stage transformer coupling circuit 102 may also adopt other electrical connection manners.
By controlling the levels of the three bias power supplies VB1-VB2, the transmission signal power can be controlled. For example, by increasing the bias voltage, the amplitude of the transmission signal can be increased, thereby improving the signal-to-noise ratio index.
As shown in fig. 3, a millimeter wave receiving low noise amplifier includes: a single-ended to differential circuit 100, a first stage transformer coupling circuit 101, a second stage transformer coupling circuit 102, and a third stage transformer coupling circuit 103; the single-ended to differential conversion circuit 100, the first-stage transformer coupling circuit 101, the second-stage transformer coupling circuit 102 and the third-stage transformer coupling circuit 103 are electrically connected in sequence; the single-ended to differential circuit 100 is configured to convert a received millimeter wave signal into a differential output signal; the first-stage transformer coupling circuit 101 is used for realizing noise reduction processing of differential signals; the second transformer coupling circuit 102 is used for realizing gain first-stage amplification processing, and the third transformer coupling circuit 103 is used for realizing gain second-stage amplification processing.
Specifically, in the present embodiment, the single-ended to differential circuit 100 includes: balun B1; the input end of the balun B1 is connected with a radio frequency signal input end RF; the middle tap of the balun B1 output is connected with a first bias power supply VB 1; the output end of the balun B1 is connected with the input end of the first-stage transformer coupling circuit 101.
Millimeter wave signals received from the antenna are input to the input end of the balun B1, single-end input signals are converted into differential output, and isolation of radio frequency input RF and grid bias voltage is achieved, so that an input blocking capacitor is omitted, and noise performance is improved.
Specifically, in the present embodiment, the first-stage transformer coupling circuit 101 includes: a first NMOS transistor M1, a second NMOS transistor M2, a first capacitor C1, a second capacitor C2, and a first transformer T1; the gate of the first NMOS transistor M1 is connected to one end of the single-ended to differential circuit 100, i.e., the gate of the first NMOS transistor M1 is connected to one end of the balun B1 output; the gate of the first NMOS transistor M1 is further connected to one end of a first capacitor C1, and the other end of the first capacitor C1 is connected to the drain of the second NMOS transistor M2; the source of the first NMOS transistor M1 is connected to ground; the drain of the first NMOS transistor M1 is connected to one end of the primary winding of the first transformer T1; the gate M2 of the second NMOS transistor is connected to the other end of the single-ended to differential circuit 100, that is, the gate of the second NMOS transistor M2 is connected to the other end of the balun B1 output; the gate of the second NMOS transistor M2 is further connected to one end of a second capacitor C2, and the other end of the second capacitor C2 is connected to the drain of the first NMOS transistor M1; the source of the second NMOS transistor M2 is connected to ground; the drain of the second NMOS transistor M2 is connected to the other end of the primary winding of the first transformer T1; the middle tap of the primary coil of the first transformer T1 is connected to the reference power supply VDD; a center tap of a secondary coil of the first transformer T1 is connected to a second bias power supply VB 2; the secondary winding of the first transformer T1 has two ends connected to the second stage transformer coupling circuit 102.
The negative feedback introduced by the gate-drain parasitic capacitance Cgd of the transistor lowers the gain and deteriorates the input-output isolation, affecting the matching performance. Cross-coupling neutralizing capacitances are therefore employed to counteract the effect of Cgd, thereby improving gain. The input front end adopts a single balanced-double balanced converter (balun B1) to convert a single-end signal into a differential signal, and the interstage adopts transformer coupling to reduce insertion loss and chip area. The influence of the gate-drain parasitic capacitance Cgd of the first NMOS transistor M1 can be eliminated by the first capacitance C1 connected across. The small signal current flowing through Cgd and C1 are opposite in direction, and under the condition that the currents are equal and the capacitance value of C1 is equal to that of Cgd, the influence of Cgd can be completely eliminated, so that the high gain of the amplifier is improved, and meanwhile, no extra power consumption is introduced. The effect of Cgd can also be eliminated by bridging the capacitance for other NMOS transistors in the same way. The adverse effect of the gate-drain parasitic capacitance Cgd is eliminated by the first capacitance C1 connected across the first NMOS transistor M1 and the second capacitance C2 connected across the second NMOS transistor M2, thereby achieving gain enhancement over a wider frequency band and significantly improving the gain and stability of the low noise amplifier.
Specifically, in the present embodiment, the second-stage transformer coupling circuit 102 includes: a third NMOS transistor M3, a fourth NMOS transistor M4, a third capacitor C3, a fourth capacitor C4, and a second transformer T2.
The gate of the third NMOS transistor M3 is connected to one end of the first-stage transformer coupling circuit 101, i.e., the gate of the third NMOS transistor M3 is connected to one end of the secondary winding of the first transformer T1; the gate of the third NMOS transistor M3 is further connected to one end of a third capacitor C3, and the other end of the third capacitor C3 is connected to the drain of the fourth NMOS transistor M4; the source of the third NMOS transistor M3 is connected to ground; the drain of the third NMOS transistor M3 is connected to one end of the primary coil of the second transformer T2.
The gate of the fourth NMOS transistor M4 is connected to the other end of the first-stage transformer coupling circuit 101, i.e., the gate of the fourth NMOS transistor M4 is connected to the other end of the secondary winding of the first transformer T1; the gate of the fourth NMOS transistor M4 is further connected to one end of a fourth capacitor C4, and the other end of the fourth capacitor C4 is connected to the drain of the third NMOS transistor M3; the source of the fourth NMOS transistor M4 is connected to ground; the drain of the fourth NMOS transistor M4 is connected to the other end of the primary coil of the second transformer T2.
The middle tap of the primary coil of the second transformer T2 is connected to the reference power supply VDD; a center tap of a secondary coil of the second transformer T2 is connected to a third bias power supply VB 3; both ends of the secondary coil of the second transformer T2 are connected to the third-stage transformer coupling circuit 103.
The influence of the gate-drain parasitic capacitance Cgd is eliminated by the third capacitance C3 across the third NMOS transistor M3 and the fourth capacitance C4 across the fourth NMOS transistor M4.
Specifically, in the present embodiment, the third-stage transformer coupling circuit 103 includes: a fifth NMOS transistor M5, a sixth NMOS transistor M6, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, and a third transformer T3.
The gate of the fifth NMOS transistor M5 is connected to one end of the second-stage transformer coupling circuit 102, i.e., the gate of the fifth NMOS transistor M5 is connected to one end of the secondary winding of the second transformer T2; the gate of the fifth NMOS transistor M5 is further connected to one end of a fifth capacitor C5, and the other end of the fifth capacitor C5 is connected to the drain of the sixth NMOS transistor M6; the source of the fifth NMOS transistor M5 is connected to ground; the drain of the fifth NMOS transistor M5 is connected to one end of the primary coil of the third transformer T3.
The gate of the sixth NMOS transistor M6 is connected to the other end of the second-stage transformer coupling circuit 102, i.e., the gate of the sixth NMOS transistor M6 is connected to the other end of the secondary winding of the second transformer T2; the gate of the sixth NMOS transistor M6 is further connected to one end of a sixth capacitor C6, and the other end of the sixth capacitor C6 is connected to the drain of the fifth NMOS transistor M5; the source of the sixth NMOS transistor M6 is connected to ground; the drain of the sixth NMOS transistor M6 is connected to the other end of the primary winding of the third transformer T3; the middle tap of the primary coil of the third transformer T3 is connected to the reference power supply VDD; a middle tap of a secondary coil of the third transformer T3 is connected to one end of a seventh capacitor C7; the other end of the seventh capacitor C7 is connected with the ground wire; two ends of the secondary coil of the third transformer T3 are output ends V respectivelyON、VOP。
The influence of the gate-drain parasitic capacitance Cgd is eliminated by the fifth capacitance C5 across the fifth NMOS transistor M5 and the sixth capacitance C6 across the sixth NMOS transistor M6.
In other embodiments, the single-ended to differential circuit 100, the first stage transformer coupling circuit 101, the second stage transformer coupling circuit 102, and the third stage transformer coupling circuit 103 may be electrically connected in other manners.
By controlling the levels of the three bias power supplies VB1-VB3, the transmission signal power can be controlled. For example, by increasing the bias voltage, the amplitude of the transmission signal can be increased, thereby improving the signal-to-noise ratio index.
In the millimeter wave frequency band, because the intrinsic gain of the transistor is seriously reduced, in order to obtain enough gain, a multi-stage cascade structure can be designed and adopted. The differential structure is used for improving the common mode rejection of the circuit, the amplifier adopts three-stage amplification, the first stage realizes the optimal design of noise, the second stage and the third stage realize the optimal design of gain, the input front end realizes the conversion of signals from single end to differential, and the interstage adopts the transformer coupling mode, thereby being beneficial to high-speed data transmission.
The design of the low noise amplifier mainly aims to realize a low noise coefficient and sufficient gain, and also aims to ensure sufficient input dynamic range, wider bandwidth and good stability, and the miniaturization is also a more important design index. Because of the characteristics of millimeter wave high frequency and wide bandwidth, the low-noise amplifier circuit is basically designed and processed by adopting a germanium-silicon process; the maximum available rf signal gain of CMOS process devices is limited, resulting in less design using CMOS processes.
The application provides a millimeter wave receiving low noise amplifier can design on the CMOS technology and realize, can obtain great input dynamic range, through adjusting VB1, VB2, the three bias voltage of VB3, can improve signal output amplitude, improves the SNR, improves the noise figure, and sensitivity is improved, be suitable for with millimeter wave receiving system front end processing application occasion.
The front and rear coils of the transformers (T1, T2, T3) used in the first stage transformer coupling circuit 101, the second stage transformer coupling circuit 102 and the third stage transformer coupling circuit 103 all adopt a vertical stack structure of two layers of metals as shown in fig. 3. The transformer adopting the structure can obtain higher coupling coefficient than the transformer adopting the same layer of metal parallel plane structure. And the design rule limits that the distance between two rows of metals is larger than that of a vertical stacking structure of two layers of metals when the same layer of metals are arranged in parallel planes. This vertical stack of two layers of metal achieves a higher coupling coefficient, thereby reducing insertion loss.
In addition, the multi-turn inductor can provide a large inductance value with a small area, but the self-resonant frequency thereof is reduced due to the coupling capacitance between the metal turns, and therefore, the front and rear turns of the transformers (T1, T2, T3) used in the first-stage transformer coupling circuit 101, the second-stage transformer coupling circuit 102, and the third-stage transformer coupling circuit 103 can adopt a single-turn structure.
The present application also provides a millimeter wave receiver using the above millimeter wave reception low noise amplifier.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A millimeter wave receiving low noise amplifier, comprising: the single-ended to differential conversion circuit comprises a single-ended to differential conversion circuit, a first-stage transformer coupling circuit and a second-stage transformer coupling circuit; the single-ended to differential conversion circuit, the first-stage transformer coupling circuit and the second-stage transformer coupling circuit are electrically connected in sequence; the single-end to differential circuit is used for converting the received millimeter wave signal into a differential output signal; the first-stage transformer coupling circuit is used for realizing noise reduction processing of differential signals; and the second-stage transformer coupling circuit is used for realizing gain first-stage amplification processing.
2. The amplifier of claim 1, wherein the single-ended to differential circuit comprises: a balun; the input end of the balun is connected with a radio frequency signal input end; the middle tap of the balun output is connected with a first bias power supply; and the output end of the balun is connected with the input end of the first-stage transformer coupling circuit.
3. The amplifier of claim 1, wherein the first stage transformer coupling circuit comprises: the first NMOS transistor, the second NMOS transistor, the first capacitor, the second capacitor and the first transformer; the grid electrode of the first NMOS transistor is connected with one end of the single-end to differential circuit, the grid electrode of the first NMOS transistor is also connected with one end of the first capacitor, and the other end of the first capacitor is connected with the drain electrode of the second NMOS transistor; the source electrode of the first NMOS transistor is connected with the ground wire; the drain electrode of the first NMOS transistor is connected with one end of the primary coil of the first transformer; the grid electrode of the second NMOS transistor is connected with the other end of the single-ended to differential circuit, the grid electrode of the second NMOS transistor is also connected with one end of a second capacitor, and the other end of the second capacitor is connected with the drain electrode of the first NMOS transistor; the source electrode of the second NMOS transistor is connected with the ground wire; the drain electrode of the second NMOS transistor is connected with the other end of the primary coil of the first transformer; the middle tap of the primary coil of the first transformer is connected with a reference power supply; the center tap of the secondary coil of the first transformer is connected with a second bias power supply; and two ends of the secondary coil of the first transformer are connected with the second-stage transformer coupling circuit.
4. The amplifier of claim 1, wherein the second stage transformer coupling circuit comprises: a third NMOS transistor, a fourth NMOS transistor, a third capacitor, a fourth capacitor and a second transformer; the grid electrode of the third NMOS transistor is connected with one end of the first-stage transformer coupling circuit, the grid electrode of the third NMOS transistor is also connected with one end of a third capacitor, and the other end of the third capacitor is connected with the drain electrode of the fourth NMOS transistor; the source electrode of the third NMOS transistor is connected with the ground wire; the drain electrode of the third NMOS transistor is connected with one end of the primary coil of the second transformer; the grid electrode of the fourth NMOS transistor is connected with the other end of the first-stage transformer coupling circuit, the grid electrode of the fourth NMOS transistor is also connected with one end of a fourth capacitor, and the other end of the fourth capacitor is connected with the drain electrode of the third NMOS transistor; the source level of the fourth NMOS transistor is connected with the ground wire; the drain electrode of the fourth NMOS transistor is connected with the other end of the primary coil of the second transformer; the middle tap of the primary coil of the second transformer is connected with a reference power supply; and the middle tap of the secondary coil of the second transformer is grounded through a capacitor.
5. The amplifier of claim 1, further comprising: and the input end of the third-stage transformer coupling circuit is connected with the output end of the second-stage transformer coupling circuit.
6. The amplifier of claim 5, wherein the third stage transformer coupling circuit comprises: a fifth NMOS transistor, a sixth NMOS transistor, a fifth capacitor, a sixth capacitor and a third transformer; the grid electrode of the fifth NMOS transistor is connected with one end of the second-stage transformer coupling circuit, the grid electrode of the fifth NMOS transistor is also connected with one end of a fifth capacitor, and the other end of the fifth capacitor is connected with the drain electrode of the sixth NMOS transistor; the source level of the fifth NMOS transistor is connected with the ground wire; the drain electrode of the fifth NMOS transistor is connected with one end of the primary coil of the third transformer; the grid electrode of the sixth NMOS transistor is connected with the other end of the second-stage transformer coupling circuit, the grid electrode of the sixth NMOS transistor is also connected with one end of a sixth capacitor, and the other end of the sixth capacitor is connected with the drain electrode of the fifth NMOS transistor; the source level of the sixth NMOS transistor is connected with the ground wire; the drain electrode of the sixth NMOS transistor is connected with the other end of the primary coil of the third transformer; the middle tap of the primary coil of the third transformer is connected with a reference power supply; and the middle tap of the secondary coil of the third transformer is grounded through a capacitor.
7. The amplifier of claim 1, wherein the front and back windings of the transformer used in the first and second transformer coupling circuits are vertically stacked structures of two layers of metal.
8. The amplifier of claim 5, wherein the front and back windings of the transformer used in the third stage transformer coupling circuit are vertically stacked in two layers of metal.
9. The amplifier of claim 1, wherein the primary and secondary windings of the transformer used in the primary transformer coupling circuit and the secondary transformer coupling circuit each have a single-turn structure.
10. A millimeter wave receiver characterized in that it comprises a millimeter wave reception low noise amplifier according to any one of claims 1 to 9.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111934629A (en) * | 2020-07-24 | 2020-11-13 | 成都天锐星通科技有限公司 | Broadband high-linearity power amplifier |
| CN115088187A (en) * | 2021-12-20 | 2022-09-20 | 香港中文大学（深圳） | Push-push frequency doubler based on complementary transistor |
| CN116073767A (en) * | 2023-03-06 | 2023-05-05 | 华南理工大学 | Differential low-noise amplifier and communication equipment |
| WO2023078056A1 (en) * | 2021-11-05 | 2023-05-11 | 深圳飞骧科技股份有限公司 | High-efficiency radio frequency power amplifier |
| CN116192067A (en) * | 2023-04-28 | 2023-05-30 | 广东工业大学 | Transistor stack voltage swing enhanced power amplifier |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111934629A (en) * | 2020-07-24 | 2020-11-13 | 成都天锐星通科技有限公司 | Broadband high-linearity power amplifier |
| CN111934629B (en) * | 2020-07-24 | 2021-06-11 | 成都天锐星通科技有限公司 | Broadband high-linearity power amplifier |
| WO2023078056A1 (en) * | 2021-11-05 | 2023-05-11 | 深圳飞骧科技股份有限公司 | High-efficiency radio frequency power amplifier |
| CN115088187A (en) * | 2021-12-20 | 2022-09-20 | 香港中文大学（深圳） | Push-push frequency doubler based on complementary transistor |
| CN116073767A (en) * | 2023-03-06 | 2023-05-05 | 华南理工大学 | Differential low-noise amplifier and communication equipment |
| CN116192067A (en) * | 2023-04-28 | 2023-05-30 | 广东工业大学 | Transistor stack voltage swing enhanced power amplifier |
| CN116192067B (en) * | 2023-04-28 | 2023-08-15 | 广东工业大学 | Transistor stack voltage swing enhanced power amplifier |
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