CN210899213U - Power cable data fusion gateway device based on Internet of things - Google Patents

Abstract

The utility model discloses a power cable data fusion gateway device based on thing networking, which comprises a housin, the inside circuit board that is equipped with of casing, be equipped with the ARM treater on the circuit board, power module for the bottom plate power supply, serial module, CAN field bus port module, USB port module, ethernet mouth module and zigBee wireless sensor network module, this device adopts the high reliability communication management device of the real-time multitask system of high performance low-power processor, support multiple communication protocol, realize power cable microcomputer protection, observe and control, the instrument, intelligent electronic device such as power cable on-line monitoring and intelligent auxiliary assembly and pearl sea multiple state volume monitoring host computer system, the information interaction between the grid automation system. The method is suitable for a comprehensive automation system, a dispatching automation system and a power distribution automation system which are large in scale and high in requirement.

Description

Power cable data fusion gateway device based on Internet of things

Technical Field

The utility model relates to a power grid monitoring field, more specifically relates to a power cable data fusion gateway device based on thing networking.

Background

With the acceleration of urbanization process, the scale of urban power cables is increasing. In the last five years, the annual average growth rate of the total length of the operated high-voltage cables of more than 110kV in the Zhuhai area reaches 20 percent, on one hand, the scale of a power grid is continuously enlarged, the number of urban underground cables is increased rapidly, and the power supply reliability pressure is improved; on the other hand, the manpower resource is relatively in short supply, and the development of maintenance force cannot keep pace with the development of cable scale. Aiming at the outstanding contradiction, various domestic large power enterprises are beginning to devote themselves to research on state evaluation and diagnostic analysis technologies based on cable online monitoring comprehensive data, increasingly more cable monitoring devices are provided, the device protocols are various, various protocols such as Lora, ZigBee and Wifi are wireless, various protocol interface devices such as RS485, RS232 and CAN are wired, the gateway is connected with the devices, the devices or remote nodes are uniformly connected, effective networking is realized, if the data are effectively and efficiently packaged and uploaded after the connection, the server side is provided with interfaces in any form, the device is disconnected and processed, the device information is processed and distributed, and the device are linked.

The high-voltage cable line which is installed in the pearl sea area and is monitored on line at present comprises 41 loops of sheath circulation, 8 loops of optical fiber temperature measurement, 2 loops of partial discharge and 40 video monitoring points, a large amount of monitoring data is generated, if the data are transmitted to cloud computing for data management, analysis and decision, the cost is high, the efficiency is low, and the development of network infrastructure can be hindered, so that the network delay problem is caused. Especially, media information such as audio and video data has huge data volume and huge occupied bandwidth, and especially when artificial intelligence is gradually popularized and landed, the core point of the method is to extract structured frame data from video data through deep learning such as a neural network CNN, so as to realize semantic analysis, object recognition and the like.

SUMMERY OF THE UTILITY MODEL

The utility model provides a power cable data fusion gateway device based on thing networking accomplishes the integration of agreement, realizes the information acquisition of the multinode equipment under the different agreements of edge end.

In order to solve the technical problem, the technical scheme of the utility model as follows:

the utility model provides a power cable data fusion gateway device based on thing networking, includes the casing, and the inside circuit board that is equipped with of casing is equipped with the ARM treater on the circuit board, for power module, serial module, CAN field bus port module, USB port module, ethernet port module and zigBee wireless sensor network module of bottom plate power supply, wherein:

the serial port module provides a serial port function and is communicated with the ARM processor and the external module;

the CAN field bus port module collects data of sensor equipment on a field bus and is connected with the ARM processor;

the USB port module is connected with various external devices and is in communication connection with the Internet of things gateway system;

the Ethernet port module is connected with the ARM processor;

the ZigBee wireless sensor network module is connected with the ARM processor to realize the signal receiving and transmitting function.

Preferably, the circuit board is an S3C2440 core board.

Preferably, the power supply module is a voltage conversion circuit damaged by an S3C2440 core board, and is supplied with power through an external 5V direct current voltage and converted into voltages of 3.3V and 1.25V through the voltage conversion circuit.

Preferably, the serial port module includes a MAX3232 chip, a capacitor C54, a capacitor C55, a capacitor C56, a capacitor C58, and a capacitor C59, where:

the C1+ end of the MAX3232 chip is electrically connected with one end of a capacitor C55, and the other end of the capacitor C55 is electrically connected with the C1-end of the MAX3232 chip;

the V + end of the MAX3232 chip is electrically connected with one end of a capacitor C56, the V-end of the MAX3232 chip is electrically connected with one end of a capacitor C59, and the VSS end of the MAX3232 chip, the other end of the capacitor C56 and the other end of the capacitor C59 are all grounded;

the C2+ end of the MAX3232 chip is electrically connected with one end of a capacitor C58, and the other end of the capacitor C58 is electrically connected with the C2-end of the MAX3232 chip;

the VDD end of the MAX3232 chip is respectively electrically connected with the 3.3V voltage provided by the power supply module and one end of the capacitor C54, and the other end of the capacitor C54 is grounded.

Preferably, the CAN fieldbus port module comprises an MCP2510 chip, a TJA1050 chip, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a crystal oscillator Y1, a capacitor C1, and a capacitor C2, wherein:

the VDD end of the MCP2510 chip is connected with the 3.3V voltage of the power supply module, and the Vss end of the MCP2510 chip is grounded;

RESET end of S3C2440 core board and MCP2510 chip

The end is electrically connected, the GPIO1 end of the S3C2440 core board is connected with the MCP2510 chip

The termination is electrically connected, the SPI SCK end of S3C2440 core plate is electrically connected with the SCK termination of MCP2510 chip, the SPI MOSI end of S3C2440 core plate is electrically connected with the SI termination of MCP2510 chip, the SPI MISO end of S3C2440 core plate is electrically connected with the SO termination of MCP2510 chip, the EXINT end of S3C2440 core plate and the MCP2510 chip

End electrical connection;

the TXCAN end of the MCP2510 chip is electrically connected with the TXD end of the TJA1050 chip, the RXCAN end of the MCP2510 chip is electrically connected with one end of a resistor R1 and one end of a resistor R2 respectively, the OSC2 end of the MCP2510 chip is electrically connected with one end of a capacitor C1 and one end of a crystal oscillator Y1 respectively, the OSC1 end of the MCP2510 chip is electrically connected with one end of a capacitor C2 and the other end of a crystal oscillator Y1 respectively, the RX1BUF end of the MCP2510 chip is electrically connected with one end of a resistor R5, and the RX0BUF end of the MCP2510 chip is electrically connected with one end of a resistor R;

the other end of the resistor R2, the other end of the capacitor C1 and the other end of the capacitor C2 are all grounded, and the other end of the resistor R5 and the other end of the resistor R6 are both connected with the 3.3V voltage of the power supply module;

the other end of the resistor R1 is electrically connected with an RXD end of the TJA1050 chip, an Rs end of the TJA1050 chip is electrically connected with one end of a resistor R3, the other end of the resistor R3 is grounded, a Vcc end of the TJA1050 chip is connected with 5V voltage of the power supply module, a CANH end of the TJA1050 chip is electrically connected with one end of a resistor R4, and a CANL end of the TJA1050 chip is electrically connected with the other end of the resistor R4.

Preferably, the USB port module includes two USB interfaces, USB Host and USB Slave.

Preferably, the USB Host includes a USB Hub chip, a USB bor chip, a resistor R63, a resistor R64, a resistor R60, a capacitor C12, a resistor R61, a resistor R62, a resistor R70, a resistor R69, a capacitor C13, a capacitor C14, and a crystal oscillator Y4, wherein:

the USB4_ DP end of the USB Hub chip is electrically connected with one end of a resistor R63, the GANGPOWER end of the USB Hub chip is electrically connected with one end of a resistor R64, the VCC5O end of the USB Hub chip and the other end of a resistor R63 are connected, the other end of a resistor R64 is connected with 5V voltage of a power supply module, the VCC3V end of the USB Hub chip is electrically connected with one end of a capacitor C12 and one end of a resistor R60 respectively, the other end of the capacitor C12 is grounded, and the other end of the resistor R60 is electrically connected with the USB _ DP end of the USB Hub chip;

the USB1_ DM end of the USB Hub chip is respectively and electrically connected with one end of a resistor R61 and the D-end of the USBPOR chip, the USB _ DP end of the USBHub chip is respectively and electrically connected with one end of a resistor R62 and the D + end of the USBPOR chip, and the VBUS end of the USBPOR chip is connected with the 5V voltage of the power supply module;

the end X2 of the USB Hub chip is electrically connected with one end of a resistor R69, the end X1 of the USB Hub chip is electrically connected with one end of a resistor R70, the other end of the resistor R69 is electrically connected with one end of a capacitor C14 and one end of a crystal oscillator Y4, the other end of the resistor R70 is electrically connected with one end of the capacitor C13 and the other end of the crystal oscillator Y4, and the other end of the capacitor C13 and the other end of the capacitor C14 are grounded.

Preferably, the USB Slave includes a USBD chip, a resistor R30, a resistor R29, a resistor R25, and a resistor R26, wherein:

the VBUS end of the USBD chip is connected with a 5V power supply of the power supply module, the D-end of the USBD chip is electrically connected with one end of a resistor R25, the D + end of the USBD chip is electrically connected with one end of a resistor R26, the GND end of the USBD chip is connected with one end of a resistor R30 and is grounded, and the other end of the resistor R30 is electrically connected with the D-end of the USBD chip.

Preferably, the ethernet port module includes an HR911103 chip, a DM9000 chip, a resistor RD5, a resistor RD1, a resistor R52, a resistor R53, a resistor RD6, a resistor RD3, a capacitor CD1, a capacitor C67, a capacitor C68, a resistor R83, a capacitor C69, a capacitor C6, a crystal oscillator X1, a resistor R82, a resistor R76, a resistor R34, a resistor R8, and a resistor R13, wherein:

the TD + end of an HR911103 chip is electrically connected with one end of a resistor RD5, the TD-end of the HR911103 chip is electrically connected with one end of a resistor RD1, the GLEDA end of the HR911103 chip is electrically connected with one end of a resistor R52, the YLEDA end of the HR911103 chip is electrically connected with one end of a resistor R53, the YLEDK end of the HR911103 chip is electrically connected with one end of a resistor R34, one end of a resistor R8 and one end of a resistor R13 respectively, the 3 end of the HR911103 chip is electrically connected with one end of a capacitor C67, the 6 end of the HR911103 chip is electrically connected with one end of a capacitor C68, the RD + end of the HR911103 chip is electrically connected with one end of a resistor RD6, the RD-end of the HR911103 chip is electrically connected with one end of a resistor RD3, the A end of the HR911103 chip is electrically connected with the B end of the capacitor C911103 chip and one end of a capacitor CD1 respectively, the other end of the capacitor C67 and the other end of the capacitor C96 68 are grounded, and;

the other end of the resistor R34 is electrically connected with the WACKUP end of the DM9000 chip, the other end of the resistor R8 is electrically connected with the LINK _ O end of the DM9000 chip, the other end of the resistor R13 is electrically connected with the SPEED # end of the DM9000 chip, the BGRES end of the DM9000 chip is electrically connected with one end of the resistor R83, the other end of the resistor R83 is grounded, the X2_25M end of the DM9000 chip is electrically connected with one end of a capacitor C69 and one end of a crystal oscillator X1 respectively, the X1_25M end of the DM9000 chip is electrically connected with one end of a capacitor C6 and the other end of a crystal oscillator X1 respectively, the other end of a capacitor C69 and the other end of a capacitor C6 are both grounded, the EECS end of the DM9000 chip is electrically connected with one end of a resistor R82, the IOWAIT end of the DM9000 chip is electrically connected with one end of a resistor R76, and the other end of the resistor R82 and.

Preferably, the ZigBee wireless sensor network module comprises a CC2430 chip, a capacitor C431, a capacitor C421, a capacitor C411, a capacitor C441, a capacitor C351, a crystal Y3, a capacitor C71, a capacitor C191, a capacitor C211, a crystal Y2, a resistor R261, a capacitor C231, a capacitor C241, a capacitor C251, a capacitor C281, a resistor R221, an inductor L321, an inductor L331, an inductor 341, a capacitor C341, and an antenna, wherein:

the ends of a CC2430 chip P2_3/XOSC _ Q1 are respectively and electrically connected with one end of a capacitor C441 and one end of a crystal oscillator Y3, the ends of a CC2430 chip P2_4/XOSC _ Q2 are respectively and electrically connected with one end of a capacitor C431 and the other end of a crystal oscillator Y3, the end of a CC2430 chip DCOUPL is electrically connected with one end of a capacitor C421, the end of a CC2430 chip AVDD _ DREG is electrically connected with one end of a capacitor C411, the end of a CC2430 chip AVDD _ DGU ARD is respectively and electrically connected with one end of a capacitor C351, the end of a CC2430 chip RREG _ OOUT, one end of a capacitor C241, one end of a capacitor C251 and one end of a capacitor C281, the other end of the capacitor C441, the other end of the capacitor C431, the other end of the capacitor C421, the other end of the capacitor C411, the other end of the capacitor C351, the;

the DVDD end of the CC2430 chip is electrically connected with one end of a capacitor C71, and the other end of the capacitor C71 is grounded;

an XOSC _ Q2 end of the CC2430 chip is electrically connected with one end of a capacitor C191 and one end of a crystal oscillator Y2 respectively, an XOSC _ Q1 end of the CC2430 chip is electrically connected with one end of a capacitor C211 and the other end of a crystal oscillator Y2 respectively, an RBIASI end of the CC2430 chip is electrically connected with one end of a resistor R261, an AVDD _ RREG end of the CC2430 chip is electrically connected with one end of a capacitor C231, and the other end of the capacitor C191, the other end of the capacitor C211, the other end of the resistor R261 and the other end of the capacitor C231 are all grounded;

an RF _ N end of the CC2430 chip is electrically connected with one end of an inductor L321 and one end of an inductor L341 respectively, a TXRX _ SWITCH end of the CC2430 chip is electrically connected with one end of an inductor L331, an RF _ P end of the CC2430 chip is electrically connected with the other end of the inductor L321, the other end of the inductor L331 and one end of the inductor L341 respectively, an RF _ N end RBIAS2 end of the CC2430 chip is electrically connected with one end of a resistor R221, the other end of the resistor R221 is grounded, the other end of the inductor L341 is electrically connected with one end of a capacitor C341, and the other end of the capacitor C341 is connected with an antenna.

Compared with the prior art, the utility model discloses technical scheme's beneficial effect is:

the utility model discloses a high reliability communication management device of real-time multitask system of high performance low-power processor is an important component part of power cable on-line monitoring system, has expanded out the way serial ports on the gateway system board in the hardware design, net gape, crossing, wait multiple diversified port to make things convenient for the access of the heterogeneous subnet equipment of various. The system supports various communication protocols, and realizes information interaction between intelligent electronic devices such as power cable microcomputer protection, measurement and control, instruments, power cable on-line monitoring and intelligent auxiliary equipment and the like, and a Zhuhai multi-state quantity monitoring main computer system and a power grid automation system. The method is suitable for a comprehensive automation system, a dispatching automation system and a power distribution automation system which are large in scale and high in requirement.

Drawings

Fig. 1 is a schematic diagram of module connection according to the present invention.

Fig. 2 is a schematic circuit diagram of a serial port module.

FIG. 3 is a circuit schematic diagram of a CAN Fieldbus port module.

FIG. 4 is a schematic diagram of a USB Host circuit.

Fig. 5 is a schematic circuit diagram of a USB Slave.

Fig. 6 is a circuit diagram of an ethernet port module.

Fig. 7 is a schematic circuit diagram of a ZigBee wireless sensor network module.

Detailed Description

The drawings are for illustrative purposes only and are not to be construed as limiting the patent;

for the purpose of better illustrating the embodiments, certain features of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product;

it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.

The technical solution of the present invention will be further explained with reference to the accompanying drawings and examples.

Example 1

This embodiment provides a power cable data fusion gateway device based on thing networking, like fig. 1, including the casing, the inside circuit board that is equipped with of casing is equipped with the ARM treater on the circuit board, for power module, serial module, CAN field bus port module, USB port module, ethernet port module and the zigBee wireless sensor network module of bottom plate power supply, wherein:

the serial port module provides a serial port function and is communicated with the ARM processor and the external module;

the CAN field bus port module collects data of sensor equipment on a field bus and is connected with the ARM processor;

the USB port module is connected with various external devices and is in communication connection with the Internet of things gateway system;

the Ethernet port module is connected with the ARM processor;

the ZigBee wireless sensor network module is connected with the ARM processor to realize the signal receiving and transmitting function.

The circuit board is an S3C2440 core board.

The power supply module is a voltage conversion circuit damaged by an S3C2440 core board, supplies power through external 5V direct-current voltage, and converts the power into 3.3V and 1.25V voltages through the voltage conversion circuit.

The serial port module is shown in fig. 2, and includes a MAX3232 chip, a capacitor C54, a capacitor C55, a capacitor C56, a capacitor C58, and a capacitor C59, where:

the C1+ end of the MAX3232 chip is electrically connected with one end of a capacitor C55, and the other end of the capacitor C55 is electrically connected with the C1-end of the MAX3232 chip;

the V + end of the MAX3232 chip is electrically connected with one end of a capacitor C56, the V-end of the MAX3232 chip is electrically connected with one end of a capacitor C59, and the VSS end of the MAX3232 chip, the other end of the capacitor C56 and the other end of the capacitor C59 are all grounded;

the C2+ end of the MAX3232 chip is electrically connected with one end of a capacitor C58, and the other end of the capacitor C58 is electrically connected with the C2-end of the MAX3232 chip;

the VDD end of the MAX3232 chip is respectively and electrically connected with the 3.3V voltage provided by the power supply module and one end of a capacitor C54, and the other end of the capacitor C54 is grounded;

the interface circuit for serial module communication is generally used for connecting short-range communication modules such as coordinator nodes, readers and the like in the application of the Internet of things. 3 serial ports UARTO, 1 and 2 of RS232 are designed on a bottom plate of the gateway system of the Internet of things, wherein the UARTO and 1 can be combined into a full-function serial port, and under most conditions, only 3 simple serial port functions, namely receiving, sending and grounding, are used.

The CAN field bus port module is shown in FIG. 3 and comprises an MCP2510 chip, a TJA1050 chip, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a crystal oscillator Y1, a capacitor C1 and a capacitor C2, wherein:

the VDD end of the MCP2510 chip is connected with the 3.3V voltage of the power supply module, and the Vss end of the MCP2510 chip is grounded;

RESET end of S3C2440 core board and MCP2510 chip

The end is electrically connected, the GPIO1 end of the S3C2440 core board is connected with the MCP2510 chip

The termination is electrically connected, the SPI SCK end of S3C2440 core plate is electrically connected with the SCK termination of MCP2510 chip, the SPI MOSI end of S3C2440 core plate is electrically connected with the SI termination of MCP2510 chip, the SPI MISO end of S3C2440 core plate is electrically connected with the SO termination of MCP2510 chip, the EXINT end of S3C2440 core plate and the MCP2510 chip

End electrical connection;

the TXCAN end of the MCP2510 chip is electrically connected with the TXD end of the TJA1050 chip, the RXCAN end of the MCP2510 chip is electrically connected with one end of a resistor R1 and one end of a resistor R2 respectively, the OSC2 end of the MCP2510 chip is electrically connected with one end of a capacitor C1 and one end of a crystal oscillator Y1 respectively, the OSC1 end of the MCP2510 chip is electrically connected with one end of a capacitor C2 and the other end of a crystal oscillator Y1 respectively, the RX1BUF end of the MCP2510 chip is electrically connected with one end of a resistor R5, and the RX0BUF end of the MCP2510 chip is electrically connected with one end of a resistor R;

the other end of the resistor R2, the other end of the capacitor C1 and the other end of the capacitor C2 are all grounded, and the other end of the resistor R5 and the other end of the resistor R6 are both connected with the 3.3V voltage of the power supply module;

the other end of the resistor R1 is electrically connected with an RXD end of the TJA1050 chip, an Rs end of the TJA1050 chip is electrically connected with one end of a resistor R3, the other end of the resistor R3 is grounded, a Vcc end of the TJA1050 chip is connected with 5V voltage of the power supply module, a CANH end of the TJA1050 chip is electrically connected with one end of a resistor R4, and a CANL end of the TJA1050 chip is electrically connected with the other end of the resistor R4;

the CAN field bus port module expands a port in the gateway system of the Internet of things, so that data of sensor equipment on a field bus CAN be acquired. The CAN port is designed and realized by a method of expanding a CAN bus interface chip on an external bus of an embedded microprocessor, and the bus interface chip MCP2510 of Microchip company is adopted to carry out interface expansion design on S3C 2440.

The USB port module comprises two USB interfaces, namely a USB Host and a USB Slave. One of the two USB interfaces is a USB Host which is expanded into a 4-port USB Host through a USB Hub chip, and the USB Host is the same as a common USB interface at a PC end and can be used for connecting various sensors such as a camera, a USB wireless network card, a 4G network card and the like and wireless network communication equipment. The wireless local area network (Wifi) can be constructed by accessing the wireless network card and the AP wireless access node, and data in the wireless sensor network based on the Wifi is uploaded to the Internet of things gateway system. Wide area wireless communication can be achieved by accessing a 4G network card. The other port is used as a USB Slave download port and is generally used for downloading programs and software to an Internet of things gateway board.

The USB Host is shown in FIG. 4 and comprises a USB Hub chip, a USBPOR chip, a resistor R63, a resistor R64, a resistor R60, a capacitor C12, a resistor R61, a resistor R62, a resistor R70, a resistor R69, a capacitor C13, a capacitor C14 and a crystal oscillator Y4, wherein:

the USB4_ DP end of the USB Hub chip is electrically connected with one end of a resistor R63, the GANGPOWER end of the USB Hub chip is electrically connected with one end of a resistor R64, the VCC5O end of the USB Hub chip and the other end of a resistor R63 are connected, the other end of a resistor R64 is connected with 5V voltage of a power supply module, the VCC3V end of the USB Hub chip is electrically connected with one end of a capacitor C12 and one end of a resistor R60 respectively, the other end of the capacitor C12 is grounded, and the other end of the resistor R60 is electrically connected with the USB _ DP end of the USB Hub chip;

the USB1_ DM end of the USB Hub chip is respectively and electrically connected with one end of a resistor R61 and the D-end of the USBPOR chip, the USB _ DP end of the USBHub chip is respectively and electrically connected with one end of a resistor R62 and the D + end of the USBPOR chip, and the VBUS end of the USBPOR chip is connected with the 5V voltage of the power supply module;

the end X2 of the USB Hub chip is electrically connected with one end of a resistor R69, the end X1 of the USB Hub chip is electrically connected with one end of a resistor R70, the other end of the resistor R69 is electrically connected with one end of a capacitor C14 and one end of a crystal oscillator Y4, the other end of the resistor R70 is electrically connected with one end of the capacitor C13 and the other end of the crystal oscillator Y4, and the other end of the capacitor C13 and the other end of the capacitor C14 are grounded.

The USB Slave is shown in fig. 5, and includes a USBD chip, a resistor R30, a resistor R29, a resistor R25, and a resistor R26, where:

the VBUS end of the USBD chip is connected with a 5V power supply of the power supply module, the D-end of the USBD chip is electrically connected with one end of a resistor R25, the D + end of the USBD chip is electrically connected with one end of a resistor R26, the GND end of the USBD chip is connected with one end of a resistor R30 and is grounded, and the other end of the resistor R30 is electrically connected with the D-end of the USBD chip.

The Ethernet port module is shown in FIG. 6 and comprises an HR911103 chip, a DM9000 chip, a resistor RD5, a resistor RD1, a resistor R52, a resistor R53, a resistor RD6, a resistor RD3, a capacitor CD1, a capacitor C67, a capacitor C68, a resistor R83, a capacitor C69, a capacitor C6, a crystal oscillator X1, a resistor R82, a resistor R76, a resistor R34, a resistor R8 and a resistor R13, wherein:

the TD + end of an HR911103 chip is electrically connected with one end of a resistor RD5, the TD-end of the HR911103 chip is electrically connected with one end of a resistor RD1, the GLEDA end of the HR911103 chip is electrically connected with one end of a resistor R52, the YLEDA end of the HR911103 chip is electrically connected with one end of a resistor R53, the YLEDK end of the HR911103 chip is electrically connected with one end of a resistor R34, one end of a resistor R8 and one end of a resistor R13 respectively, the 3 end of the HR911103 chip is electrically connected with one end of a capacitor C67, the 6 end of the HR911103 chip is electrically connected with one end of a capacitor C68, the RD + end of the HR911103 chip is electrically connected with one end of a resistor RD6, the RD-end of the HR911103 chip is electrically connected with one end of a resistor RD3, the A end of the HR911103 chip is electrically connected with the B end of the capacitor C911103 chip and one end of a capacitor CD1 respectively, the other end of the capacitor C67 and the other end of the capacitor C96 68 are grounded, and;

the other end of the resistor R34 is electrically connected with a WACKUP end of the DM9000 chip, the other end of the resistor R8 is electrically connected with a LINK _ O end of the DM9000 chip, the other end of the resistor R13 is electrically connected with a SPEED # end of the DM9000 chip, a BGRES end of the DM9000 chip is electrically connected with one end of the resistor R83, the other end of the resistor R83 is grounded, an X2_25M end of the DM9000 chip is respectively electrically connected with one end of a capacitor C69 and one end of a crystal oscillator X1, an X1_25M end of the DM9000 chip is respectively electrically connected with one end of a capacitor C6 and the other end of a crystal oscillator X1, the other end of a capacitor C69 and the other end of a capacitor C6 are both grounded, an EECS end of the DM9000 chip is electrically connected with one end of a resistor R82, an IOWAIT end of the DM9000 chip is electrically connected with one end of a resistor R76, and the other end of the resistor R82 and;

the Ethernet port module adopts a common interface RJ45 and only needs to adopt a common network cable. The DM900 network card chip, the adaptive 10/100M network, the DM900 and the MCU can be connected in a bit or bit bus mode and can work in a half-duplex or full-duplex mode according to requirements. When the system is powered on, the MCU configures the interrupt register, network control register, etc. of the DM900 through the bus to complete the initialization of the DM900, and then the DM900 enters a data transceiving waiting state, and when the processor wants to send data to the ethernet, the data is first packed into UDP or IP packets, and is sent to the DM900 data sending buffer byte by byte through 8 bits or 16 bits. Then writing the information such as data length into the register corresponding to the DM900, and finally sending the enabling command. And framing the data and the data pause information in the buffer and sending out the data and the data pause information at the same time.

The ZigBee wireless sensor network module is shown in fig. 7, and includes a CC2430 chip, a capacitor C431, a capacitor C421, a capacitor C411, a capacitor C441, a capacitor C351, a crystal Y3, a capacitor C71, a capacitor C191, a capacitor C211, a crystal Y2, a resistor R261, a capacitor C231, a capacitor C241, a capacitor C251, a capacitor C281, a resistor R221, an inductor L321, an inductor L331, an inductor 341, a capacitor C341, and an antenna, where:

the ends of a CC2430 chip P2_3/XOSC _ Q1 are respectively and electrically connected with one end of a capacitor C441 and one end of a crystal oscillator Y3, the ends of a CC2430 chip P2_4/XOSC _ Q2 are respectively and electrically connected with one end of a capacitor C431 and the other end of a crystal oscillator Y3, the end of a CC2430 chip DCOUPL is electrically connected with one end of a capacitor C421, the end of a CC2430 chip AVDD _ DREG is electrically connected with one end of a capacitor C411, the end of a CC2430 chip AVDD _ DGU ARD is respectively and electrically connected with one end of a capacitor C351, the end of a CC2430 chip RREG _ OOUT, one end of a capacitor C241, one end of a capacitor C251 and one end of a capacitor C281, the other end of the capacitor C441, the other end of the capacitor C431, the other end of the capacitor C421, the other end of the capacitor C411, the other end of the capacitor C351, the;

the DVDD end of the CC2430 chip is electrically connected with one end of a capacitor C71, and the other end of the capacitor C71 is grounded;

an XOSC _ Q2 end of the CC2430 chip is electrically connected with one end of a capacitor C191 and one end of a crystal oscillator Y2 respectively, an XOSC _ Q1 end of the CC2430 chip is electrically connected with one end of a capacitor C211 and the other end of a crystal oscillator Y2 respectively, an RBIASI end of the CC2430 chip is electrically connected with one end of a resistor R261, an AVDD _ RREG end of the CC2430 chip is electrically connected with one end of a capacitor C231, and the other end of the capacitor C191, the other end of the capacitor C211, the other end of the resistor R261 and the other end of the capacitor C231 are all grounded;

an RF _ N end of the CC2430 chip is electrically connected with one end of an inductor L321 and one end of an inductor L341 respectively, a TXRX _ SWITCH end of the CC2430 chip is electrically connected with one end of an inductor L331, an RF _ P end of the CC2430 chip is electrically connected with the other end of the inductor L321, the other end of the inductor L331 and one end of the inductor L341 respectively, an RF _ N end RBIAS2 end of the CC2430 chip is electrically connected with one end of a resistor R221, the other end of the resistor R221 is grounded, the other end of the inductor L341 is electrically connected with one end of a capacitor C341, and the other end of the capacitor C341 is connected with an antenna.

The same or similar reference numerals correspond to the same or similar parts;

the terms describing positional relationships in the drawings are for illustrative purposes only and are not to be construed as limiting the patent;

it is obvious that the above embodiments of the present invention are only examples for clearly illustrating the present invention, and are not limitations to the embodiments of the present invention. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.

Claims (10)

1. The utility model provides a power cable data fusion gateway device based on thing networking, which comprises a housin, the inside circuit board that is equipped with of casing is equipped with the ARM treater on the circuit board, for power module, serial module, CAN field bus port module, USB port module, ethernet port module and zigBee wireless sensor network module of bottom plate power supply, wherein:

the serial port module provides a serial port function and is communicated with the ARM processor and the external module;

the CAN field bus port module collects data of sensor equipment on a field bus and is connected with the ARM processor;

the USB port module is connected with various external devices and is in communication connection with the Internet of things gateway system;

the Ethernet port module is connected with the ARM processor;

the ZigBee wireless sensor network module is connected with the ARM processor to realize the signal receiving and transmitting function.

2. The internet of things-based power cable data fusion gateway device of claim 1, wherein the circuit board is an S3C2440 core board.

3. The internet-of-things-based power cable data fusion gateway device according to claim 2, wherein the power supply module is a damaged voltage conversion circuit of an S3C2440 core board, and is powered by an external 5V direct current voltage and is converted into 3.3V and 1.25V voltages by the voltage conversion circuit.

4. The Internet of things-based power cable data fusion gateway device of claim 3, wherein the serial port module comprises a MAX3232 chip, a capacitor C54, a capacitor C55, a capacitor C56, a capacitor C58 and a capacitor C59, wherein:

the C1+ end of the MAX3232 chip is electrically connected with one end of a capacitor C55, and the other end of the capacitor C55 is electrically connected with the C1-end of the MAX3232 chip;

the V + end of the MAX3232 chip is electrically connected with one end of a capacitor C56, the V-end of the MAX3232 chip is electrically connected with one end of a capacitor C59, and the VSS end of the MAX3232 chip, the other end of the capacitor C56 and the other end of the capacitor C59 are all grounded;

the C2+ end of the MAX3232 chip is electrically connected with one end of a capacitor C58, and the other end of the capacitor C58 is electrically connected with the C2-end of the MAX3232 chip;

the VDD end of the MAX3232 chip is respectively electrically connected with the 3.3V voltage provided by the power supply module and one end of the capacitor C54, and the other end of the capacitor C54 is grounded.

5. The internet-of-things-based power cable data fusion gateway device of claim 4, wherein the CAN field bus port module comprises an MCP2510 chip, a TJA1050 chip, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a crystal oscillator Y1, a capacitor C1 and a capacitor C2, wherein:

the VDD end of the MCP2510 chip is connected with the 3.3V voltage of the power supply module, and the Vss end of the MCP2510 chip is grounded;

RESET end of S3C2440 core board and MCP2510 chip

The end is electrically connected, the GPIO1 end of the S3C2440 core board is connected with the MCP2510 chip

The termination is electrically connected, the SPI SCK end of S3C2440 core plate is electrically connected with the SCK termination of MCP2510 chip, the SPI MOSI end of S3C2440 core plate is electrically connected with the SI termination of MCP2510 chip, the SPI MISO end of S3C2440 core plate is electrically connected with the SO termination of MCP2510 chip, the EXINT end of S3C2440 core plate and the MCP2510 chip

End electrical connection;

the TXCAN end of the MCP2510 chip is electrically connected with the TXD end of the TJA1050 chip, the RXCAN end of the MCP2510 chip is electrically connected with one end of a resistor R1 and one end of a resistor R2 respectively, the OSC2 end of the MCP2510 chip is electrically connected with one end of a capacitor C1 and one end of a crystal oscillator Y1 respectively, the OSC1 end of the MCP2510 chip is electrically connected with one end of a capacitor C2 and the other end of a crystal oscillator Y1 respectively, the RX1BUF end of the MCP2510 chip is electrically connected with one end of a resistor R5, and the RX0BUF end of the MCP2510 chip is electrically connected with one end of a resistor R;

the other end of the resistor R2, the other end of the capacitor C1 and the other end of the capacitor C2 are all grounded, and the other end of the resistor R5 and the other end of the resistor R6 are both connected with the 3.3V voltage of the power supply module;

the other end of the resistor R1 is electrically connected with an RXD end of the TJA1050 chip, an Rs end of the TJA1050 chip is electrically connected with one end of a resistor R3, the other end of the resistor R3 is grounded, a Vcc end of the TJA1050 chip is connected with 5V voltage of the power supply module, a CANH end of the TJA1050 chip is electrically connected with one end of a resistor R4, and a CANL end of the TJA1050 chip is electrically connected with the other end of the resistor R4.

6. The internet-of-things-based power cable data fusion gateway device according to claim 5, wherein the USB port module comprises two USB interfaces, namely a USB Host and a USB Slave.

7. The internet-of-things-based power cable data fusion gateway device according to claim 6, wherein the USBHost comprises a USB Hub chip, a USBPOR chip, a resistor R63, a resistor R64, a resistor R60, a capacitor C12, a resistor R61, a resistor R62, a resistor R70, a resistor R69, a capacitor C13, a capacitor C14 and a crystal oscillator Y4, wherein:

the USB4_ DP end of the USB Hub chip is electrically connected with one end of a resistor R63, the GANGPOWER end of the USB Hub chip is electrically connected with one end of a resistor R64, the VCC5O end of the USB Hub chip and the other end of a resistor R63 are connected, the other end of a resistor R64 is connected with 5V voltage of a power supply module, the VCC3V end of the USB Hub chip is electrically connected with one end of a capacitor C12 and one end of a resistor R60 respectively, the other end of the capacitor C12 is grounded, and the other end of the resistor R60 is electrically connected with the USB _ DP end of the USB Hub chip;

the USB1_ DM end of the USB Hub chip is respectively and electrically connected with one end of the resistor R61 and the D-end of the USBPOR chip, the USB _ DP end of the USB Hub chip is respectively and electrically connected with one end of the resistor R62 and the D + end of the USBPOR chip, and the VBUS end of the USBPOR chip is connected with the 5V voltage of the power supply module;

the end X2 of the USB Hub chip is electrically connected with one end of a resistor R69, the end X1 of the USB Hub chip is electrically connected with one end of a resistor R70, the other end of the resistor R69 is electrically connected with one end of a capacitor C14 and one end of a crystal oscillator Y4, the other end of the resistor R70 is electrically connected with one end of the capacitor C13 and the other end of the crystal oscillator Y4, and the other end of the capacitor C13 and the other end of the capacitor C14 are grounded.

8. The internet-of-things-based power cable data fusion gateway device of claim 7, wherein the USBSlave comprises a USBD chip, a resistor R30, a resistor R29, a resistor R25 and a resistor R26, wherein:

the VBUS end of the USBD chip is connected with a 5V power supply of the power supply module, the D-end of the USBD chip is electrically connected with one end of a resistor R25, the D + end of the USBD chip is electrically connected with one end of a resistor R26, the GND end of the USBD chip is connected with one end of a resistor R30 and is grounded, and the other end of the resistor R30 is electrically connected with the D-end of the USBD chip.

9. The internet-of-things-based power cable data fusion gateway device according to claim 8, wherein the ethernet port module comprises an HR911103 chip, a DM9000 chip, a resistor RD5, a resistor RD1, a resistor R52, a resistor R53, a resistor RD6, a resistor RD3, a capacitor CD1, a capacitor C67, a capacitor C68, a resistor R83, a capacitor C69, a capacitor C6, a crystal oscillator X1, a resistor R82, a resistor R76, a resistor R34, a resistor R8, and a resistor R13, wherein:

the TD + end of an HR911103 chip is electrically connected with one end of a resistor RD5, the TD-end of the HR911103 chip is electrically connected with one end of a resistor RD1, the GLEDA end of the HR911103 chip is electrically connected with one end of a resistor R52, the YLEDA end of the HR911103 chip is electrically connected with one end of a resistor R53, the YLEDK end of the HR911103 chip is electrically connected with one end of a resistor R34, one end of a resistor R8 and one end of a resistor R13 respectively, the 3 end of the HR911103 chip is electrically connected with one end of a capacitor C67, the 6 end of the HR911103 chip is electrically connected with one end of a capacitor C68, the RD + end of the HR911103 chip is electrically connected with one end of a resistor RD6, the RD-end of the HR911103 chip is electrically connected with one end of a resistor RD3, the A end of the HR911103 chip is electrically connected with the B end of the capacitor C911103 chip and one end of a capacitor CD1 respectively, the other end of the capacitor C67 and the other end of the capacitor C96 68 are grounded, and;

the other end of the resistor R34 is electrically connected with the WACKUP end of the DM9000 chip, the other end of the resistor R8 is electrically connected with the LINK _ O end of the DM9000 chip, the other end of the resistor R13 is electrically connected with the SPEED # end of the DM9000 chip, the BGRES end of the DM9000 chip is electrically connected with one end of the resistor R83, the other end of the resistor R83 is grounded, the X2_25M end of the DM9000 chip is electrically connected with one end of a capacitor C69 and one end of a crystal oscillator X1 respectively, the X1_25M end of the DM9000 chip is electrically connected with one end of a capacitor C6 and the other end of a crystal oscillator X1 respectively, the other end of a capacitor C69 and the other end of a capacitor C6 are both grounded, the EECS end of the DM9000 chip is electrically connected with one end of a resistor R82, the IOWAIT end of the DM9000 chip is electrically connected with one end of a resistor R76, and the other end of the resistor R82 and.

10. The internet of things-based power cable data fusion gateway device according to claim 9, wherein the ZigBee wireless sensor network module comprises a CC2430 chip, a capacitor C431, a capacitor C421, a capacitor C411, a capacitor C441, a capacitor C351, a crystal oscillator Y3, a capacitor C71, a capacitor C191, a capacitor C211, a crystal oscillator Y2, a resistor R261, a capacitor C231, a capacitor C241, a capacitor C251, a capacitor C281, a resistor R221, an inductor L321, an inductor L331, an inductor 341, a capacitor C341, and an antenna, wherein:

the ends of a CC2430 chip P2_3/XOSC _ Q1 are respectively and electrically connected with one end of a capacitor C441 and one end of a crystal oscillator Y3, the ends of a CC2430 chip P2_4/XOSC _ Q2 are respectively and electrically connected with one end of a capacitor C431 and the other end of a crystal oscillator Y3, the end of a CC2430 chip DCOUPL is electrically connected with one end of a capacitor C421, the end of a CC2430 chip AVDD _ DREG is electrically connected with one end of a capacitor C411, the end of a CC2430 chip AVDD _ DGU ARD is respectively and electrically connected with one end of a capacitor C351, the end of a CC2430 chip RREG _ OOUT, one end of a capacitor C241, one end of a capacitor C251 and one end of a capacitor C281, the other end of the capacitor C441, the other end of the capacitor C431, the other end of the capacitor C421, the other end of the capacitor C411, the other end of the capacitor C351, the;

the DVDD end of the CC2430 chip is electrically connected with one end of a capacitor C71, and the other end of the capacitor C71 is grounded;

an XOSC _ Q2 end of the CC2430 chip is electrically connected with one end of a capacitor C191 and one end of a crystal oscillator Y2 respectively, an XOSC _ Q1 end of the CC2430 chip is electrically connected with one end of a capacitor C211 and the other end of a crystal oscillator Y2 respectively, an RBIASI end of the CC2430 chip is electrically connected with one end of a resistor R261, an AVDD _ RREG end of the CC2430 chip is electrically connected with one end of a capacitor C231, and the other end of the capacitor C191, the other end of the capacitor C211, the other end of the resistor R261 and the other end of the capacitor C231 are all grounded;

an RF _ N end of the CC2430 chip is electrically connected with one end of an inductor L321 and one end of an inductor L341 respectively, a TXRX _ SWITCH end of the CC2430 chip is electrically connected with one end of an inductor L331, an RF _ P end of the CC2430 chip is electrically connected with the other end of the inductor L321, the other end of the inductor L331 and one end of the inductor L341 respectively, an RF _ N end RBIAS2 end of the CC2430 chip is electrically connected with one end of a resistor R221, the other end of the resistor R221 is grounded, the other end of the inductor L341 is electrically connected with one end of a capacitor C341, and the other end of the capacitor C341 is connected with an antenna.

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