CN210894601U - Safety chip testing board and device thereof - Google Patents
Safety chip testing board and device thereof Download PDFInfo
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- CN210894601U CN210894601U CN201820064249.2U CN201820064249U CN210894601U CN 210894601 U CN210894601 U CN 210894601U CN 201820064249 U CN201820064249 U CN 201820064249U CN 210894601 U CN210894601 U CN 210894601U
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Abstract
The utility model provides a safety chip test board and a device thereof, a slotted hole is arranged on the installation area of a PCB substrate in the safety chip test board for installing a chip to be tested, the silicon substrate of the chip to be tested is exposed through the slotted hole, the single board based on the design carries out the fault injection analysis of the chip, the laser error injection can be directly injected onto the silicon substrate of the chip through the slotted hole, the verification comprehensiveness of the chip verification stage is promoted at a high probability, and the risk that the safety performance is not closed after the chip is put into the chip is reduced; furthermore, the design mode of the slotted hole can not only not influence the normal work of the chip, but also the surface of the silicon substrate of the chip is clean and tidy, thereby achieving half the effort for laser error injection analysis and solving the problem that the chip of the chip mounted on the PCB can not normally carry out the laser error injection analysis.
Description
Technical Field
The utility model relates to a chip test technical field especially relates to a safe chip test panel and device thereof.
Background
With the development of information security technology, various security products are more and more popular, including financial IC cards, social security cards, usb keys for internet banking, encrypted usb disks and other security products, the fields of ioss and intelligent devices, and a safe and reliable chip is also needed to ensure the reliability of the products. Therefore, the analysis and research on the safety characteristics of the safety chip are particularly important for ensuring that the safety of the safety chip passes through various evaluation standards, and the analysis of the safety function must be comprehensively evaluated in a verification stage before the chip is delivered.
In the field of security chips, the security of a chip is a more ancient and unchangeable topic, in the prior art, the security analysis of the chip can be roughly divided into three analysis modes, namely non-invasive attack, semi-invasive attack and invasive attack, wherein the semi-invasive attack is between the non-invasive attack and the invasive attack and plays a significant role, and optical error injection is considered to be one of the most effective attack means in the semi-invasive attack at present. The safety verification is required to be carried out before the chip is thrown, laser injection is an important step of the chip verification, and the method can be basically divided into two types of injection from the front side and the back side of the chip, wherein when laser error injection analysis is carried out on the back side of the chip, a silicon substrate part of the chip is required to be exposed, however, in the analysis and verification stage of the actual chip, after the chip is arranged on a PCB, the back side of the chip is blocked, and laser cannot be injected into the back side, so that the laser error injection analysis cannot be normally carried out.
SUMMERY OF THE UTILITY MODEL
The utility model provides a safety chip surveys test panel and device to solve current chip and in the verification stage, all be the paster on PCB, cause the unable normal problem that carries out laser error injection analysis of back silicon substrate of chip.
In order to solve the technical problem, the utility model discloses a following technical scheme:
a security chip test board is applied to security performance analysis of security chips, and comprises: the PCB substrate is provided with a mounting area for mounting a chip to be tested and a binding area which is arranged at the edge of the mounting area, is used for fixing an output pin of the chip to be tested and extends to the edge of the PCB substrate;
and a slot hole which penetrates through the mounting area and can be injected by laser is also formed in the mounting area, and the silicon substrate of the mounted chip to be tested is exposed from the mounting area.
Furthermore, the safety chip test board also comprises a support plate, wherein the support plate is arranged at the position of the slotted hole and is connected with the edge of the slotted hole.
Further, the backup pad is including setting up the binding face on its surface, the binding face includes the glue film, will be awaited measuring the chip fixing through the glue film is in the slotted hole position of installing the region.
Furthermore, the supporting plate is a convex connecting plate.
Further, the convex side of the connecting plate is connected with the inner edge of the slot hole, and a U-shaped gap is formed between the connecting plate and the inner edge of the slot hole.
Furthermore, at least one supporting point is arranged between the supporting plate and the edge of the slotted hole and used for fixing the supporting plate on the middle empty area of the slotted hole.
Further, when the specific number of the at least one supporting point is two, the two supporting points are respectively arranged on two opposite side edges of the supporting plate, and two symmetrically distributed U-shaped gaps are formed between the supporting plate and the inner edges of the slot holes.
Furthermore, the slot is arranged in the middle of the mounting area, and the size of the slot is matched with that of the silicon substrate of the chip to be tested.
Further, the shape of the slotted hole is at least one of a rectangle, a circle, a semicircle, a moon shape and an annular circle.
In order to solve the technical problem, the utility model also provides a safety chip testing arrangement, include as above-mentioned arbitrary safety chip survey test panel and the examination chip that awaits measuring, the examination chip install in safety chip survey test panel's mounting region on the position that the slotted hole corresponds, and will the silicon substrate that awaits measuring the chip exposes out.
Has the advantages that:
the utility model provides a safety chip test board and a device thereof, a slotted hole is arranged on the installation area of a PCB substrate in the safety chip test board for installing a chip to be tested, the silicon substrate of the chip to be tested is exposed through the slotted hole, the single board based on the design carries out the fault injection analysis of the chip, the laser error injection can be directly injected onto the silicon substrate of the chip through the slotted hole, the verification comprehensiveness of the chip verification stage is promoted at a high probability, and the risk that the safety performance is not closed after the chip is put into the chip is reduced; furthermore, the design mode of the slotted hole can not only not influence the normal work of the chip, but also the surface of the silicon substrate of the chip is clean and tidy, thereby achieving half the effort for laser error injection analysis and solving the problem that the chip of the chip mounted on the PCB can not normally carry out the laser error injection analysis.
Drawings
Fig. 1 is a schematic structural diagram of a security chip test board according to an embodiment of the present invention;
fig. 2 is a schematic view of a first structure of a security chip test board according to an embodiment of the present invention;
fig. 3 is a second schematic structural diagram of a security chip test board according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a third structure of a security chip test board according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a security chip testing apparatus provided in the second embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
The first embodiment is as follows:
please refer to fig. 1, fig. 1 is a safety chip testing board according to an embodiment of the present invention, which is mainly used for safety performance analysis during fault injection analysis of a safety chip, the safety chip testing board 10 includes a PCB substrate 101, the PCB substrate 101 has a mounting region 1011 for mounting a chip to be tested, and a binding region 1012 disposed at an edge of the mounting region 1011, wherein the binding region 1012 is connected to an output pin of the chip to be tested and extends to an edge of the PCB substrate 101. The bonding region 1012 can be understood as a pad in an electronic circuit in the PCB substrate 101, and when the bonding region 1012 is disposed, in order to facilitate a connection test of the security chip test board 10 during use, a pin region is further disposed at an edge position of the PCB substrate 101, and the bonding region 1012 is connected to the pin region through a conductive circuit.
In this embodiment, the mounting area 1011 is further provided with a slot 1013 penetrating through the mounting area 1011, and the silicon substrate of the chip to be tested is mounted facing the slot 1013, so that the silicon substrate of the chip to be tested 102 after mounting is completely exposed, at this time, when performing fault injection analysis, the laser injection device directly performs laser injection on the chip to be tested from the position of the slot 1013, and thus, by designing the scheme for performing fault injection analysis on the slot on the PCB, under the condition of not increasing research and development investment costs, the PCB hard board can be quickly and safely removed from the back of the chip without affecting normal operation of the chip, the verification comprehensiveness in the chip verification stage can be improved at a high rate, and the risk that the safety performance is not relevant after the chip is put into a chip is reduced.
In practical application, in order to prevent to await measuring the chip and drop from slotted hole 1013 during the installation, the embodiment of the utility model provides a will slotted hole 1013 specifically sets up on installation area 1011's intermediate position, and will slotted hole 1013's size sets up to cooperate with the size of the silicon substrate of the chip that awaits measuring, and is optional, sets up to slightly less than the size of silicon substrate, and the exposure of silicon substrate has not only been guaranteed like this for laser can freely pour into the chip into, can also avoid the chip to fall from slotted hole 1013.
In practical applications, the shape of the slot 103 may be rectangular, circular, semicircular, moon-shaped, circular, etc., as long as the silicon substrate of the chip to be tested is exposed.
In the present embodiment, as shown in fig. 2, the security chip test board 10 further includes a supporting plate 102, the supporting plate 102 has the same shape as the slot 1013 and has a size smaller than the slot 1013; the supporting plate 102 is disposed at the position of the slot 1013, and is connected to the edge of the slot 1013 with a gap therebetween, so as to realize a fixed mounting, and the supporting plate 102 is only used for blocking positioning when mounting the chip to be tested, and after the chip to be tested is soldered on the mounting area 1011, the supporting plate 102 needs to be removed so as to expose the silicon substrate of the chip to perform a fault implantation analysis.
Of course, the support plate 102 does not have to be removed, and the gap formed between the slot 1013 and the support plate 102 may not be removed when the silicon substrate is exposed enough to allow laser implantation.
In practical applications, the connection between the supporting plate 102 and the slot 1013 is realized by fixing the connecting point at the time of the two, and optionally, mutually matching snap structures are provided at the corresponding positions of the two.
In practical applications, the supporting plate 102 may be configured as a connecting plate with a "convex" shape, and is fixedly connected to the inner edge of the slot 1013 through the position of the protrusion on the connecting plate, so that a gap similar to a "U" shape is formed between the connecting plate and the slot 1013; in actual manufacturing of the PCB substrate 101, the supporting plate 102 and the slot 1013 are integrally formed, specifically, a U-shaped gap is formed in the middle of the mounting area 1011, as shown in fig. 2.
In this embodiment, the fixing between the supporting plate 102 and the slot 1013 can be realized by at least one supporting point 1014 disposed therebetween, as shown in fig. 3, when the specific number of the at least one supporting point 1014 is two, the two supporting points 1014 are disposed on two opposite sides of the supporting plate 102, and two symmetrically distributed U-shaped slots 103 are formed between the supporting plate 102 and the inner edge of the slot 1013.
In the present embodiment, when the number of the supporting points 1014 is 4, the four supporting points 1014 are respectively disposed on four sides of the supporting plate 102, and four symmetrically distributed L-shaped slots 103 are formed between the supporting plate 102 and the inner edge of the slot 1013.
In practical application, as shown in fig. 4, the secure chip test board 10 further includes an auxiliary test circuit 1015, where the auxiliary test circuit 1015 includes a binding line 1015a and at least one electronic component 1015b, the at least one electronic component 1015b is connected in the binding line 1015a in a series-parallel manner, the binding line 1015a is used to connect to output pins of a chip to be tested respectively and protect the chip to be tested through the electronic component 1015b, and the binding line 1015a is also used to realize electrical connection between the electronic component 1015b and the pin area.
In practical applications, the binding line 1015a in the mounting area 1011 needs to be designed to have a sufficient margin with respect to the edge of the slot 1013, and is disposed at the edge of the mounting area 1011 as shown in fig. 4.
In this embodiment, in order to facilitate the installation of the chip to be tested on the slot 1013 and to achieve the accurate positioning of the output pin and the binding line 1015a, a bonding surface is further disposed on the surface of the supporting plate 102, and the bonding surface is used for fixing the chip to be tested for use.
In practical applications, the structure of the security chip test board 10 can be designed by using an existing PCB, and the specific design steps are as follows:
step one, arranging a mounting area for mounting the chip to be tested, an auxiliary test circuit for auxiliary test and a pin for connecting external test equipment on the PCB substrate;
secondly, a slotted hole penetrating through the mounting area is formed in the mounting area;
and step three, fixing the chip to be tested on the mounting area, wherein the silicon substrate of the chip to be tested is directly opposite to the slot hole, and exposing the silicon substrate from the slot hole.
Optionally, when the slot is arranged, the slot is optionally arranged at the middle position of the mounting region, and the size of the slot is matched with the size of the silicon substrate of the chip to be tested.
In practical application, drop from the slotted hole of design when installing in order to prevent the chip that awaits measuring, the embodiment of the utility model discloses will the slotted hole specifically sets up on the intermediate position of installation region, and will the size of slotted hole sets up to cooperate with the size of the silicon substrate of the chip that awaits measuring, and is optional, sets up to slightly be less than the size of silicon substrate, so not only can guarantee exposing of silicon substrate for laser can freely pour into the chip into, can also avoid the chip to fall from the slotted hole, and is optional, the shape of slotted hole can set up to the shape of rectangle, circular, semi-circular, moon shape, annular circle etc. as long as can realize the silicon substrate that will await measuring the chip exposes can.
Furthermore, a supporting plate can be arranged at the position of the slotted hole, the shape of the supporting plate is the same as that of the slotted hole, and the size of the supporting plate is smaller than that of the slotted hole; the supporting plate is arranged on the position of the slotted hole, is connected with the edge of the slotted hole, and is provided with a gap between the supporting plate and the slotted hole, so that fixed installation is realized. In practical application, after the supporting plate is provided with the chip to be tested, the structure of the supporting plate can be selected not to be removed according to practical conditions, and the supporting plate can not be removed as long as a gap formed between the slot hole and the supporting plate is enough to expose the silicon substrate to realize laser injection.
In this embodiment, the fixing between the supporting plate and the slot may be further achieved by at least one supporting point disposed therebetween, when the number of the at least one supporting point is two, the two supporting points are disposed on two opposite sides of the supporting plate, respectively, and two U-shaped gaps symmetrically distributed are formed between the supporting plate and the inner edge of the slot.
In this embodiment, when the number of the supporting points is 4, the four supporting points are respectively disposed on four sides of the supporting plate, and four L-shaped slits are symmetrically formed between the supporting plate and the inner edge of the slot.
In practical application, the supporting plate can be also fixedly connected with the inner edge of the slotted hole through the position of the bulge on the connecting plate by arranging the connecting plate in a convex shape, and a gap similar to a U shape is formed between the connecting plate and the slotted hole; when the PCB substrate is actually manufactured, the supporting plate and the slotted hole are integrally formed.
In summary, the embodiment provides a safety chip test board, a slot is formed in a mounting region of a PCB substrate in the safety chip test board, where a chip to be tested is mounted, and a silicon substrate of the chip to be tested is exposed through the slot, and the single board design of the slot scheme can save some unnecessary chip packaging forms during testing the chip, such as a card packaging form commonly used in the field of safety chips, and can realize verification of multiple schemes of one PCB by improving during PCB manufacturing; and the adoption is behind the PCB slotted hole, is favorable to improving the test comprehensiveness of chip safety, has compensatied the limitation that the chip of binding on the current PCB can't carry out laser error injection.
Furthermore, through the injection of laser in the PCB slotted hole, the purpose of safety analysis can be realized under the condition that a plurality of pins of the binding chip can be expanded to the periphery, and the defect that the chip can not be tested when the front surface of the chip is provided with safety protection can be avoided, the safety test is improved in comprehensiveness, and therefore the problem that the chip attached to the PCB can not normally carry out laser error injection analysis is solved.
Example two:
fig. 5 is a schematic structural diagram of a second embodiment of the present invention, in which the chip testing device 20 includes the safety chip testing board 10 and the chip 201 to be tested, the chip 201 to be tested is mounted on the corresponding position of the slot 1013 on the mounting region 101 of the safety chip testing board 10, and the silicon substrate of the chip 201 to be tested is exposed.
In this embodiment, the security chip test board 10 includes a PCB substrate 101, wherein the PCB substrate 101 includes a mounting area 1011 and a bonding area 1012 disposed at an edge of the mounting area 1011, wherein the bonding area 1012 is connected to an output pin of the chip to be tested and extends to an edge of the PCB substrate 101.
A slot 1013 penetrating through the mounting region 1011 is further provided on the mounting region 1011, and the silicon substrate of the chip to be tested is mounted against the slot 1013 so that the silicon substrate of the chip to be tested 102 after mounting is completely exposed.
In this embodiment, the PCB substrate 101 further includes an auxiliary test circuit 1015 and a pin area 1016 disposed at an edge of the PCB substrate 101, the chip 201 to be tested is mounted on the mounting area 1011, and an output pin thereof is electrically connected to the pin 1016 through the auxiliary test circuit 1015.
In practical application, when the safety chip testing device is used for fault injection analysis, the safety chip testing device is inserted into external detection equipment, and then laser injection is carried out on the silicon substrate of the chip to be tested from the position of the slot hole through the external detection equipment; and analyzing the safety performance of the chip to be tested after laser injection.
In practical application, the design of the PCB substrate can be specifically determined by selecting an existing common test PCB, determining the mounting position of the chip to be tested on the test PCB, and then forming a slot hole in the mounting position, so that when the chip to be tested is mounted at the mounting position, the back surface of the chip can be completely exposed, and the output pin of the chip is connected to the pin through an auxiliary test circuit.
Then, inserting the assembled security chip test board into external detection equipment, wherein the equipment can inject emitted laser, and the laser injection is specifically injected from a notch formed in the PCB;
and finally, the external detection equipment analyzes the safety performance by acquiring output information of the chip after laser injection.
Optionally, when the chip is bound, the chip may be bound by arranging a support plate on the socket, adhering a high-temperature adhesive tape on the support plate, and then attaching the silicon substrate of the chip to the area provided with the adhesive tape;
further, after the bonding, black glue can be dispensed on the position of the chip in the back of the PCB to seal the chip;
further, in order to facilitate the injection of the laser from the notch, the supporting plate arranged on the notch needs to be removed, specifically, the supporting point of the fixed supporting plate is cut into sections, then the supporting plate is removed, and the adhesive tape adhering part is cut off at the same time, so that the silicon substrate of the chip is exposed, and the specific structure is schematically shown in fig. 5;
further, cleaning the adhesive tape on the silicon substrate of the bare chip, and performing laser error analysis;
furthermore, data of the chip under the laser fault injection is collected to analyze and evaluate the safety performance.
Through the implementation of the above embodiment, the utility model discloses possess following beneficial effect:
the utility model provides a safety chip surveys test panel and device thereof, set up a slotted hole on the installation region of the installation examination chip of the PCB base plate through surveying test panel at safety chip, the silicon substrate that will await measuring the examination chip through this slotted hole exposes, the veneer based on this kind of design carries out the fault injection analysis of chip, its laser error injection can directly pour into the silicon substrate of chip into through the slotted hole, the unable normal problem of carrying out laser error injection analysis of chip of paster on PCB has been solved.
Furthermore, a supporting plate is arranged at the position of the slot hole and connected with the supporting point, the supporting plate is used for stopping and limiting the chip to be tested during installation, the problem that no PCB is attached before the chip is bound and the chip can fall off from the slot hole is avoided, and the supporting point avoids the problem that the PCB hard board cannot be removed after the chip is bound; meanwhile, the set fault injection analysis enables PCB manufacturing, chip binding and unconventional safety function verification tested in the chip verification stage to be a new test path for chip verification.
The foregoing is a more detailed description of the present invention that is presented in conjunction with specific embodiments, and it is not to be understood that the specific embodiments of the present invention are limited to these descriptions. To the utility model belongs to the technical field of ordinary technical personnel, do not deviate from the utility model discloses under the prerequisite of design, can also make a plurality of simple deductions or replacement, all should regard as belonging to the utility model discloses a protection scope.
Claims (10)
1. A safety chip test board is applied to safety performance analysis of a safety chip and is characterized by comprising the following components: the PCB substrate is provided with a mounting area for mounting a chip to be tested and a binding area which is arranged at the edge of the mounting area, is used for fixing an output pin of the chip to be tested and extends to the edge of the PCB substrate;
and a slot hole which penetrates through the mounting area and can be injected by laser is also formed in the mounting area, and the silicon substrate of the mounted chip to be tested is exposed from the mounting area.
2. The security chip test board according to claim 1, wherein the security chip test board further comprises a support plate disposed at the position of the slot and connected to the edge of the slot.
3. The security chip test board according to claim 2, wherein the supporting board includes an attaching surface disposed on a surface thereof, the attaching surface including a glue layer through which the chip to be tested is fixed at the position of the slot of the mounting area.
4. The security chip test board according to claim 3, wherein the supporting plate is a connecting plate in the shape of a letter-of-a-letter.
5. The security chip test board of claim 4, wherein the raised side of said attachment plate is connected to the inner edges of said slots and a U-shaped gap is formed between said attachment plate and the inner edges of said slots.
6. The security chip test board according to claim 2, wherein at least one supporting point is further provided between the supporting plate and the edge of the slot for fixing the supporting plate on the hollow center region of the slot.
7. The security chip test board according to claim 6, wherein when the specific number of the at least one supporting point is two, the two supporting points are respectively disposed on two opposite sides of the supporting plate, and two symmetrically distributed U-shaped gaps are formed between the supporting plate and the inner edges of the slots.
8. The security chip test board according to any of claims 1 to 7, wherein the slot is formed at a middle position of the mounting region, and the size of the slot matches with the size of the silicon substrate of the chip to be tested.
9. The security chip test board according to claim 8, wherein the shape of the slot is at least one of rectangular, circular, semicircular, moon-shaped, and circular circle.
10. A security chip testing apparatus, comprising the security chip testing board according to any one of claims 1 to 9 and a chip to be tested, wherein the chip to be tested is mounted at a position corresponding to the slot on the mounting region of the security chip testing board, and the silicon substrate of the chip to be tested is exposed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820064249.2U CN210894601U (en) | 2018-01-15 | 2018-01-15 | Safety chip testing board and device thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820064249.2U CN210894601U (en) | 2018-01-15 | 2018-01-15 | Safety chip testing board and device thereof |
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| Publication Number | Publication Date |
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| CN210894601U true CN210894601U (en) | 2020-06-30 |
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| CN201820064249.2U Active CN210894601U (en) | 2018-01-15 | 2018-01-15 | Safety chip testing board and device thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115267275A (en) * | 2022-09-30 | 2022-11-01 | 南通米乐为微电子科技有限公司 | Testing device, testing assembly and testing method for surface-mounted components |
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2018
- 2018-01-15 CN CN201820064249.2U patent/CN210894601U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115267275A (en) * | 2022-09-30 | 2022-11-01 | 南通米乐为微电子科技有限公司 | Testing device, testing assembly and testing method for surface-mounted components |
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