CN210839639U

CN210839639U - Parallel digital synthesis circuit of FM modulation signal

Info

Publication number: CN210839639U
Application number: CN201921935285.2U
Authority: CN
Inventors: 舒勇
Original assignee: Chengdu Wavetech Co ltd
Current assignee: Chengdu Wavetech Co ltd
Priority date: 2019-11-11
Filing date: 2019-11-11
Publication date: 2020-06-23
Anticipated expiration: 2029-11-11

Abstract

The utility model relates to a parallel digital synthesis circuit of FM modulated signal adopts multichannel parallel structure to realize the production of FM modulated signal on the FPGA hardware, the FM signal produces and mainly divide into baseband signal production module and up-conversion module, band signal production module is used for producing the FM baseband signal, up-conversion module realizes the up-conversion, with baseband signal transform to appointed carrier frequency on, baseband signal and carrier signal multiply with, and subtract two way signals, accomplish the signal spectrum and move. The utility model discloses it is variable to possess the bandwidth, central frequency is variable, easily realizes characteristics such as on FPGA.

Description

Parallel digital synthesis circuit of FM modulation signal

Technical Field

The utility model relates to a frequency modulation field, concretely relates to parallel digital synthesis circuit of FM modulating signal.

Background

FM (frequency modulation) is frequency modulation. FM is conventionally used to refer to general frequency modulation broadcasting (76-108MHz, 88-108MHz in china and 76-90MHz in japan), and in fact FM is also a modulation method, and even between 27-30MHz in the short-wave range, Frequency Modulation (FM) is also used as a band for amateur radio, space, and satellite communication applications. FM radio is the FM radio. The modulation signal is a low-frequency signal transformed from the original information, i.e. the information to be used is loaded on the transmitted waveform. For example, the signal sent by the computer on the internet by using a telephone line is a high-frequency digital signal, and the digital signal is loaded on an audio signal in the telephone line to complete modulation. But sometimes the modulated signal will be referred to generically as a modulated signal. The FM modulation signal, the amplitude of carrier is unchangeable, and the frequency of carrier is controlled to the modulation signal, makes the frequency of modulated signal change according to the modulation signal rule, and the expression of FM modulation signal is:

S_FM(t)＝cos[(ω_ct+K_f∫x(t)dt)]……(1)

x (t): modulating the signal;

cosω_ct＝cos2πf_ct: a carrier signal;

ω_c: a carrier angular frequency;

f_c: a carrier frequency;

K_f: the proportionality constant is called the sensitivity of the frequency modulator.

S_FM(t): a modulated signal.

There are two main methods of FM frequency modulation signal generation, direct and indirect. The direct method uses a voltage controlled oscillator whose instantaneous frequency varies linearly with the variation of the modulation signal x (t). The indirect method first uses the modulation signal to generate a narrowband frequency modulation signal, and then passes the narrowband signal through a frequency multiplier to obtain a wideband frequency modulation signal, and the block diagram of the indirect method is shown in fig. 1.

The prior art has the following disadvantages: the direct method or the indirect method has the same problem in the process of generating the FM modulation signal, that is, the bandwidth of the frequency modulation circuit is generally fixed, or the center frequency is not variable within a certain interval, so that the flexibility of the frequency modulation circuit is low, and the FM modulation signal generating method is not suitable for generating FM modulation signals with different bandwidths and center frequencies.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to overcome prior art not enough, a parallel digital synthesis circuit of FM modulated signal is provided, adopt multichannel parallel structure to realize FM modulated signal's production on FPGA hardware, FM signal production mainly divide into baseband signal production module and up-conversion module, band signal production module is used for producing FM baseband signal, up-conversion module realizes the up-conversion, with baseband signal transform to appointed carrier frequency on, baseband signal and carrier signal and multiplication, and subtract two way signals, accomplish the signal frequency spectrum and move.

The purpose of the utility model is realized through the following technical scheme:

a parallel digital synthesis circuit of FM modulation signals is composed of a baseband signal module and an up-conversion module, wherein the baseband signal module is used for generating FM baseband signals, the up-conversion module is used for realizing up-conversion, and the baseband signal module comprises N phase value output circuits for outputting baseband signal phase values in parallel and a phase value FM _ phaseN for outputting the phase values of N baseband signals in parallel;

each phase value output circuit consists of a first DDS, an adder A, a delay clock and a multiplier which are sequentially connected in series, wherein the first DDS is used for inputting a phase value of a modulation signal sine wave, and the frequency input is f_bThe delay clock output end of the last phase value output circuit is connected with the adder A of the next phase value output circuit, and the delay clock output end of the last phase value output circuit is connected with the adder A of the first phase value output circuit;

the up-conversion module (S102) comprises N up-conversion branches and is used for outputting an N-phase expression FM _ SignalN of a modulation signal;

each up-conversion branch circuit consists of an adder B, a second DDS and a subtracter which are sequentially connected in series, wherein the adder B corresponds to a phase value FM _ phaseN and a phase angle of an input baseband signal respectively, and the input frequency of the second DDS is f_cThe output is two paths, one path is sin value, and the other path is cos value.

Further, the first DDS and the second DDS are own DDS IP cores inside the FPGA chip.

Further, the delay clock is an FPGA working clock, and the value of the delay clock is 1/150e⁶。

Further, the phase angle is

n is 0,1,2 … ….

A parallel digital synthesis method of FM modulation signals comprises the following steps:

s1: the N phase values of the sine wave of the modulation signal are respectively input into a frequency synthesizer, and the input frequency is f_bForming N sampling branches, wherein the value of N is (1, 16);

s2: respectively inputting the output signal of each frequency synthesizer into an adder, delaying for a clock period D, inputting into a multiplier, and outputting N baseband signal phase values FM _ phaseN in parallel;

s3: inputting N phase values FM _ phaseN of baseband signals into an adder respectively, and then inputting the N phase values into a frequency synthesizer, wherein the input frequency of the frequency synthesizer is a carrier frequency f_cThe sine value and the cosine value of the N groups are output;

s4: inputting each group of sine value and cosine value into a subtracter respectively to obtain an N-phase expression FM _ SignalN of a modulation signal FM;

wherein, ω is_cFor carrier angular frequency, K_fIs the proportionality constant of the multiplier, T is the delay time of the clock cycle D, and n takes the value of (0,1,2,3 … …).

Further, the output signal of the last adder in step S2 is delayed by one clock cycle D and then input into the next adder, and the output signal of the last adder is delayed by one clock cycle D and then input into the first adder to form a closed loop.

Further, the frequency synthesizer is a DDS IP core that is self-contained in the FPGA chip, two input parameters are required when the DDS IP core is instantiated, one is the frequency of the sinusoidal signal, and the other is the phase of the sinusoidal signal, the frequency synthesizer in step S1 inputs the phase value of the sinusoidal signal, and the frequency input is f_bThe input of itThe cos value is obtained as a path.

Further, the frequency synthesizer in step S4 is divided into two input interfaces, which respectively input the phase and frequency of the sinusoidal signal and output two paths of signals, one path being a sin value and the other path being a cos value.

The utility model has the advantages that: according to the scheme, the N-path parallel structure is used for generating FM baseband signals, the FM baseband signals generated by the method can well control the bandwidth of the FM baseband signals, the FM baseband signals are easily realized on FPGA hardware, meanwhile, the N-path parallel structure is adopted in up-conversion processing to move baseband signal frequency spectrums to designated frequency points, and higher center frequency can be obtained.

Drawings

FIG. 1 is a schematic diagram of a prior art FM modulated signal indirect process;

FIG. 2 is a schematic diagram of a top layer structure of the present invention;

fig. 3 is a schematic diagram of a baseband signal generating module according to the present invention;

fig. 4 is a schematic diagram of the up-conversion module of the present invention.

Detailed Description

The technical solution of the present invention is described in detail with reference to the following specific embodiments, but the scope of the present invention is not limited to the following description.

The utility model discloses the FM signal that produces is as interference source signal, and the spectrum requirement control of interference source signal is in certain extent, and the spectral analysis of FM signal is very complicated, and in order to obtain accurate FM signal bandwidth, the modulation signal that can take is the single-frequency signal, x (t) cos omega for promptly_bt＝cos2πf_bt，ω_b: modulating signal sine wave angular frequency, f_b: modulating the sine wave frequency of the signal, wherein the frequency spectrum of the FM signal can be controlled at omega_c+K_fAnd (4) the following steps. Because digital signal has advantages such as the flexibility is high, the precision is high, the error is little relatively analog signal, the utility model discloses a digital mode produces FM modulation signal, for improving FM signal bandwidth and carrier frequency as far as possible, the utility model discloses a parallel mode realizes FM modulation signal's production, and its concrete method is as follows.

wherein, ω is_cFor carrier angular frequency, K_fIs the proportionality constant of the multiplier, T is the delay time of the clock period D, and n takes the values 0,1,2,3, and 4 … ….

As a preferred embodiment, the output signal of the last adder in step S2 is delayed by one clock cycle D and then input into the next adder, and the output signal of the last adder is delayed by one clock cycle D and then input into the first adder to form a closed loop. The delay time T of the clock period D is an FPGA working clock which takes 1/150e as a value⁶. The frequency synthesizer is a self-existing DDS IP core in the FPGA chip, two input parameters are needed when the DDS IP core is instantiated, one is the frequency of a sinusoidal signal, the other is the phase of the sinusoidal signal, the frequency synthesizer inputs the phase value of the sinusoidal signal in the step S1, and the frequency input is f_bThe output is a cos value. The frequency synthesizer in step S4 is divided into two input interfaces, which respectively input the sine signalPhase and frequency, two paths of signals are output, one path is a sin value, and the other path is a cos value.

To further embody this embodiment, N is 14 in this embodiment. Namely, in this embodiment, a 14-channel parallel structure is adopted to realize the generation of the FM modulation signal on the FPGA hardware, and the FPGA operation clock is assumed to be 150 MHz. The top layer structure is shown in fig. 2. The FM signal generation is mainly divided into two modules S101 and S102, the S101 module is used for generating FM baseband signals, the S102 module realizes up-conversion, and the baseband signals are converted to the appointed carrier frequency f_cUpper, base band signal and carrier signal cos (2 pi f)_ct) and sin (2 π f)_ct) and subtracting the two paths of signals to complete signal spectrum relocation, and specific circuits thereof can be referred to as fig. 3 and fig. 4.

As shown in fig. 2, a parallel digital synthesis circuit for FM modulation signals, the parallel digital synthesis circuit is composed of a baseband signal module S101 and an up-conversion module S102, the baseband signal module S101 is used for generating FM baseband signals, the up-conversion module S102 is used for implementing up-conversion, the baseband signal module S101 includes 14 phase value output circuits for outputting baseband signal phase values in parallel, and is used for outputting phase values FM _ phaseN of 14 baseband signals in parallel; each phase value output circuit consists of a first DDS, an adder A, a delay clock and a multiplier which are sequentially connected in series, wherein the first DDS is used for inputting a phase value of a modulation signal sine wave, and the frequency input is f_b. In this embodiment, the phase angles of the 14 inputs are respectively

The specific circuit of the circuit is shown in fig. 3, where the input signal of the multiplier includes a signal output by the delay clock, and a proportionality constant K_fAnd a fixing memberNumber of

Namely, it is

As shown in fig. 4, the up-conversion module S102 includes 14 up-conversion branches, which are used to output a 14-phase expression FM _ SignalN of a modulation signal; each up-conversion branch circuit consists of an adder B, a second DDS and a subtracter which are sequentially connected in series, wherein the adder B corresponds to a phase value FM _ phaseN and a phase angle of an input baseband signal respectively, and the input frequency of the second DDS is f_cThe output is two paths, one path is sin value, and the other path is cos value. Wherein the adders B are used for the 14-phase positions FM _ SignalN and FM _ SignalN of the input baseband signals, respectively

The 14 paths of signals generated finally are 14-phase expressions of one FM signal. The formula (1) is digitized, T is taken as nt, T is taken as a sampling time interval, and the integration is used for summation operation, so that the finally output 14 paths of signals are respectively:

…………

the foregoing is illustrative of the preferred embodiments of the present invention, and it is to be understood that the invention is not limited to the precise forms disclosed herein, and that various other combinations, modifications, and environments may be resorted to, falling within the scope of the invention as defined by the appended claims. But that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the invention, which is to be limited only by the claims appended hereto.

Claims

1. A parallel digital synthesis circuit of FM modulated signals, the circuit consisting of a baseband signal module (S101) and an up-conversion module (S102), the baseband signal module (S101) being configured to generate FM baseband signals, the up-conversion module (S102) being configured to perform up-conversion, characterized in that:

the baseband signal module (S101) comprises N paths of phase value output circuits for outputting baseband signal phase values in parallel, and is used for outputting phase values FM _ phaseN of the N paths of baseband signals in parallel;

2. The parallel digital synthesis circuit of FM modulated signals according to claim 1, wherein said first DDS and said second DDS are the own DDS IP core inside the FPGA chip.

3. The parallel digital synthesis circuit of FM modulated signals according to claim 2, wherein said delay clock is an FPGA working clock whose value is 1/150e⁶。

4. A parallel digital synthesis circuit for FM modulated signals according to claim 3, characterized in that the phase angle is

n is 0,1,2 … ….