CN210720711U - Acquisition unit detection device based on self-adaptation comparison analysis technology - Google Patents

Abstract

The utility model discloses a collection unit detection device based on self-adaptation is compared analysis technique, including the FPGA module, the ARM module, optic fibre sampling receiving module, optic fibre synchronous send module, DA output module, AD sampling module and ethernet transceiver module, optic fibre sampling receiving module, optic fibre synchronous send module, DA output module and AD sampling module are connected to the FPGA module, the FPGA module is connected to the ARM module, the ARM module is connected with human-computer interaction module and is connected with debugging interface RJ45 through ethernet transceiver module. The utility model discloses the independent closed loop test of collection unit, detection device can be directly to collection unit output standard differential analog signal, receive the digital sampling signal of collection unit output simultaneously, can realize that collection unit's accurate closed loop compares the test, and the testing result is more reliable.

Description

Acquisition unit detection device based on self-adaptation comparison analysis technology

Technical Field

The utility model belongs to the digital transformer substation field of electric power system especially relates to a collection unit detection device based on analysis technique is compared to self-adaptation.

Background

The electronic transformer has the advantages of small volume, light weight, no magnetic saturation and no secondary open circuit, can be conveniently combined and installed with primary high-voltage switch equipment, effectively improves the equipment integration level, reduces the land occupation, is convenient to install and transport, and has wide market application prospect. The electronic transformer consists of a sensing coil and a collecting unit, current and voltage signals of a primary system are converted into secondary small analog quantity signals after being transmitted and converted through a coil of a transformer body, the secondary small analog quantity signals are collected and converted into digital quantity sampling signals by a local collecting unit, and the digital quantity sampling signals are output to the rear end through optical fibers. The acquisition unit is a core electrical component of the electronic transformer, and the quality of the transmission characteristic directly determines the sampling precision of the electronic transformer.

At present, the number of special detection devices of the acquisition unit is small, and an electronic transformer open-loop test technology is mainly adopted. As shown in fig. 1, a standard current/voltage source outputs a primary large current/large voltage analog signal, the primary large current/large voltage analog signal is connected to a sensing coil of an electronic transformer, the secondary small voltage signal is converted into a secondary small voltage signal, the secondary small voltage signal is input to a collecting unit of the electronic transformer, and the secondary small voltage signal is converted into a digital sampling value and output to an external electronic transformer tester. The tester tests the sampling output characteristics of the electronic transformer based on standard signal comparison, and obtains the overall (sensing coil and acquisition unit) precision index of the electronic transformer.

The existing detection technology has defects in the aspects of test accuracy and test method. Firstly, an open loop test technology is adopted, a test signal received by a tester is compared with an external standard signal manually, the requirements on the precision and stability of the output of an external standard source are high, and the error of a test result is large; secondly, the tested object comprises an electronic transformer sensing coil and an acquisition unit, the composite error of the electronic transformer sensing coil and the acquisition unit is shown in the test result, and the characteristics of the acquisition unit cannot be accurately represented; particularly, the digitalized sampling protocol output by the electronic transformer is not unified, the sampling values output by the acquisition units of the electronic transformers produced by various manufacturers are different under the conditions of transmission baud rate, sampling rate, coding mode and application layer frame format, and how to receive the sampling values output by the acquisition units in an efficient and self-adaptive manner is also a difficulty in realizing the detection technology of the acquisition units.

Disclosure of Invention

The to-be-solved technical problem of the utility model is: the utility model provides a collection unit detection device based on self-adaptation comparison analysis technique, solves present electronic transformer collection unit detection device's not enough, to present open loop detection technique to standard source require higher, test result error is great, unable independent test collection unit characteristic, do not possess self-adaptation sampling access scheduling problem.

The utility model discloses the technical scheme who takes does: a collection unit detection device based on an adaptive comparison analysis technology comprises an FPGA module, an ARM module, an optical fiber sampling and receiving module, an optical fiber synchronous transmitting module, a DA output module, an AD sampling module and an Ethernet transmitting and receiving module, wherein the optical fiber sampling and receiving module, the optical fiber synchronous transmitting module, the DA output module and the AD sampling module are connected to the FPGA module, the FPGA module is connected to the ARM module, the ARM module is connected with a human-computer interaction module and a debugging interface RJ45 through the Ethernet transmitting and receiving module, and the FPGA module is used for driving a bottom layer module in parallel and receiving or transmitting test data in real time; the ARM module is used for data processing analysis and man-machine interaction; the optical fiber sampling receiving module is used for receiving the digital sampling value output by the tested acquisition unit; the optical fiber synchronous transmitting module is used for transmitting a synchronous signal to the acquisition unit; the DA output module is used for sending the standard source small-voltage analog quantity; and the AD sampling module is used for extracting the standard source analog quantity in real time.

The utility model has the advantages that: compared with the prior art, the utility model discloses the independent closed loop test of collection unit, detection device can be directly to collection unit output standard differential analog signal, receive the digital sampling signal of collection unit output simultaneously, can realize that collection unit's accurate closed loop compares the test, and the testing result is more reliable.

Drawings

FIG. 1 is an electronic transformer open loop test system;

FIG. 2 is a step of adaptive detection of the acquisition unit;

fig. 3 is a schematic connection diagram of the detection device principle of the acquisition unit.

Detailed Description

The present invention will be further described with reference to the accompanying drawings and specific embodiments.

Example 1: as shown in fig. 2-3, an acquisition unit detection device based on adaptive comparison analysis technology includes an FPGA module, an ARM module, an optical fiber sampling and receiving module, an optical fiber synchronous transmitting module, a DA output module, an AD sampling module, and an ethernet transceiving module, where the optical fiber sampling and receiving module, the optical fiber synchronous transmitting module, the DA output module, and the AD sampling module are connected to the FPGA module, the FPGA module is connected to the ARM module, the ARM module is connected to a human-computer interaction module and to a debugging interface RJ45 through the ethernet transceiving module, and the FPGA module is used for parallel driving of a bottom layer module to receive or transmit test data in real time; the ARM module is used for data processing analysis and man-machine interaction; the optical fiber sampling receiving module is used for receiving the digital sampling value output by the tested acquisition unit; the optical fiber synchronous transmitting module is used for transmitting a synchronous signal to the acquisition unit; the DA output module is used for sending the standard source small-voltage analog quantity; and the AD sampling module is used for extracting the standard source analog quantity in real time.

1. An FPGA module: the FPGA module processor adopts Xilinx Spartan-6 series product XC6SLX150, and comprises 147443 logic units, 4824Kb Block RAM special memory and 6 CMT clock management modules based on a 45nm low-power consumption process, so that the FPGA module processor has the advantages of rich resources, high running speed and perfect balance between cost performance and power consumption.

Controlling an optical fiber receiving module to acquire digital sampling output by a tested acquisition unit by utilizing the parallel signal processing capability and real-time property of the FPGA; controlling the optical fiber sending module to output a synchronous pulse signal to an acquisition unit (when the acquisition unit which works depending on the synchronous signal is detected); controlling the DA module to output a standard source analog quantity signal; controlling an AD module to recover standard source analog quantity signals; and simultaneously, the test data is interacted with the ARM.

2. An ARM module: the ARM module adopts an i.MX 6 series processor of NXP, is based on a Cortex-A9 kernel architecture, comprises a four-core platform, has the highest operating frequency of 1.2 GHz, and is supported by a 1MB L2 cache, graphics hardware acceleration, a 64-bit DDR3 or 2 channels and a 32-bit LPDDR 2. The platform integrates FlexCAN and MLB buses, PCI Express and SATA-2, provides excellent connectivity, integrates a dual-channel MIPI display screen interface, a MIPI camera interface and HDMI v1.4, and is very suitable for being used in automatic industrial application.

The ARM module and the FPGA interact test data, control a test flow and analyze detection data; meanwhile, man-machine interaction is achieved with the outside through the Ethernet, the liquid crystal and the keyboard, configuration parameters are obtained, and detection results are output.

3. The optical fiber sampling receiving module: the fiber sampling receiving module adopts an AFBR 2418TZ serial fiber receiver of Avago company, and has high-speed optical signal receiving capability. The AFBR 2418TZ optical fiber receiving device adopts an ST interface, has the working temperature of-40 to 85 ℃, the received data wavelength of 865nm and the maximum received data rate of 50MBd, and has good data compatibility.

The optical fiber sampling receiving module is used for receiving the digital sampling value output by the tested acquisition unit, converting the optical fiber signal into a level signal and inputting the level signal into the FPGA, and the FPGA completes the protocol decoding and checking of the subsequent sampling value.

4. The optical fiber synchronous transmitting module: the fiber synchronous transmission module adopts an Avago HFBR 1414 serial fiber transmitter, has high-speed optical signal transmission capability, and can meet serial data transmission requirements at most baud rates. The HFBR 1414 optical fiber transmitting device adopts an ST interface in a Tube packaging mode, the working temperature is-40 to 85 degrees, the maximum rise time is 6.5 ns, the maximum fall time is 6.5 ns, and the pulse width distortion is 7.56 ns.

The optical fiber synchronous sending module can output B code or pulse per second synchronous signals, and can be used as an external synchronous source when the tested acquisition unit needs the external synchronous signals to trigger sampling work.

5. A DA output module: the module adopts four channels, 16 bits, serial input and bipolar voltage output DAC AD5764, and can provide high-precision and bipolar data conversion. It utilizes a precision reference voltage source ADR02 to achieve optimal DAC performance over the entire operating temperature range. The external devices required by the 16-bit precision DAC are only decoupling capacitors on a reference voltage source, a power supply pin and a reference input and an optional short-circuit current setting resistor, so that the cost and the space of a circuit board can be saved. The circuit is very suitable for closed-loop servo control and open-loop control application.

The AD5764 is a high-performance digital-to-analog converter, can ensure monotonicity, has an Integral Nonlinearity (INL) error of +/-1 LSB (C-level device), is low in noise and has the establishment time of 10 mu s. And the rated performance is ensured in a wider working voltage range. The AVDD power supply voltage range is from +11.4V to +16.5V, the AVSS working voltage range is from-11.4V to-16.5V, and the nominal full-scale output voltage range is +/-10V.

For the DAC to perform optimally over the entire operating temperature range, a precision reference voltage source must be used. The AD5764 has built-in reference voltage source buffers and thus eliminates the need for external positive and negative reference voltage sources and associated buffers, which further saves cost and board space. Because the voltages applied to the reference inputs (REFAB, REFCD) are used to generate internally buffered positive and negative reference voltages for the DAC core, any error in the external reference voltage is reflected by the output of the device.

6. An AD sampling module: by adopting an 18-bit successive approximation type analog-to-digital converter AD7982, the sampling rate is 1000kSPS at most, and the analog-to-digital conversion function with high precision and high sampling rate can be realized. The AD7982 is powered by a 2.5V single power supply, and a low-power-consumption, high-speed and 18-bit non-missing code sampling ADC, an internal conversion clock and a multifunctional serial interface port are arranged in the AD 7982.

Each time sampling begins, the AD7982 samples the voltage difference between the differential input pins on the rising edge of the converted signal. The reference voltage is externally supplied and may be set as a power supply voltage. The power consumption and throughput rate of the AD7982 vary linearly. Supporting SPI communication mode and daisy chain interlink mode and providing an optional busy indication.

7. An Ethernet transceiving module: the Ethernet module consists of a PHY chip, a network transformer and an RJ45 Ethernet interface, wherein the PHY chip adopts an LXT971 network communication interface circuit of Intel company, conforms to the IEEE standard, directly supports 10Mb/s/100Mb/s twisted pair application and also supports 100Mb/s optical fiber interface. Is compatible with IEEE802.3, supports 10Base5, 10Base2, 10BaseT, 100BASE-X, 100BASE-TX and 100BASE-FX, and can automatically detect the connected medium.

The FPGA configures a PHY chip through an MII interface module, is initially in an IDLE state and monitors the state of a bus, automatically enters an SFD state when a lead code of an Ethernet frame is detected, enters a data receiving state if a frame delimiter of the Ethernet data frame is received, and starts to receive PHY chip data through an MII interface. And when all data are transmitted and the bus is IDLE, the receiving module enters an IDLE state again to wait for receiving next frame data.

Example 2: a detection method of a detection device of an acquisition unit based on an adaptive comparison analysis technology comprises the following steps: firstly, according to the discrete instantaneous sampling value of the configuration calculation standard source, outputting a small voltage analog quantity to a measured acquisition unit after digital differential calculation, and simultaneously outputting an original standard source analog quantity which is not subjected to differential calculation; secondly, accessing undifferentiated standard source analog quantity through an AD sampling module to serve as a standard comparison signal of the detection device; then, the digital sampling signal output by the tested acquisition unit is acquired in a self-adaptive manner through the optical fiber receiving module and is used as a sample comparison signal of the detection device; and finally, the detection device automatically performs closed-loop analysis on the test data to obtain sampling transmission indexes of the steady-state precision, the transient characteristic and the time characteristic of the tested acquisition unit, so that the independent closed-loop test function of the acquisition unit is realized.

A detection method of a detection device of an acquisition unit based on an adaptive comparison analysis technology specifically comprises the following steps:

step 1, two-way standard output: the ARM module acquires analog quantity parameters configured by a user, calculates an analog quantity instantaneous sampling value of a sampling rate, and then drives the DA module to output an analog quantity voltage signal through the FPGA module;

the acquisition unit acquires the differentiated small voltage signals, then the differentiated small voltage signals are restored to original samples by an internal hardware integration circuit or a software integration algorithm and are output, the detection device needs to synchronously output two groups of homologous standard analog quantity signals, and one path of the homologous standard analog quantity signals is not subjected to digital differentiation and is used as a standard source for comparison of the detection device; the other path of the analog electronic transformer outputs a signal to be accessed to a tested acquisition unit through digital differential processing;

after the detection device outputs the standard signal, the step 2 and the step 3 are carried out to recover the signal, so as to realize an automatic closed-loop detection system;

step 2, standard signal extraction: after the standard output of the step 1, one path of standard source signal which is not subjected to differential processing is recovered through the step 2;

the FPGA module drives the AD sampling module, the input voltage analog quantity is converted into a digital quantity sampling value in an analog-to-digital mode and received to the detection device, each digital sampling value is accurately recorded by the FPGA at the corresponding sampling moment, and the accuracy of the analysis of the test data in the step 4 is improved.

Step 3, digital sampling self-adaptive receiving: after the standard output of the step 1, synchronously receiving the digital measurement sample signal output by the acquisition unit through the step 3;

the FPGA module drives the optical fiber sampling module to receive optical fiber digital sampling output by the acquisition unit, each digital sampling value is also accurately recorded by the FPGA at the receiving moment, and the sampling value output by the acquisition unit of the electronic transformer has more types of protocols at present, so that the sampling information needs to be adaptively received and analyzed in a compatible mode;

the FPGA module continuously detects the maximum displacement period of an input digital signal according to the principles of Manchester code encoding and non-Manchester code encoding, distinguishes signal encoding modes, determines a protocol encoding baud rate by using the minimum displacement period value, continuously performs sampling transmission monitoring according to the baud rate, starts link transmission by a specific data start symbol after a sampling link is stably detected, receives data blocks according to fixed bytes, performs CRC (cyclic redundancy check) on the tail of each data block, and finishes the receiving when the received data blocks reach the maximum and the CRC is finished;

step 4, closed-loop comparison analysis: acquiring a test standard signal through the step 2, acquiring a sample signal of the acquisition unit through the step 3, and then performing error calculation on the two groups of signals in the step 4 to detect the transmission and transformation characteristics of the acquisition unit;

the ARM module collects original standard sampling values collected by the FPGA module and sampling values of samples output by the collection unit, a closed-loop detection system is realized, indexes of steady-state transmission precision, transient transmission characteristic and time characteristic of the collection unit to be detected are automatically analyzed by adopting interpolation synchronization, Fourier calculation, harmonic analysis and waveform comparison methods, and independent self-adaptive closed-loop detection of the collection unit is realized.

The detection device and the detection method have the advantages that:

(1) the acquisition unit performs independent closed-loop test, the detection device can directly output standard differential analog signals to the acquisition unit and simultaneously receive digital sampling signals output by the acquisition unit, accurate closed-loop comparison test of the acquisition unit can be realized, and the detection result is more reliable;

(2) the small analog quantity standard source is integrated inside, the small voltage analog quantity output standard source with high integration precision and stable performance in the detection device can be directly connected to the to-be-detected acquisition unit without the support of an electronic transformer body coil and an external standard source device, the detection system configuration of the acquisition unit is greatly simplified, and the test efficiency is improved;

(3) the two paths of standard signals are synchronously output, the synchronous output of differential analog quantity and original analog quantity two paths of standard source signals is supported, one path of unprocessed signals is used as comparison standard and is recovered by the device, one path of digital differential signals simulates the differential output of an electronic transformer coil and is directly connected to a detected acquisition unit, and the two paths of signals are homologous and synchronous and adapt to the detection requirement of the integral reduction function of the acquisition unit;

(4) the acquisition unit samples and outputs adaptive acquisition, the acquisition unit outputs digital sampling and receives adaptive acquisition based on an FPGA module, and the sampling and transmission protocol of the conventional mainstream electronic transformer is compatible, so that the application range of the detection device is greatly improved;

(5) and analyzing the transient and steady state characteristics of the acquisition unit. The device can detect performance indexes such as accuracy, frequency characteristics, instantaneous errors, composite errors, attenuation time constants, time characteristics, protocol consistency and the like of the acquisition unit. The system has a perfect function of analyzing the transient and steady state characteristics of the acquisition unit.

The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and all should be covered within the protection scope of the present invention, therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims (1)

1. The utility model provides a collection unit detection device based on self-adaptation comparison analysis technique which characterized in that: the system comprises an FPGA module, an ARM module, an optical fiber sampling and receiving module, an optical fiber synchronous transmitting module, a DA output module, an AD sampling module and an Ethernet transceiving module, wherein the optical fiber sampling and receiving module, the optical fiber synchronous transmitting module, the DA output module and the AD sampling module are connected to the FPGA module, the FPGA module is connected to the ARM module, the ARM module is connected with a human-computer interaction module and a debugging interface RJ45 through the Ethernet transceiving module, and the FPGA module is used for parallel driving of a bottom layer module and receiving or transmitting test data in real time; the ARM module is used for data processing analysis and man-machine interaction; the optical fiber sampling receiving module is used for receiving the digital sampling value output by the tested acquisition unit; the optical fiber synchronous transmitting module is used for transmitting a synchronous signal to the acquisition unit; the DA output module is used for sending the standard source small-voltage analog quantity; and the AD sampling module is used for extracting the standard source analog quantity in real time.

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