CN210693891U - High-power switch matrix circuit - Google Patents
High-power switch matrix circuit Download PDFInfo
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- CN210693891U CN210693891U CN201922163773.2U CN201922163773U CN210693891U CN 210693891 U CN210693891 U CN 210693891U CN 201922163773 U CN201922163773 U CN 201922163773U CN 210693891 U CN210693891 U CN 210693891U
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Abstract
The utility model relates to a high-power switch matrix circuit, including first antenna interface, the second antenna interface, the third antenna interface, the fourth antenna interface, first choke DC blocking circuit, second choke DC blocking circuit, the third choke DC blocking circuit, the fourth choke DC blocking circuit, first switch chip, second switch chip and DC blocking circuit, first antenna interface and first choke DC blocking circuit connection, second antenna interface and second choke DC blocking circuit connection, the third antenna interface and third choke DC blocking circuit connection, the fourth antenna interface and fourth choke DC blocking circuit connection, first choke DC blocking circuit, second choke DC blocking circuit and first switch chip connection, the third choke DC blocking circuit, the fourth choke DC blocking circuit is connected with the second switch chip. The utility model discloses a high-power switch matrix circuit, two switches are parallelly used, establish ties organically, have realized the switching of antenna to set up a plurality of protection circuit, satisfy high-power use.
Description
Technical Field
The utility model belongs to the electronic communication field especially relates to a high-power switch matrix circuit.
Background
When electronic communication is carried out, the antenna needs to be switched, a microwave relay switch is generally adopted for switching the conventional high-power system antenna, the insertion loss can be very small, but the switching speed is in the mS level, and the speed cannot meet the requirement of an electronic countermeasure system on the antenna switching speed.
SUMMERY OF THE UTILITY MODEL
The utility model aims at above-mentioned current situation, provide a high-power switch matrix circuit.
The utility model adopts the technical proposal that: a high power switch matrix circuit comprising: the first antenna interface is connected with the first choke stopping circuit, the second antenna interface is connected with the second choke stopping circuit, the third antenna interface is connected with the third choke stopping circuit, the fourth antenna interface is connected with the fourth choke stopping circuit, the first choke stopping circuit and the second choke stopping circuit are connected with the first switch chip, the third choke stopping circuit and the fourth choke stopping circuit are connected with the second switch chip, the first switch chip and the second switch chip are connected with a device to be switched, and the second switch chip and the device to be switched are connected with the equipment to be switched, The direct current blocking circuit is connected, the first choke blocking circuit, the second choke blocking circuit, the third choke blocking circuit and the fourth choke blocking circuit are used for carrying out choke blocking on signals and sending the signals to the first switch chip and the second switch chip, and the first switch chip and the second switch chip are used for switching.
A high-power switch matrix circuit, two switches are used in parallel, organic series connection has realized the switching of antenna to set up a plurality of protection circuit, satisfy high-power use.
Drawings
Fig. 1 is a block diagram of a high power switch matrix circuit according to the present invention;
fig. 2 is a circuit diagram of a high power switch matrix circuit according to the present invention;
fig. 3 is a frequency difference diagram of the first switch chip and the second switch chip in fig. 1.
Detailed Description
The utility model provides a high-power switch matrix circuit is introduced below with the attached drawing:
referring to fig. 1, fig. 2 and fig. 3, the present invention provides a high power switch matrix circuit, which includes: a first antenna interface RF1, a second antenna interface RF2, a third antenna interface RF3, a fourth antenna interface RF4, a first choke dc-blocking circuit 1, a second choke dc-blocking circuit 2, a third choke dc-blocking circuit 3, a fourth choke dc-blocking circuit 4, a first switch chip 5, a second switch chip 6, and a dc-blocking circuit 7, wherein the first antenna interface RF1 is connected to the first choke dc-blocking circuit 1, the second antenna interface RF2 is connected to the second choke dc-blocking circuit 2, the third antenna interface RF3 is connected to the third choke dc-blocking circuit 3, the fourth antenna interface RF4 is connected to the fourth choke dc-blocking circuit 4, the first choke dc-blocking circuit 1, the second choke dc-blocking circuit 2 are connected to the first switch chip 5, the third choke dc-blocking circuit 3, the fourth choke dc-blocking circuit 4 are connected to the second switch chip 6, the first switch chip 5 and the second switch chip 6 are connected with the equipment to be switched and the DC blocking circuit 7.
The first antenna interface RF1, the second antenna interface RF2, the third antenna interface RF3 and the fourth antenna interface RF4 are used for connecting antennas.
The first choke/dc blocking circuit 1, the second choke/dc blocking circuit 2, the third choke/dc blocking circuit 3, and the fourth choke/dc blocking circuit 4 are used to reduce insertion loss and prevent a dc voltage from damaging other electronic circuits.
The first choke and dc blocking circuit 1 includes a first capacitor C1, a second capacitor C2, and a first inductor L1, one end of the second capacitor C2 is connected to the first antenna interface RF1, the other end of the second capacitor C2 is connected to the first switch chip 5 and one end of the first inductor L1, the other end of the first inductor L1 is connected to one end of the first capacitor C1, and the other end of the first capacitor C1 is grounded.
The second choke and dc blocking circuit 2 includes a third capacitor C5, a fourth capacitor C6, and a second inductor L4, one end of the third capacitor C5 is connected to the second antenna interface RF2, the other end of the third capacitor C5 is connected to the first switch chip 5 and one end of the second inductor L4, the other end of the second inductor L4 is connected to the fourth capacitor C6, and the other end of the fourth capacitor C6 is grounded.
The third choke and dc blocking circuit 3 includes a fifth capacitor C35, a sixth capacitor C26, and a third inductor L24, one end of the fifth capacitor C35 is connected to the third antenna interface RF3, the other end of the fifth capacitor C35 is connected to one end of the third inductor L24 and the second switch chip 6, the other end of the third inductor L24 is connected to one end of the sixth capacitor C26, and the other end of the sixth capacitor C26 is grounded.
The fourth choke and dc-blocking circuit 4 includes a seventh capacitor C18, an eighth capacitor C19, and a fourth inductor L16, one end of the seventh capacitor C18 is connected to the fourth antenna interface RF4, the other end of the seventh capacitor C18 is connected to one end of the fourth inductor L16 and the second switch chip 6, the other end of the fourth inductor L16 is connected to one end of the eighth capacitor C19, and the other end of the eighth capacitor C19 is grounded.
The first switch chip 5 and the second switch chip 6 are single-pole three-position switches, and the first switch chip 5 and the second switch chip 6 select MASW-011030 as a radio station antenna change-over switch matrix. The insertion loss of the chip is shown in fig. 3.
As can be seen from FIG. 3, at the low frequency band, the insertion loss of the chip manual is within 0.2dB, and the actually made index is 0.2 dB. Considering the cable and connector loss, the part of the index meets the design requirement.
The dc blocking circuit 7 includes a ninth capacitor C8, a tenth capacitor C9, an eleventh capacitor C21, a twelfth capacitor C22, a fifth inductor L6, and a sixth inductor L21, wherein one end of the fifth inductor L6 and one end of the ninth capacitor C8 are connected to the first switch chip 5, the other end of the fifth inductor L6 is connected to the tenth capacitor C9, the other end of the tenth capacitor C9 is grounded, the other end of the ninth capacitor C8 is connected to one end of the twelfth capacitor C22, the other end of the twelfth capacitor C22 is connected to one end of the sixth inductor L21 and the second switch chip 6, the other end of the sixth inductor L21 is connected to one end of the eleventh capacitor C21, and the other end of the eleventh capacitor C21 is grounded.
The ninth capacitor C8 and the twelfth capacitor C22 are dc blocking capacitors to prevent the dc voltage from damaging other electronic circuits.
A high-power switch matrix circuit, two switches are used in parallel, organic series connection has realized the switching of antenna to set up a plurality of protection circuit, satisfy high-power use. The insertion loss of the product is one time better than that of the similar product, the insertion loss of the conventional product is 0.5dB, the insertion loss of the module is 0.2dB, and the small insertion loss is particularly important in high-power application.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the present invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included within the protection scope of the present invention.
Claims (7)
1. A high power switch matrix circuit, comprising: the first antenna interface is connected with the first choke stopping circuit, the second antenna interface is connected with the second choke stopping circuit, the third antenna interface is connected with the third choke stopping circuit, the fourth antenna interface is connected with the fourth choke stopping circuit, the first choke stopping circuit and the second choke stopping circuit are connected with the first switch chip, the third choke stopping circuit and the fourth choke stopping circuit are connected with the second switch chip, the first switch chip and the second switch chip are connected with a device to be switched, and the second switch chip and the device to be switched are connected with the equipment to be switched, The direct current blocking circuit is connected, the first choke blocking circuit, the second choke blocking circuit, the third choke blocking circuit and the fourth choke blocking circuit are used for carrying out choke blocking on signals and sending the signals to the first switch chip and the second switch chip, and the first switch chip and the second switch chip are used for switching.
2. The high power switch matrix circuit according to claim 1, wherein the first choke blocking circuit comprises a first capacitor, a second capacitor, and a first inductor, one end of the second capacitor is connected to the first antenna interface, the other end of the second capacitor is connected to the first switch chip and one end of the first inductor, the other end of the first inductor is connected to one end of the first capacitor, and the other end of the first capacitor is grounded.
3. The high power switch matrix circuit according to claim 1, wherein the second choke blocking circuit comprises a third capacitor, a fourth capacitor and a second inductor, one end of the third capacitor is connected to the second antenna interface, the other end of the third capacitor is connected to the first switch chip and one end of the second inductor, the other end of the second inductor is connected to the fourth capacitor, and the other end of the fourth capacitor is grounded.
4. The high power switch matrix circuit according to claim 1, wherein the third choke-dc blocking circuit comprises a fifth capacitor, a sixth capacitor and a third inductor, one end of the fifth capacitor is connected to the third antenna interface, the other end of the fifth capacitor is connected to one end of the third inductor and the second switch chip, the other end of the third inductor is connected to one end of the sixth capacitor, and the other end of the sixth capacitor is grounded.
5. The high power switch matrix circuit according to claim 1, wherein the fourth choke-dc blocking circuit comprises a seventh capacitor, an eighth capacitor and a fourth inductor, one end of the seventh capacitor is connected to the fourth antenna interface, the other end of the seventh capacitor is connected to one end of the fourth inductor and the second switch chip, the other end of the fourth inductor is connected to one end of the eighth capacitor, and the other end of the eighth capacitor is grounded.
6. The high power switch matrix circuit of claim 1, wherein the first switch chip and the second switch chip are of the MASW-011030 type.
7. The high power switch matrix circuit according to claim 1, wherein the dc blocking circuit comprises a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a fifth inductor and a sixth inductor, one end of the fifth inductor and one end of the ninth capacitor are connected to the first switch chip, the other end of the fifth inductor is connected to the tenth capacitor, the other end of the tenth capacitor is grounded, the other end of the ninth capacitor is connected to one end of the twelfth capacitor, the other end of the twelfth capacitor is connected to one end of the sixth inductor and the second switch chip, the other end of the sixth inductor is connected to one end of the eleventh capacitor, and the other end of the eleventh capacitor is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922163773.2U CN210693891U (en) | 2019-12-05 | 2019-12-05 | High-power switch matrix circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922163773.2U CN210693891U (en) | 2019-12-05 | 2019-12-05 | High-power switch matrix circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210693891U true CN210693891U (en) | 2020-06-05 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922163773.2U Active CN210693891U (en) | 2019-12-05 | 2019-12-05 | High-power switch matrix circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210693891U (en) |
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2019
- 2019-12-05 CN CN201922163773.2U patent/CN210693891U/en active Active
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