CN210678288U - Silicon wafer jig for chip grinding - Google Patents

Silicon wafer jig for chip grinding Download PDF

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Publication number
CN210678288U
CN210678288U CN201921720319.6U CN201921720319U CN210678288U CN 210678288 U CN210678288 U CN 210678288U CN 201921720319 U CN201921720319 U CN 201921720319U CN 210678288 U CN210678288 U CN 210678288U
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silicon wafer
chip
base plate
groove
main body
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CN201921720319.6U
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黄勇超
林佳婵
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Hongkang Technology Testing Shanghai Co Ltd
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Hongkang Technology Testing Shanghai Co Ltd
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Abstract

The utility model relates to a silicon wafer jig for chip grinding, which comprises a silicon wafer base plate, wherein the upper end surface of the silicon wafer base plate is provided with a plurality of diversion trenches with square outlines and inconsistent girths, the centers of the diversion trenches are arranged in a convergent-divergent manner by taking a central point as a starting point; the silicon wafer base plate is provided with a silicon wafer clamping frame, the thickness of the silicon wafer clamping frame is equal to that of the chip main body, the inner side wall of the silicon wafer clamping frame abuts against four sides of the chip main body respectively, bubbles can be reduced, and reinforcing of the jig in the heating and grinding processes is avoided to be insufficient, so that cracking and layering of the chip are reduced.

Description

Silicon wafer jig for chip grinding
Technical Field
The utility model relates to a grind tool technical field, especially relate to a silicon chip tool for chip grinds.
Background
Modern microelectronic technology is developed very rapidly, and especially various optoelectronic devices are gradually developed in the direction of miniaturization, large-scale integration, high efficiency, high reliability and the like. However, as the integration of electronic systems increases, the power density increases, and the substrate on the chip needs to be polished during the experimental analysis or packaging of the chip.
As shown in fig. 4, the chip sequentially includes a chip body 10 and a substrate 20, and the conventional chip polishing process includes the following steps: firstly, solid wax or adhesive glue is evenly coated on the base plate, then the front surface of the chip body 10 is placed and attached to the base plate, after heating and curing, the chip body 10 is fixed on the base plate, and then the substrate 20 is ground and polished.
The defects of the prior art are that the chip cannot be attached to the base plate due to bubbles generated during gluing or waxing, the thickness is uneven, small cracks are prone to being generated after the chip is ground, and due to the fact that the ductility and the thermal expansion coefficient of the material of the chip are inconsistent with those of a jig for clamping the chip, the jig is prone to not sufficiently reinforcing the chip due to the difference in the grinding process or the heating process, and accordingly the chip is prone to cracking and layering.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a silicon chip tool for chip grinds can reduce the production of bubble and avoid heating and the reinforcement of grinding in-process tool not enough to reduce the fracture layering of chip.
The above technical purpose of the present invention can be achieved by the following technical solutions:
a silicon wafer jig for grinding chips comprises a silicon wafer base plate, wherein a plurality of flow guide grooves with square outlines and inconsistent circumferences are formed in the upper end surface of the silicon wafer base plate, the centers of the flow guide grooves are the same point and are arranged in a zooming manner by taking a central point as a starting point; the silicon wafer base plate is provided with a silicon wafer clamping frame, the thickness of the silicon wafer clamping frame is equal to that of the chip main body, and the inner side walls of the silicon wafer clamping frame respectively abut against the four sides of the chip main body.
By adopting the technical scheme, firstly, adhesive glue is uniformly coated on the upper surface of the silicon wafer base plate, then the front surface of the chip main body is placed and attached to the silicon wafer base plate, then the silicon wafer clamping frame is placed on the silicon wafer base plate, the silicon wafer clamping frame and the silicon wafer base plate are bonded through the adhesive glue, the chip main body is clamped by the silicon wafer clamping frame, meanwhile, the substrate is supported, and finally, the chip main body is attached to the upper surface of the silicon wafer base plate as much as possible by heating and pressurizing, so that the fixing process is completed; by arranging the flow guide groove, redundant glue solution and bubbles between the chip main body and the silicon wafer base plate are extruded and discharged into the flow guide groove, and the bubbles in the glue solution are discharged along with the extrusion, so that the redundant glue solution and bubbles between the chip main body and the silicon wafer base plate are reduced on the premise of ensuring the bonding stability of the chip main body, the chip main body is attached to the silicon wafer base plate as far as possible, the finished thickness uniformity of the ground chip is improved, and the cracking and layering of the chip are reduced; meanwhile, the silicon wafer base plate and the silicon wafer clamping frame are made of monocrystalline silicon, the strength is moderate, the toughness is lacking, the silicon wafer base plate and the silicon wafer clamping frame are suitable for grinding, the silicon wafer base plate and the silicon wafer clamping frame are the same as the chip in material, and the thermal expansion coefficient and the ductility of the silicon wafer base plate and the chip are close to each other, so that the expansion and the extension conditions of the silicon wafer base plate and the chip are similar in the grinding or heating and curing process, and the condition.
The utility model discloses further set up to: the silicon wafer base plate is characterized in that the upper end face of the silicon wafer base plate is provided with a plurality of straight grooves, each straight groove is circumferentially and uniformly distributed by taking the central point of the guide groove as a circle center, and the straight grooves are communicated with the guide groove in an intersecting manner.
Adopt above-mentioned technical scheme, can play the reposition of redundant personnel effect to the colloid in the guiding gutter, avoid the colloid to follow the condition that the guiding gutter overflowed, the mode of arranging of straight flute can radiate to all guiding gutters with minimum straight flute number simultaneously, all the guiding gutters communicate, greatly increased the flexibility that the colloid shunted in the guiding gutter to improve the efficiency of the unnecessary colloid of discharge, improved the thickness homogeneity after the chip grinds.
The utility model discloses further set up to: the silicon wafer clamping frame comprises four clamping blocks, the horizontal sections of the clamping blocks are V-shaped, and the two side walls of the clamping blocks are wrapped on four right-angle parts abutting against the chip main body respectively.
Adopt above-mentioned technical scheme, through changing the distance between four grip blocks, can realize carrying out the centre gripping to the chip main part of unidimensional not, provide the suitability of tool, four grip blocks can correspond four right angles of guiding gutter respectively simultaneously and rectify chip main part, make the chip main part be located the square frame of guiding gutter just, can improve the steadiness of being connected of chip main part and silicon chip backing plate.
The utility model discloses further set up to: and a convex block with a V-shaped horizontal section is fixed on the lower end surface of the clamping block in a protruding manner, and the convex block is clamped and embedded in the right-angle part of the diversion trench.
By adopting the technical scheme, the clamping block and the silicon wafer base plate can be connected stably by clamping and embedding the convex block and the flow guide groove; meanwhile, the convex blocks can be clamped and embedded in different flow guide grooves, so that the position change among the four clamping blocks is realized, and the clamping requirements on chip main bodies with different sizes are met; and the lug is V-shaped and is embedded in the right-angled part of the flow guide groove in a clamping manner, so that the position of the chip main body relative to the silicon wafer base plate can be corrected, the chip main body is ensured to be just positioned in a square frame formed by the flow guide groove, and the connection stability of the chip main body and the silicon wafer base plate can be improved.
The utility model discloses further set up to: the junction of the two side walls of the central point of the flow guide groove far away from the convex block is provided with a placing groove along the direction towards the central point of the flow guide groove, and a spring is placed in the placing groove.
By adopting the technical scheme, the spring forces the clamping block to move in the direction close to the chip main body, when the chip is heated or pressurized or the processing precision is insufficient, a gap is formed between the bump and the diversion trench, so that the clamping block can not reinforce the chip main body sufficiently, and the spring can force the bump to be always attached to the side wall of the diversion trench to reduce the gap, thereby reducing the condition of insufficient reinforcement and reducing the condition of cracking and layering of the chip; simultaneously, the direction of the spring elastic force is the diagonal line of the flow guide groove, so that the force is supported against the right-angled part of the chip main body through the clamping block, and the deviation rectifying effect on the chip main body is achieved.
The utility model discloses further set up to: the steel ball is placed in the placing groove, one end of the spring abuts against the groove bottom of the placing groove, and the other end of the spring abuts against the steel ball.
By adopting the technical scheme, when the lug is clamped and embedded in the diversion trench, the edge of the notch of the diversion trench is abutted against the spherical surface of the steel ball, and the steel ball is pressed into the placing trench, so that the situation that the lug is difficult to clamp and embed into the diversion trench when the spring force is too large is avoided; meanwhile, the spherical surface of the steel ball is a smooth curved surface, so that the friction force borne by the convex block in the downward moving process can be reduced, and the convenience in operation is improved.
The utility model discloses further set up to: and a through groove is formed in the lower end face of the lug and is communicated with the diversion groove.
By adopting the technical scheme, the contact area between the convex block and the adhesive can be increased, so that the connection stability between the convex block and the silicon wafer base plate is improved.
The utility model discloses further set up to: the through groove is positioned at the junction of the side wall of the lug facing the chip main body and the lower end face of the lug.
By adopting the technical scheme, when the glue in the through groove is too much, the spring force forces the lug to be attached to the side wall of the diversion trench, the redundant glue in the through groove can be extruded and discharged, and the situation that the clamping force of the clamping block on the chip main body is insufficient due to the fact that the gap between the lug and the diversion trench is filled with the glue can be avoided.
To sum up, the utility model discloses following beneficial effect has:
1. by arranging the flow guide groove, redundant glue solution and bubbles between the chip main body and the silicon wafer base plate are extruded and discharged into the flow guide groove, so that the finished thickness uniformity of the ground chip is improved, and cracking and layering of the chip are reduced; meanwhile, the jig made of the monocrystalline silicon material has moderate strength, is the same as the chip material, and has close thermal expansion coefficient and ductility, so that the situation of cracking and layering of the chip caused by insufficient reinforcement of the jig on the chip can be reduced in the grinding or heating and curing process;
2. the square diversion groove and the V-shaped convex block are arranged, so that the position of the four clamping blocks can be changed, the chip main bodies with different sizes can be clamped, the V-shaped clamping blocks are clamped on the four right angles of the chip main body to play a role in correcting deviation, the chip main body is ensured to be just positioned in a square frame formed by the diversion groove, and the connection stability of the chip main body and the silicon wafer base plate can be improved;
3. the springs are arranged in the diagonal direction of the flow guide grooves, so that the condition of insufficient reinforcement can be reduced, and the condition of cracking and layering of the chip is reduced; and the spring elasticity supports against the right-angled part of the chip main body through the clamping block, so that the correction effect on the chip main body is achieved.
Drawings
FIG. 1 is a schematic view of the assembly of a silicon wafer jig and a chip according to the present invention;
FIG. 2 is a three-dimensional exploded view of the present invention for showing the connection relationship of the respective structures;
fig. 3 is a three-dimensional cross-sectional view of the clamping block of the present invention;
fig. 4 is a schematic structural diagram of a conventional chip.
In the figure, 1, a silicon wafer base plate; 2. a silicon wafer clamping frame; 10. a chip body; 11. a diversion trench; 12. a straight groove; 20. a substrate; 21. a clamping block; 22. a bump; 23. a placement groove; 24. a steel ball; 25. a spring; 26. a through groove.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
A silicon wafer jig for grinding chips is shown in figures 1 and 2 and comprises a silicon wafer base plate 1, wherein a plurality of square guide grooves 11 are formed in the upper end face of the silicon wafer base plate 1, the perimeters of the guide grooves 11 are different, the centers of the guide grooves 11 are the same point, and the guide grooves are arranged in a zooming manner by taking a central point as a starting point; the upper end surface of the silicon wafer base plate 1 is provided with a plurality of straight grooves 12, each straight groove 12 is circumferentially and uniformly distributed by taking the central point of the guide groove 11 as the center of a circle, and the straight grooves 12 are intersected and communicated with the guide groove 11.
As shown in fig. 1 and 2, a silicon wafer holder 2 is arranged on a silicon wafer base plate 1, the silicon wafer holder 2 and the silicon wafer base plate 1 are made of monocrystalline silicon, the silicon wafer holder 2 comprises four holding blocks 21, the thickness of the silicon wafer holder 2 is equal to that of a chip body 10, the horizontal cross section of each holding block 21 is V-shaped, and two side walls of the four holding blocks 21 are wrapped on four right-angle portions abutting against the chip body 10 respectively.
As shown in fig. 2 and 3, a bump 22 is fixed on the lower end surface of the clamping block 21 in a protruding manner, the horizontal section of the bump 22 is V-shaped, and the bump 22 is embedded in the right-angled portion of the guiding groove 11 (refer to fig. 1); the convex block 22 is far away from the juncture of the two side walls of the central point of the diversion trench 11 and is provided with a placing groove 23, the axial direction of the placing groove 23 is the diagonal direction of the diversion trench 11, a steel ball 24 is placed in the placing groove 23, and a spring 25 is placed between the axial groove bottom of the placing groove 23 and the steel ball 24.
As shown in fig. 3, a through groove 26 is formed on the lower end surface of the bump 22, the through groove 26 is communicated with the diversion trench 11, and the through groove 26 is located at a boundary between the side wall of the bump 22 facing the chip body 10 and the lower end surface of the bump 22.
Working principle (refer to fig. 1 and 2);
firstly, adhesive glue is uniformly coated on the upper surface of a silicon wafer base plate 1, then the front surface of a chip main body 10 is placed and attached to the silicon wafer base plate 1, then a silicon wafer clamping frame 2 is placed on the silicon wafer base plate 1, four clamping blocks 21 are respectively clamped at four right-angle parts of the chip main body 10, the clamping blocks 21 are fixedly connected with the silicon wafer base plate 1 through clamping and embedding between a convex block 22 and a diversion trench 11 and the adhesive glue, meanwhile, a substrate 20 is supported, and finally, the chip main body 10 is attached to the upper surface of the silicon wafer base plate 1 as far as possible through heating and pressurizing, so that the fixing process is completed; the excessive glue solution between the chip main body 10 and the silicon wafer base plate 1 is extruded and discharged into the guide groove 11 and the straight groove 12, and meanwhile, bubbles in the glue solution are discharged, so that on the premise of ensuring the bonding stability of the chip main body 10, the excessive glue solution and the bubbles between the chip main body 10 and the silicon wafer base plate 1 are reduced, the chip main body 10 is attached to the silicon wafer base plate 1 as far as possible, the finished thickness uniformity of the chip after grinding is improved, and the cracking and layering of the chip are reduced; meanwhile, the silicon wafer base plate 1 and the silicon wafer clamping frame 2 are made of monocrystalline silicon, the strength is moderate, the toughness is lack, the grinding is suitable, the silicon wafer base plate is the same as the chip in material, the thermal expansion coefficient and the ductility of the silicon wafer base plate and the chip are close, so that the expansion and the extension conditions of the silicon wafer base plate and the chip are similar in the grinding or heating and curing process, and the condition that the chip is cracked and layered due to insufficient reinforcement of a jig on the chip can be reduced.
The present embodiment is only for explaining the present invention, and it is not limited to the present invention, and those skilled in the art can make modifications to the present embodiment without inventive contribution as required after reading the present specification, but all the embodiments are protected by patent laws within the scope of the present invention.

Claims (8)

1. The utility model provides a silicon chip tool for chip grinds, characterized by: the silicon wafer base plate comprises a silicon wafer base plate (1), wherein a plurality of flow guide grooves (11) which are square in outline and different in circumference are formed in the upper end face of the silicon wafer base plate (1), the centers of the flow guide grooves (11) are the same point and are arranged in a zooming manner by taking a central point as a starting point; the silicon wafer base plate (1) is provided with a silicon wafer clamping frame (2), the thickness of the silicon wafer clamping frame (2) is equal to that of the chip main body (10), and the inner side wall of the silicon wafer clamping frame (2) is abutted to four sides of the chip main body (10) respectively.
2. The silicon wafer jig for chip grinding as claimed in claim 1, wherein: the silicon wafer base plate is characterized in that a plurality of straight grooves (12) are formed in the upper end face of the silicon wafer base plate (1), the straight grooves (12) are circumferentially and uniformly distributed by taking the central point of the guide groove (11) as a circle center, and the straight grooves (12) are communicated with the guide groove (11) in an intersecting manner.
3. The silicon wafer jig for chip grinding as claimed in claim 1, wherein: the silicon wafer clamping frame (2) comprises four clamping blocks (21), the horizontal sections of the clamping blocks (21) are V-shaped, and the two side walls of the clamping blocks (21) are wrapped on four right-angle parts abutted to the chip main body (10) respectively.
4. The silicon wafer jig for chip grinding as claimed in claim 3, wherein: and a convex block (22) with a V-shaped horizontal section is fixedly protruded from the lower end surface of the clamping block (21), and the convex block (22) is clamped and embedded in the right-angle part of the diversion trench (11).
5. The silicon wafer jig for chip grinding as claimed in claim 4, wherein: the junction of two side walls of the central point of the diversion trench (11) is kept away from the convex block (22), a placing groove (23) is formed in the direction of the central point of the diversion trench (11), and a spring (25) is placed in the placing groove (23).
6. The silicon wafer jig for chip grinding as claimed in claim 5, wherein: the steel ball (24) is placed in the placing groove (23), one end of the spring (25) abuts against the groove bottom of the placing groove (23), and the other end of the spring (25) abuts against the steel ball (24).
7. The silicon wafer jig for chip grinding as claimed in claim 4, wherein: the lower end face of the bump (22) is provided with a through groove (26), and the through groove (26) is communicated with the diversion trench (11).
8. The silicon wafer jig for chip grinding as claimed in claim 7, wherein: the through groove (26) is positioned at the junction of the side wall of the bump (22) facing the chip main body (10) and the lower end face of the bump (22).
CN201921720319.6U 2019-10-11 2019-10-11 Silicon wafer jig for chip grinding Active CN210678288U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201921720319.6U CN210678288U (en) 2019-10-11 2019-10-11 Silicon wafer jig for chip grinding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201921720319.6U CN210678288U (en) 2019-10-11 2019-10-11 Silicon wafer jig for chip grinding

Publications (1)

Publication Number Publication Date
CN210678288U true CN210678288U (en) 2020-06-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201921720319.6U Active CN210678288U (en) 2019-10-11 2019-10-11 Silicon wafer jig for chip grinding

Country Status (1)

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CN (1) CN210678288U (en)

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