CN210607267U - GaN HEMT device with synchronously prepared source electrode, drain electrode and grid electrode - Google Patents
GaN HEMT device with synchronously prepared source electrode, drain electrode and grid electrode Download PDFInfo
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- CN210607267U CN210607267U CN201921141428.2U CN201921141428U CN210607267U CN 210607267 U CN210607267 U CN 210607267U CN 201921141428 U CN201921141428 U CN 201921141428U CN 210607267 U CN210607267 U CN 210607267U
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Abstract
The utility model discloses a GaN HEMT device of source electrode, drain electrode and synchronous preparation of grid, the device includes substrate, buffer layer, channel layer and the barrier layer that from the bottom up distributes in proper order, and source electrode and drain electrode are connected at the both ends of the upper surface of barrier layer, and the one deck insulating layer that distributes on the barrier layer upper surface between source electrode and the drain electrode, the upper surface connection grid of insulating layer, source electrode and drain electrode form ohmic contact respectively with the channel layer, and the source electrode highly equals with the drain electrode, and is higher than the height of grid. The GaN HEMT device with the source electrode, the drain electrode and the grid electrode synchronously prepared overcomes the defect that the source electrode, the drain electrode and the grid electrode need to be prepared in two steps in the existing preparation process, does not have the light diffraction effect of the traditional photoetching technology, and can quickly manufacture micro-nano patterns with high dimensional precision. And the source electrode, the drain electrode and the grid electrode are synchronously prepared without alignment and secondary photoetching steps, so that very accurate size control can be realized, the line width of the device can be as low as 50nm, the operation steps are simple, and the method is suitable for industrial production.
Description
Technical Field
The utility model belongs to the technical field of the semiconductor, concretely relates to GaN HEMT device of source electrode, drain electrode and the synchronous preparation of grid.
Background
In recent years, wide bandgap semiconductors represented by group III nitrides such as GaN have been receiving much attention and have been vigorously developed. GaN High Electron Mobility Transistors (HEMTs) based on AlGaN/GaN heterojunctions exhibit incomparable great advantages in the aspects of high temperature resistance, radiation resistance, high voltage, high power, high frequency and the like, have already obtained practical application in the fields of power electronics and microwave radio frequency, and have a wide future development space.
At present, GaN HEMT devices are mainly prepared by a photolithography process. The GaN HEMT with the grid width of more than 1 mu m is prepared by using an ultraviolet photoetching process with the wavelength of 365 nm, and the GaN HEMT with the grid width of 20 nm-1 mu m is prepared by using a deep ultraviolet photoetching or electron beam photoetching process with the wavelength of less than 254 nm. In GaN HEMT devices, the source and drain electrodes must form low resistance ohmic contacts with the channel layer to reduce on-resistance, while a thin insulating layer composed of silicon dioxide, aluminum oxide, etc. is usually added between the gate and barrier layers for isolation to reduce leakage current. Currently, the gate of a GaN HEMT cannot be fabricated in synchronization with the source and drain. According to the manufacturing sequence of the grid electrode relative to the source electrode and the drain electrode, the preparation process of the GaN HEMT is divided into a grid electrode first process and a grid electrode later process. Both processes require a second photolithography to fabricate the gate, source and drain in two steps. The secondary photoetching has many defects, a grid mask plate and a source and drain mask plate need to be designed respectively, the processing steps are complex, and the alignment step before the secondary photoetching introduces dimension errors, so that the problem is particularly prominent when a GaN HEMT device with a narrow grid-source electrode distance is designed.
SUMMERY OF THE UTILITY MODEL
In order to overcome the defects and shortcomings in the prior art, the utility model aims to provide a GaN HEMT device with a source electrode, a drain electrode and a grid electrode which are synchronously prepared.
The object of the present invention is achieved by at least one of the following technical solutions.
The utility model provides a GaN HEMT device of source electrode, drain electrode and synchronous preparation of grid, including substrate, buffer layer, channel layer and the barrier layer that from the bottom up distributes in proper order, source electrode and drain electrode are connected at the both ends of the upper surface of barrier layer, and the one deck insulating layer that distributes on the barrier layer upper surface between source electrode and the drain electrode, the upper surface connection grid of insulating layer, source electrode and drain electrode form ohmic contact respectively with the channel layer, and the source electrode highly equals with the drain electrode, and is higher than the height of grid.
Preferably, the source electrode, the drain electrode and the grid electrode are all cuboids; the size of the source electrode is the same as that of the drain electrode, the height is 400-1600 nm, the length is 1-10 mu m, and the width is 1-10 mu m; the height of the grid electrode is 200-1400 nm, the width is the same as that of the source electrode, and the length is 50-2000 nm.
Preferably, the height of the source electrode is 150-300 nm higher than that of the gate electrode; the distance between the grid and the source is 100-4000 nm; the distance between the grid and the drain is 1-4 times of the distance between the grid and the source.
Preferably, the source electrode, the drain electrode and the grid electrode are metal layers, the metal layers comprise a titanium metal layer, an aluminum metal layer, a nickel metal layer and a gold metal layer which are sequentially arranged from bottom to top, the thickness of the titanium metal layer is 10-30 nm, the thickness of the aluminum metal layer is 50-200 nm, the thickness of the nickel metal layer is 50-100 nm, and the thickness of the gold metal layer is 50-100 nm.
Preferably, the material of the insulating layer is one of silicon dioxide, silicon nitride and aluminum oxide; the thickness of the insulating layer is 5-60 nm; the substrate is one of silicon, silicon carbide and sapphire, and the thickness of the substrate is 0.3-1 mm;
the buffer layer is an AlGaN graded layer or an AlN/GaN superlattice layer, and the thickness of the buffer layer is 1.5-3 mu m;
the channel layer is a GaN channel layer, and the thickness of the channel layer is 1-3 mu m; the barrier layer is an AlGaN barrier layer, and the thickness of the barrier layer is 20-25 nm.
Preferably, the device further comprises a foil connected with the grid, wherein the foil is used for leading out the grid to the outside of the device so as to facilitate the test of a probe station; the foil is located on the upper surface of the insulating layer, the shape of the foil is cuboid, the height of the foil is the same as that of the grid, the length of the foil is 1-10 micrometers, and the width of the foil is 1-10 micrometers.
The utility model also provides a source, hourglass and the synchronous preparation method of grid of gaN HEMT device, including following step:
(1) taking a wafer, wherein the wafer comprises a substrate, a buffer layer, a channel layer and a barrier layer which are sequentially arranged from bottom to top, and depositing an insulating layer on the barrier layer;
(2) coating a layer of negative photoresist on the insulating layer;
(3) simultaneously imprinting patterns of a source electrode, a drain electrode and a grid electrode on the upper surface of the negative photoresist by a nano imprinting technology, and curing the negative photoresist by ultraviolet irradiation of 254-365 nm;
(4) removing the negative photoresist and the insulating layer below the bottom of the source electrode and drain electrode pattern by an etching process to expose the barrier layer, thereby realizing the transfer of the source electrode and drain electrode pattern from the negative photoresist to the wafer;
(5) removing the negative photoresist under the bottom of the pattern of the grid electrode by an etching process to expose the insulating layer and realize the transfer of the grid electrode pattern from the negative photoresist to the wafer;
(6) evaporating a metal layer on the negative photoresist, the barrier layer exposed in the step (4) and the upper surface of the insulating layer exposed in the step (5), removing the negative photoresist and the metal layer on the upper surface of the negative photoresist in a photoresist removing solution after evaporation, and forming a source electrode and a drain electrode on the metal layer on the upper surface of the barrier layer exposed in the step (4) correspondingly; forming a grid electrode on the exposed metal layer on the upper surface of the insulating layer in the step (5);
(7) the source and drain electrodes are brought into ohmic contact with the channel layer by thermal annealing.
Preferably, the deposition method of the insulating layer in the step (1) is one of metal organic chemical vapor deposition, plasma enhanced chemical vapor deposition, pulsed laser deposition, atomic layer deposition and molecular beam epitaxy;
the thickness of the negative photoresist in the step (2) is 400-1600 nm;
the ultraviolet curing time in the step (3) is 30-60 seconds, and is related to the thickness of the negative photoresist.
Preferably, the etching process in steps (4) and (5) adopts Reactive Ion Etching (RIE) or inductively coupled plasma etching (ICP); use of O in etching negative photoresist2The method comprises the following steps of selecting/Ar as etching gas, and selecting carbon tetrafluoride/trifluoromethane/Ar, carbon tetrafluoride/trifluoromethane/Ar and chlorine/boron trichloride/Ar as etching gas when an insulating layer is etched;
the evaporation method of the metal electrode in the step (6) is electron beam evaporation or magnetron sputtering;
the thermal annealing temperature in the step (7) is 700-900 ℃, and the time is 30-60 seconds.
Preferably, in the step (3), a foil pattern is printed while the source electrode, the drain electrode and the gate electrode pattern are printed on the upper surface of the negative photoresist by a nano-imprinting technique, the foil pattern is connected with the gate electrode pattern, the bottom surface of the foil pattern is the upper surface of the insulating layer, and the depth of the foil pattern is the same as that of the gate electrode pattern.
Compared with the prior art, the utility model has the following beneficial effect and advantage:
(1) the utility model utilizes the nano-imprinting technology to synchronously prepare the source electrode, the grid electrode and the drain electrode, and overcomes the defect that the prior preparation process of the GaN HEMT device needs to prepare the source electrode, the drain electrode and the grid electrode in two steps;
(2) the nano-imprinting technology is a novel micro-nano processing technology based on a mechanical transfer means, does not have the light diffraction effect of the traditional photoetching technology, and can quickly manufacture micrometer and nanometer level patterns with high dimensional precision;
(3) the source electrode, the drain electrode and the grid electrode are synchronously prepared without an alignment step and a secondary photoetching step, so that very accurate size control can be realized, the line width of the device can be as low as 50nm, the operation steps are simple, and the method is suitable for industrial production.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the attached drawings are provided for a brief description. It is to be noted, however, that the following drawings are only for the purpose of illustrating the present invention and do not constitute an undue limitation on the present invention. In the drawings:
fig. 1 is a schematic structural view of a nanoimprint mold used in an embodiment, in which (a) is a front view and (b) is a top view;
fig. 2 is a schematic structural diagram of a GaN HEMT device fabricated with source, drain and gate simultaneously provided by the embodiment;
in the figure: 1-a source electrode; 2-a drain electrode; 3-a grid; 4-a foil; 5-an insulating layer; a 6-AlGaN barrier layer; 7-a GaN channel layer; 8-a buffer layer; 9-substrate.
Detailed Description
The present invention is further described in detail by the following examples, which should be noted that the examples are only for illustrating the present invention and are not to be construed as limiting the scope of the present invention. Further, it is understood that various non-essential changes and modifications can be made by one skilled in the art without inventive work after reading the present disclosure, and equivalents thereof are also within the scope of the invention as defined in the appended claims.
Example 1
The embodiment provides a GaN HEMT device with a source electrode, a drain electrode and a grid electrode synchronously prepared, as shown in fig. 2, the device comprises a substrate 9, a buffer layer 8, a GaN channel layer 7 and an AlGaN barrier layer 6 which are sequentially distributed from bottom to top, wherein two ends of the upper surface of the AlGaN barrier layer 6 are connected with the source electrode 1 and the drain electrode 2, an insulating layer 5 is distributed on the upper surface of the AlGaN barrier layer 6 between the source electrode 1 and the drain electrode 2, the upper surface of the insulating layer 5 is connected with the grid electrode 3, the source electrode 1 and the drain electrode 2 are in ohmic contact with the GaN channel layer 7 respectively, and the height of the source electrode 1 is equal to that of the drain electrode.
The source electrode 1, the drain electrode 2 and the grid electrode 3 are all cuboids; the size of the source electrode 1 is the same as that of the drain electrode 2, the height is 750 nm, the length is 5 mu m, and the width is 5 mu m; the gate 3 has a height of 350 nm, a width equal to that of the source 1, and a length of 100 nm.
The distance between the grid 3 and the source 1 is 200 nm; the distance between the gate 3 and the drain 2 is 500 nm.
The source electrode 1, the drain electrode 2 and the grid electrode 3 are metal layers, the metal layers comprise a titanium metal layer, an aluminum metal layer, a nickel metal layer and a gold metal layer which are sequentially arranged from bottom to top, the thickness of the titanium metal layer is 10 nm, the thickness of the aluminum metal layer is 60 nm, the thickness of the nickel metal layer is 65 nm, and the thickness of the gold metal layer is 80 nm.
The insulating layer 5 is a silicon dioxide layer with a thickness of 10 nm.
The device also comprises a foil 4 connected with the grid electrode, wherein the foil 4 is used for leading out the grid electrode 3 to the outside of the device so as to facilitate the test of a probe station; the foil 4 is positioned on the upper surface of the insulating layer 5, and is in the shape of a cuboid, the height of the cuboid is the same as that of the grid, the length of the cuboid is 5 microns, and the width of the cuboid is 5 microns.
The substrate 9 is silicon, and the thickness of the substrate 9 is 700 μm; the buffer layer 8 is an AlN/GaN superlattice layer, and the thickness of the buffer layer 8 is 1.8 mu m;
the thickness of the GaN channel layer 7 is 2.2 μm;
the AlGaN barrier layer 6 has a thickness of 20 nm.
The embodiment also provides a method for synchronously preparing the source electrode 1, the drain electrode 2 and the grid electrode 3 of the GaN HEMT device, which comprises the following steps:
(1) taking a 4-inch wafer, wherein the wafer comprises a substrate 9, a buffer layer 8, a GaN channel layer 7 and an AlGaN barrier layer 6 which are sequentially arranged from bottom to top, and depositing an insulating layer 5 on the AlGaN barrier layer 6 by utilizing an atomic layer deposition technology;
(2) coating a layer of negative photoresist with the thickness of 800nm on the insulating layer 5;
(3) imprinting patterns of a source electrode, a drain electrode, a grid electrode and a foil piece on the upper surface of the negative photoresist by using a nano imprinting mould shown in (a) and (b) of figure 1 through a nano imprinting technology, and curing the negative photoresist by irradiating 365 nm ultraviolet light for 33 seconds so as to shape the patterns;
(4) by passingICP etching process with O2the/Ar is etching gas, the negative photoresist under the bottom of the source electrode pattern and the drain electrode pattern is removed, the negative photoresist with the thickness of about 400 nm still remains due to the shallow depth of the grid electrode pattern, and CF is used for the negative photoresist4/CHF3the/Ar is etching gas to remove the silicon dioxide insulating layer under the bottom of the source electrode pattern and the drain electrode pattern, the AlGaN barrier layer 6 is exposed, the transfer of the source electrode pattern and the drain electrode pattern from the negative photoresist to the wafer is realized, and the insulating layer 5 under the bottom of the grid electrode pattern is not influenced due to the protection of the negative photoresist;
(5) by ICP etching process with O2the/Ar is etching gas to remove the negative photoresist below the bottom of the pattern of the grid to expose the insulating layer, so that the grid pattern is transferred from the photoresist to the wafer;
(6) evaporating a metal layer on the negative photoresist, the AlGaN barrier layer 6 exposed in the step (4) and the upper surface of the insulating layer 5 exposed in the step (5) by using an electron beam evaporator, removing the negative photoresist and the metal layer on the upper surface of the negative photoresist in a photoresist removing solution after evaporation, and forming a source electrode 1 and a drain electrode 2 by using the metal layer on the upper surface of the AlGaN barrier layer 6 exposed in the step (4); forming a grid electrode 3 on the metal layer exposed out of the step (5) on the upper surface of the insulating layer 5;
(7) and annealing at 750 ℃ for 35 seconds to enable the source electrode 1 and the drain electrode 2 to form ohmic contact with the GaN channel layer 7, so that the source electrode 1, the drain electrode 2 and the grid electrode 3 are synchronously prepared.
Example 2
The embodiment provides a GaN HEMT device with a source electrode, a drain electrode and a grid electrode synchronously prepared, as shown in fig. 2, the device comprises a substrate 9, a buffer layer 8, a GaN channel layer 7 and an AlGaN barrier layer 6 which are sequentially distributed from bottom to top, wherein two ends of the upper surface of the AlGaN barrier layer 6 are connected with the source electrode 1 and the drain electrode 2, an insulating layer 5 is distributed on the upper surface of the AlGaN barrier layer 6 between the source electrode 1 and the drain electrode 2, the upper surface of the insulating layer 5 is connected with the grid electrode 3, the source electrode 1 and the drain electrode 2 are in ohmic contact with the GaN channel layer 7 respectively, and the height of the source electrode 1 is equal to that of the drain electrode.
The source electrode 1, the drain electrode 2 and the grid electrode 3 are all cuboids; the size of the source electrode 1 is the same as that of the drain electrode 2, the height is 1200nm, the length is 8 mu m, and the width is 8 mu m; the height of the grid 3 is 600nm, the width is the same as the source electrode, and the length is 200 nm.
The distance between the grid 3 and the source 1 is 200 nm; the distance between the gate 3 and the drain 2 is 400 nm.
The source electrode 1, the drain electrode 2 and the grid electrode 3 are metal layers, the metal layers comprise a titanium metal layer, an aluminum metal layer, a nickel metal layer and a gold metal layer which are sequentially arranged from bottom to top, the thickness of the titanium metal layer is 20 nm, the thickness of the aluminum metal layer is 100nm, the thickness of the nickel metal layer is 75 nm, and the thickness of the gold metal layer is 90 nm.
The insulating layer 5 is an alumina layer with a thickness of 15 nm.
The device also comprises a foil 4 connected with the grid 3, wherein the foil 4 is used for leading the grid 1 out of the device so as to facilitate the test of a probe station; the foil 4 is positioned on the upper surface of the insulating layer 5, and the foil 4 is in the shape of a rectangular parallelepiped with a height equal to that of the gate 3, a length of 8 μm, and a width of 8 μm.
The substrate 9 is sapphire, and the thickness of the substrate 9 is 420 μm;
the buffer layer 8 is an AlGaN gradient layer, and the thickness of the buffer layer 8 is 20 micrometers;
the thickness of the GaN channel layer 7 is 1.8 μm;
the AlGaN barrier layer 6 has a thickness of 25 nm.
The embodiment also provides a method for synchronously preparing the source electrode, the drain electrode and the grid electrode of the GaN HEMT device, which comprises the following steps:
(1) taking a 6-inch wafer, wherein the wafer comprises a substrate 9, a buffer layer 8, a GaN channel layer 7 and an AlGaN barrier layer 6 which are sequentially arranged from bottom to top, and depositing an aluminum oxide insulating layer on the AlGaN barrier layer 6 by utilizing an atomic layer deposition technology;
(2) coating a layer of negative photoresist with the thickness of 1200nm on the insulating layer 5;
(3) imprinting patterns of a source electrode, a drain electrode, a grid electrode and a foil piece on the upper surface of the negative photoresist by using a nano imprinting mould shown in (a) and (b) of figure 1 through a nano imprinting technology, and curing the negative photoresist by irradiating the negative photoresist for 45 seconds through 254 nm ultraviolet light so as to shape the patterns;
(4) by ICP etching process with O2the/Ar is etching gas, the negative photoresist under the bottom of the source electrode and the drain electrode is removed, and the negative photoresist with the thickness of about 600nm still remains due to the shallow depth of the grid electrode pattern, and Cl is used for removing the negative photoresist2/BCl3Removing the insulating layer 5 below the bottom of the source electrode pattern and the drain electrode pattern for etching gas, exposing the AlGaN barrier layer, realizing the transfer of the source electrode pattern and the drain electrode pattern from the negative photoresist to the wafer, and not influencing the insulating layer 5 below the bottom of the grid electrode pattern due to the protection of the negative photoresist;
(5) by ICP etching process with O2the/Ar is etching gas to remove the negative photoresist below the bottom of the pattern of the grid to expose the insulating layer 5, so that the grid pattern is transferred from the photoresist to the wafer;
(6) evaporating a metal layer on the negative photoresist, the AlGaN barrier layer 6 exposed in the step (4) and the upper surface of the insulating layer 5 exposed in the step (5) by using a magnetron sputtering film plating machine, removing the negative photoresist and the metal layer on the upper surface of the negative photoresist in a photoresist removing solution after evaporation is finished, and forming a source electrode 1 and a drain electrode 2 on the metal layer on the upper surface of the AlGaN barrier layer 6 exposed in the step (4); forming a grid electrode 3 on the metal layer exposed out of the step (5) on the upper surface of the insulating layer 5;
(7) and annealing at the high temperature of 800 ℃ for 30 seconds to enable the source electrode 1 and the drain electrode 2 to form ohmic contact with the GaN channel layer 7, so that the source electrode, the drain electrode and the grid electrode are synchronously prepared.
Example 3
The embodiment provides a GaN HEMT device with a source electrode, a drain electrode and a grid electrode synchronously prepared, as shown in fig. 2, the device comprises a substrate 9, a buffer layer 8, a GaN channel layer 7 and an AlGaN barrier layer 6 which are sequentially distributed from bottom to top, wherein two ends of the upper surface of the AlGaN barrier layer 6 are connected with the source electrode 1 and the drain electrode 2, an insulating layer 5 is distributed on the upper surface of the AlGaN barrier layer 6 between the source electrode 1 and the drain electrode 2, the upper surface of the insulating layer 5 is connected with the grid electrode 3, the source electrode 1 and the drain electrode 2 are in ohmic contact with the GaN channel layer 7 respectively, and the height of the source electrode 1 is equal to that of the drain electrode.
The source electrode 1, the drain electrode 2 and the grid electrode 3 are all cuboids; the size of the source electrode 1 is the same as that of the drain electrode 2, the height is 1500 nm, the length is 10 mu m, and the width is 10 mu m; the gate 3 has a height of 1000 nm, a width equal to that of the source 1, and a length of 800 nm.
The distance between the grid 3 and the source 1 is 1 μm; the distance between the gate 3 and the drain 2 is 1.8 μm.
The source electrode 1, the drain electrode 2 and the grid electrode 3 are metal layers, the metal layers comprise a titanium metal layer, an aluminum metal layer, a nickel metal layer and a gold metal layer which are sequentially arranged from bottom to top, the thickness of the titanium metal layer is 25 nm, the thickness of the aluminum metal layer is 150nm, the thickness of the nickel metal layer is 80 nm, and the thickness of the gold metal layer is 100 nm.
The insulating layer is a silicon nitride layer with a thickness of 20 nm.
The device also comprises a foil 4 connected with the grid 3, wherein the foil 4 is used for leading the grid 3 out of the device so as to facilitate the test of a probe station; the foil 4 is positioned on the upper surface of the insulating layer 5, the shape of the foil 4 is a cuboid, the height of the foil is the same as that of the grid 3, the length of the foil is 10 micrometers, and the width of the foil is 10 micrometers;
the substrate 9 is silicon carbide, and the thickness of the substrate 9 is 500 micrometers;
the buffer layer 8 is an AlN/GaN superlattice layer, and the thickness of the buffer layer 8 is 3 micrometers;
the thickness of the GaN channel layer 7 is 2.8 μm;
the AlGaN barrier layer 6 has a thickness of 25 nm.
The embodiment also provides a method for synchronously preparing the source electrode, the drain electrode and the grid electrode of the GaN HEMT device, which comprises the following steps:
(1) taking a 6-inch wafer, wherein the wafer comprises a substrate 9, a buffer layer 8, a GaN channel layer 7 and an AlGaN barrier layer 6 which are sequentially arranged from bottom to top, and depositing an insulating layer 5 on the AlGaN barrier layer 6 by utilizing an atomic layer deposition technology;
(2) coating a layer of negative photoresist with the thickness of 1600nm on the insulating layer 5;
(3) imprinting patterns of a source electrode, a drain electrode, a grid electrode and a foil piece on the upper surface of the negative photoresist by using a nano imprinting mould shown in (a) and (b) of figure 1 through a nano imprinting technology, and curing the negative photoresist by irradiating 365 nm ultraviolet light for 50 seconds so as to shape the patterns;
(4) by ICP etching process with O2the/Ar is etching gas, the negative photoresist under the bottom of the source electrode and the drain electrode pattern is removed, the negative photoresist with the thickness of about 700 nm still remains due to the shallow depth of the grid electrode pattern, and CF is used for removing the negative photoresist4/CHF3the/Ar is etching gas to remove the insulating layer 5 below the bottom of the source electrode pattern and the drain electrode pattern, the AlGaN barrier layer 6 is exposed, the transfer of the source electrode pattern and the drain electrode pattern from the negative photoresist to the wafer is realized, and the insulating layer 5 below the bottom of the grid electrode pattern is not influenced due to the protection of the negative photoresist;
(5) by ICP etching process with O2the/Ar is etching gas to remove the negative photoresist below the bottom of the pattern of the grid to expose the insulating layer 5, so that the grid pattern is transferred from the photoresist to the wafer;
(6) evaporating a metal layer on the negative photoresist, the AlGaN barrier layer 6 exposed in the step (4) and the upper surface of the insulating layer 5 exposed in the step (5) by using a magnetron sputtering film plating machine, removing the negative photoresist and the metal layer on the upper surface of the negative photoresist in a photoresist removing solution after evaporation is finished, and forming a source electrode 1 and a drain electrode 2 on the metal layer on the upper surface of the AlGaN barrier layer 6 exposed in the step (4); forming a grid electrode 3 on the metal layer exposed out of the step (5) on the upper surface of the insulating layer 5;
(7) and (3) annealing at the high temperature of 700 ℃ for 60 seconds to enable the source electrode 3 and the drain electrode 2 to form ohmic contact with the GaN channel layer 7, so that the synchronous preparation of the source electrode, the drain electrode and the grid electrode is completed.
The above embodiment is the preferred embodiment of the present invention. However, the embodiments of the present invention are not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be regarded as equivalent replacement modes and all are included in the scope of the present invention.
Claims (10)
1. The GaN HEMT device with the source electrode, the drain electrode and the grid electrode synchronously prepared is characterized by comprising a substrate, a buffer layer, a channel layer and a barrier layer which are sequentially distributed from bottom to top, wherein two ends of the upper surface of the barrier layer are connected with the source electrode and the drain electrode, an insulating layer is distributed on the upper surface of the barrier layer between the source electrode and the drain electrode, the upper surface of the insulating layer is connected with the grid electrode, the source electrode and the drain electrode are respectively in ohmic contact with the channel layer, and the height of the source electrode and the height of the drain electrode are equal and.
2. The GaN HEMT device with the source electrode, the drain electrode and the grid electrode synchronously prepared according to the claim 1, wherein the source electrode, the drain electrode and the grid electrode are all cuboids; the size of the source electrode is the same as that of the drain electrode, the height is 400-1600 nm, the length is 1-10 mu m, and the width is 1-10 mu m; the height of the grid electrode is 200-1400 nm, the width is the same as that of the source electrode, and the length is 50-2000 nm.
3. The source electrode, the drain electrode and the grid electrode of the GaN HEMT device prepared synchronously according to the claim 1, wherein the height of the source electrode is 150-300 nm higher than that of the grid electrode.
4. The GaN HEMT device synchronously manufactured by the source electrode, the drain electrode and the grid electrode according to claim 1, wherein the distance between the grid electrode and the source electrode is 100-4000 nm.
5. The source, drain and gate synchronously fabricated GaN HEMT device of claim 1, wherein the distance between the gate and the drain is 1-4 times the distance between the gate and the source.
6. The GaN HEMT device with the source electrode, the drain electrode and the grid electrode synchronously prepared according to claim 1, wherein the source electrode, the drain electrode and the grid electrode are metal layers, the metal layers comprise a titanium metal layer, an aluminum metal layer, a nickel metal layer and a gold metal layer which are sequentially arranged from bottom to top, the thickness of the titanium metal layer is 10-30 nm, the thickness of the aluminum metal layer is 50-200 nm, the thickness of the nickel metal layer is 50-100 nm, and the thickness of the gold metal layer is 50-100 nm.
7. The source, drain and gate synchronously-fabricated GaN HEMT device of claim 1, wherein the insulating layer is made of one of silicon dioxide, silicon nitride and aluminum oxide; the thickness of the insulating layer is 5-60 nm.
8. The GaN HEMT device with the source electrode, the drain electrode and the gate electrode synchronously prepared according to claim 1, wherein the substrate is one of silicon, silicon carbide and sapphire, and the thickness of the substrate is 0.3-1 mm.
9. The GaN HEMT device synchronously manufactured by the source electrode, the drain electrode and the grid electrode according to claim 1, wherein the buffer layer is an AlGaN graded layer or an AlN/GaN superlattice layer, and the thickness of the buffer layer is 1.5-3 μm;
the channel layer is a GaN channel layer, and the thickness of the channel layer is 1-3 mu m; the barrier layer is an AlGaN barrier layer, and the thickness of the barrier layer is 20-25 nm.
10. The source, drain and gate synchronously fabricated GaN HEMT device of claim 1, further comprising a foil attached to the gate, the foil acting to draw the gate out of the device for probe station testing; the foil is located on the upper surface of the insulating layer, the shape of the foil is cuboid, the height of the foil is the same as that of the grid, the length of the foil is 1-10 micrometers, and the width of the foil is 1-10 micrometers.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110571273A (en) * | 2019-07-19 | 2019-12-13 | 华南理工大学 | GaN HEMT device and method for synchronously preparing source, drain and grid |
| CN110571273B (en) * | 2019-07-19 | 2024-05-17 | 华南理工大学 | GaN HEMT device and method for synchronously preparing source, drain and grid |
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