CN210578293U - Synchronous rectification drive circuit - Google Patents
Synchronous rectification drive circuit Download PDFInfo
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- CN210578293U CN210578293U CN201921643083.0U CN201921643083U CN210578293U CN 210578293 U CN210578293 U CN 210578293U CN 201921643083 U CN201921643083 U CN 201921643083U CN 210578293 U CN210578293 U CN 210578293U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model discloses a synchronous rectification drive circuit, its characterized in that: the circuit comprises a resistor R1, a capacitor C1, a triode Q1, a signal input port Vg, a signal output port Vgs and a ground terminal GND; the signal input port Vg is connected with one end of a capacitor C1 and the collector of the triode Q1, and the other end of the capacitor C1 and the emitter of the triode Q1 are connected with the signal output port Vgs; the base of the transistor Q1 and one end of the resistor R1 are connected to the ground port GND, and the other end of the resistor R1 is connected to the signal output port Vgs. The resistor R1 is used for discharging the charge of the gate source end of the synchronous rectification MOS tube TR2, the triode Q1 enables the Vgs voltage of the output signal port to be initialized every period, the risk that the primary side switch tube and the secondary side switch tube of the flyback product are shared is greatly reduced, and meanwhile, the stable work of the driving circuit is guaranteed when the duty ratio of the primary side MOS tube TR1 changes suddenly, so that the product has higher reliability.
Description
Technical Field
The utility model relates to the field of electronic technology, especially, relate to a synchronous rectification drive circuit.
Background
In the flyback product, when the output current is relatively large, the rectifier tube on the secondary side of the transformer can be rectified by using the MOS tube TR2, so that the conduction loss of the rectifier tube on the secondary side is reduced, and the conversion efficiency of the product is improved. When the MOS tube TR2 is used for rectification, a driving signal needs to be provided for the gate of the TR2, so that the TR2 is in a low-impedance state when output current flows. Usually, this driving signal and the secondary winding of the transformer present a synchronous on-off state, so we commonly refer to this rectification method as synchronous rectification.
The working mode of the synchronous rectification type flyback product is divided into two stages: in the first stage, when the primary side switching tube TR1 is turned on, the input terminal Vin excites the transformer T1. At the moment, the secondary side rectifying MOS tube TR2 has no driving signal, and energy is stored in the transformer T1; in the second stage, the primary side switching tube TR1 is turned off, the drive control IC gives a drive signal to the secondary side rectifying MOS tube TR2 to enable the secondary side rectifying MOS tube TR2 to be turned on, and the energy stored in the transformer T1 is transmitted to the output end Vo through the rectifying MOS tube TR 2. And after the second stage is finished, returning to the first stage again to form a period.
During the second phase is switched back to the first phase, if the secondary side synchronous rectification MOS transistor TR2 is not turned off soon, the primary side switching transistor TR1 is already turned on, and the primary side switching transistor TR1 and the secondary side synchronous rectification MOS transistor TR2 are turned on together. When the primary side switching tube TR1 and the secondary side synchronous rectification MOS tube TR2 are in common, the primary side switching tube TR1 and the secondary side synchronous rectification MOS tube TR2 bear huge current and voltage stress. When the common phenomenon is further increased, the primary side switching tube TR1 and the secondary side synchronous rectification MOS tube TR2 are directly damaged.
SUMMERY OF THE UTILITY MODEL
In view of this, the utility model provides a synchronous rectification drive circuit effectively solves the problem of above-mentioned former limit switch tube TR1 and vice synchronous rectification MOS pipe TR2 commonness, reduces former limit switch tube TR1 and vice synchronous rectification pipe TR 2's electric current, voltage stress, improves the reliability that synchronous rectification formula turned over the product to the contrary.
The utility model provides a technical scheme does:
a synchronous rectification drive circuit comprises a resistor R1, a capacitor C1, a triode Q1, a signal input port Vg, a signal output port Vgs and a ground terminal GND; the signal input port Vg is connected with one end of a capacitor C1 and the collector of the triode Q1, and the other end of the capacitor C1 and the emitter of the triode Q1 are connected with the signal output port Vgs; the base of the transistor Q1 and one end of the resistor R1 are connected to the ground port, and the other end of the resistor R1 is connected to the signal output port Vgs.
As an improved technical scheme of the utility model, a synchronous rectification drive circuit still includes resistance R2, and signal input port Vg is connected to resistance R2 one end, and the resistance R2 other end is connected to triode Q1's collecting electrode with electric capacity C1's one end.
As another improvement technical scheme of the utility model, a synchronous rectification drive circuit still includes resistance R3, resistance R3's one end signal input port Vg to triode Q1's collecting electrode, and electric capacity C1's one end is connected to resistance R3's the other end.
Electrically coupling: the meaning includes direct or indirect connection, and also includes connection modes such as inductive coupling, for example, the utility model discloses a "signal input port Vg is electrically coupled to one end of electric capacity C1 and the collecting electrode of triode Q1", is direct connection, when a resistance R2 or R3 is connected again between one end of signal input port Vg and electric capacity C1 and the collecting electrode of triode Q1, belongs to indirect connection.
The utility model discloses a concrete theory of operation will carry out the analysis explanation at specific embodiment, and it is not repeated here. Compared with the prior art, the beneficial effects of the utility model are that:
1. due to the addition of the capacitor C1, a voltage division effect exists between the capacitor C1 and the gate-source capacitance of the synchronous rectification MOS tube TR2, and the voltage drop on the synchronous rectification MOS tube TR2 can be adjusted by adjusting the capacitance value of the capacitor C1, so that the amplitude of a driving signal of the synchronous rectification MOS tube TR2 can be adjusted;
2. due to the addition of the resistor R1, a path for discharging charges of a gate-source capacitance of the synchronous rectification MOS tube TR2 is provided, the amplitude of a Vgs of a signal output port is reduced at a certain slope, the risk of common conduction of the primary side switching tube TR1 and the synchronous rectification MOS tube TR2 can be reduced by adjusting the slope of the Vgs of the signal output port, and the product has higher reliability;
3. due to the addition of the triode Q1, the charge on the capacitor C1 is initialized every cycle, that is, the driving signal of the signal output port Vgs is initialized every cycle, so that the signal output port Vgs of the synchronous rectification driving circuit can still stably and effectively provide the driving signal for the synchronous rectification MOS transistor TR2 under transient conditions such as sudden duty cycle change of the primary switching transistor TR 1.
Drawings
Fig. 1 is a schematic circuit diagram of a first embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a flyback converter according to a first embodiment of the present invention;
fig. 3 is a waveform diagram of a signal input port Vg and a signal output port Vgs according to a first embodiment of the present invention;
fig. 4 is a schematic circuit diagram of a second embodiment of the present invention;
fig. 5 is a schematic circuit diagram of a third embodiment of the present invention.
Detailed Description
First embodiment
As shown in fig. 1, the synchronous rectification drive circuit includes: the circuit comprises a resistor R1, a capacitor C1, a triode Q1, a signal input port Vg, a signal output port Vgs and a ground terminal GND; the signal input port Vg is connected to one end of a capacitor C1 and the collector of the transistor Q1, and the other end of the capacitor C1 and the emitter of the transistor Q1 are connected to the signal output port Vgs; the base of the transistor Q1 and one end of the resistor R1 are connected to the ground port GND, and the other end of the resistor R1 is connected to the signal output port Vgs.
The working principle of the embodiment is as follows:
fig. 2 shows a schematic diagram of a circuit applied to a flyback converter, in which, when a second stage operating state described in the background art starts, a driving control IC detects that a primary side switching tube TR1 has been turned off, and outputs a square wave signal VG with an amplitude of V1 from a VG pin; the signal is divided by a capacitor C1 and a gate-source capacitance Cgs of a synchronous rectification MOS tube TR2, and then an amplitude maximum value is output from a signal output portDriving signal Vgs ofTo drive the synchronous rectification MOS tube TR2 to be conducted;
during the on period of the synchronous rectification MOS transistor TR2, since the resistor R1 is connected in parallel with the gate-source capacitance Cgs of the synchronous rectification MOS transistor TR2, a discharge path is provided for the gate-source capacitance Cgs of the rectification MOS transistor TR2, and the driving signal Vgs is discharged through the discharge path, so as to obtain a corresponding relation between the driving signal Vgs and the on time t of the synchronous rectification MOS transistor:where t is the Vgs drive time; it can be seen that the amplitude of the driving signal Vgs of the synchronous rectification MOS transistor TR2 at the previous moment when it is turned off decreases with the decrease of the resistor R1; therefore, the risk of the common connection between the primary side switching tube TR1 and the secondary side synchronous rectification MOS tube TR2 can be greatly reduced by only making the driving signal Vgs approach or be lower than the threshold voltage of the synchronous rectification MOS tube TR2 at the time before the synchronous rectification MOS tube TR2 is turned off, that is, at the time before the primary side switching tube TR1 is turned on.
After the driving signal Vgs is turned off, namely, the collector voltage of the transistor Q1 is approximately equal to 0V, since the charge stored in the capacitor C1 during the driving of the driving signal Vgs does not suddenly change, and one end of the capacitor C1 is connected to the collector of the transistor Q1, the driving signal Vgs has a tendency of being pulled down to a negative voltage, and the magnitude of the negative voltage trend is the magnitudeWhere t is the Vgs drive time; at this time, for the transistor Q1, its base is grounded and is 0V, its emitter is connected with the signal output port, and the emitter voltage of the transistor Q1 tends toAn emitting electrode of the triode Q1 is positively biased and starts to be conducted, charges stored in the capacitor C1 during the driving period of the driving signal Vgs are quickly discharged through the triode Q1, the voltage reset of the driving signal Vgs is realized, it is ensured that after each period is completed, the voltage of the driving signal Vgs is zero, the next period does not continue to the last state of the previous period, and the waveform diagrams of the input port Vg and the signal output port Vgs are shown in fig. 3.
The above-mentioned process is favorable to eliminating the flyback product because of output load dynamic change, or other factors lead to the duty cycle sudden change, the disorderly problem of drive signal output that brings for the sudden change of primary side switching tube TR1 duty cycle no matter how, this embodiment drive circuit all can guarantee that every cycle provides drive signal from 0V, guarantee that primary side switching tube TR1 opens the previous moment promptly, drive signal Vgs is close to or is less than synchronous rectification MOS pipe TR 2's threshold voltage, primary side switching tube TR1 and vice limit synchronous rectification MOS pipe TR2 can not share.
Second embodiment
As shown in fig. 4, the present embodiment is different from the first embodiment in that: a resistor R2 is added between the signal input port Vg and the capacitor C1, one end of the resistor R2 is connected with the signal input port Vg, and the other end of the resistor R2 and one end of the capacitor C1 are connected to the collector of the triode Q1.
The working principle of this embodiment is similar to that of the first embodiment, except that: a resistor R2 is added between a signal input port Vg and a capacitor C1, so that a low-pass RC filter is formed by the resistor R2 and the capacitor C1, when a high-frequency voltage spike enters a driving circuit from the signal input port Vg, the low-pass RC filter plays a role in restraining the high-frequency voltage spike, and the gate-source stress of a synchronous rectification MOS tube TR2 is reduced.
Compared with the first embodiment, this embodiment functionally functions to suppress high-frequency voltage spikes at the signal input port Vg.
Third embodiment
As shown in fig. 5, the present embodiment is different from the first embodiment in that: a third resistor R3 is added between the collector of the transistor Q1 and the capacitor C1, a signal input port Vg at one end of the resistor R3 is connected to the collector of the transistor Q1, and the other end of the resistor R3 is connected to one end of the capacitor C1.
The working principle of this embodiment is similar to that of the second embodiment, except that: a resistor R3 is added between the collector of the transistor Q1 and the capacitor C1. The low-pass RC filter formed by the resistor R3 and the capacitor C1 is connected with the collector and the emitter of the triode. The RC low-pass filter plays a role in absorbing high-frequency voltage spikes. Meanwhile, the transistor Q1 synchronously initiates the high frequency voltage spike suppressed by the resistor R3 when the driving signal is initiated every cycle.
Compared with the second embodiment, this embodiment functionally adds the function of initializing high frequency voltage spikes.
The above description of the embodiments is only for the purpose of helping understanding the present invention, and is not intended to limit the present invention, and any modifications, equivalent replacements, improvements, etc. made by those skilled in the art without departing from the principles of the present invention should be included in the protection scope of the present invention.
Claims (3)
1. A synchronous rectification drive circuit is characterized in that: the circuit comprises a resistor R1, a capacitor C1, a triode Q1, a signal input port Vg, a signal output port Vgs and a ground terminal GND; the signal input port Vg is electrically coupled to one end of a capacitor C1 and the collector of the transistor Q1, and the other end of the capacitor C1 and the emitter of the transistor Q1 are connected to the signal output port Vgs; the base of the transistor Q1 and one end of the resistor R1 are connected to the ground port GND, and the other end of the resistor R1 is connected to the signal output port Vgs.
2. A synchronous rectification drive circuit as claimed in claim 1, wherein: the resistor R2 is further included, one end of the resistor R2 is connected with the signal input port Vg, and the other end of the resistor R2 and one end of the capacitor C1 are connected to the collector of the triode Q1.
3. A synchronous rectification drive circuit as claimed in claim 1, wherein: the resistor R3 is further included, one end of the resistor R3 is connected with the signal input port Vg to the collector of the triode Q1, and the other end of the resistor R3 is connected with one end of the capacitor C1.
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CN201921643083.0U CN210578293U (en) | 2019-09-29 | 2019-09-29 | Synchronous rectification drive circuit |
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CN201921643083.0U CN210578293U (en) | 2019-09-29 | 2019-09-29 | Synchronous rectification drive circuit |
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