CN210573655U - Time-delay power-off protection circuit - Google Patents
Time-delay power-off protection circuit Download PDFInfo
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- CN210573655U CN210573655U CN201921787101.2U CN201921787101U CN210573655U CN 210573655 U CN210573655 U CN 210573655U CN 201921787101 U CN201921787101 U CN 201921787101U CN 210573655 U CN210573655 U CN 210573655U
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Abstract
The utility model discloses a time-delay power-off protection circuit, which comprises a power supply unit, a power supply detection unit, a comparison control unit and a time-delay power-off unit; the first output end of the power supply unit is connected with the input end of the power supply detection unit, and the second output end of the power supply unit is connected with the first input end of the delayed power-off module; the first output end of the power supply detection unit supplies power to the file system, and the second output end of the power supply detection unit is connected with the input end of the comparison control unit; the output end of the comparison control unit is connected with the second input end of the time-delay power-off unit; and the output end of the delayed power-off unit supplies power to the file system. The utility model discloses an after the system outage, utilize time delay outage circuit, time delay disconnection system power supply before the system power supply disconnection, accomplishes the system file and preserves, has protected the integrality and the security of system file.
Description
Technical Field
The utility model relates to a system power supply field, concretely relates to time delay power-off protection circuit.
Background
With the increasing complexity and diversity of control systems, if a system file is being read and written when the system is powered off, file data abnormality may be caused, which is represented as file system damage, and partition table damage may also occur seriously, and a system downtime and partial file damage may occur when the system is powered on next time, so that the Linux system cannot be started normally.
In most of the existing occasions, the system does not design an emergency protection circuit aiming at the power failure condition, so that the system file and parameters are easily damaged, and the integrity and the safety of the file system are influenced.
Disclosure of Invention
In order to solve the technical problem, the utility model provides a time delay power-off protection circuit can accomplish the system file before the system power supply disconnection and preserve, has protected the integrality and the security of system file.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
a time-delay power-off protection circuit comprises a power supply unit, a power supply detection unit, a comparison control unit and a time-delay power-off unit;
the first output end of the power supply unit is connected with the input end of the power supply detection unit, and the second output end of the power supply unit is connected with the first input end of the delayed power-off module;
the first output end of the power supply detection unit supplies power to the file system, and the second output end of the power supply detection unit is connected with the input end of the comparison control unit;
the output end of the comparison control unit is connected with the second input end of the time-delay power-off unit;
and the output end of the delayed power-off unit supplies power to the file system.
Furthermore, the power supply unit comprises a power supply signal VCC _ IN, a first path of the power supply signal VCC _ IN is connected IN parallel with one end of the capacitor C2 and the anode of the electrolytic capacitor C3, and the other end of the capacitor C2 and the cathode of the electrolytic capacitor C3 are grounded; a second path of the power supply signal VCC _ IN is used as a first output end of the power supply unit; and the third path of the power supply signal VCC _ IN is used as the second output end of the power supply unit.
Furthermore, the input end of the power supply detection unit is connected with one end of a switch S1, one path of the other end of the switch S1 is connected with one end of a resistor R1, the other path of the other end of the switch S1 is connected with the anode of a diode D1, and the cathode of the diode D1 is used as the first output end of the power supply detection unit; the other end of the resistor R1 is grounded through a resistor R2, and the other end is used as a second output end of the power supply detection unit.
Further, the comparison control unit comprises a comparator, the input end of the comparison control unit is connected with an INA + pin of the comparator, and the INA-pin of the comparator is connected with a signal VDD5 through a resistor R10; one path of a VCC pin of the comparator is connected with a signal VDD5, and the other path of the VCC pin of the comparator is grounded through a capacitor C4; the GND pin of the comparator is grounded; and the pin of the comparator OUTPUTA is used as the output end of the comparison control unit.
Furthermore, one path of the second input end of the time-delay power-off unit is connected with the signal VDD5 through a resistor R3, the other path of the second input end of the time-delay power-off unit is connected with the base electrode of a triode Q1 through a resistor R4, the emitter electrode of the triode Q1 is connected with the signal VDD5, one path of the collector electrode of the triode Q1 is grounded through a resistor R6 and a resistor R7 which are connected in parallel, the other path of the collector electrode of the diode D4 is connected with the positive electrode of a diode D4, one path of the negative electrode of the diode D4 is grounded through a resistor R5 and a capacitor C1 which are connected in parallel, the other path of the negative electrode of the diode D2 is connected with the base electrode of the triode Q2, the emitter electrode of the triode Q2 is connected with the signal VDD5, one path of the collector electrode of the triode Q2 is grounded through a resistor R8, the other path of.
Further, the comparator model is LM 393.
Further, the file system is a Linux file system.
The utility model has the advantages that:
the utility model provides a time delay outage protection circuit has realized when the system outage back, utilizes the time delay outage circuit, and time delay disconnection system power supply before the system power supply disconnection, accomplishes the system file and preserves, preserves the safe file system of uninstalling after accomplishing, makes the system safe start when the start next time, has solved the system outage and has leaded to the system to shut down and partial file system to damage, has protected the integrality and the security of system's file, provides the stability of system greatly.
Drawings
Fig. 1 is a schematic diagram of the structure of the delay power-off protection circuit of the present invention;
fig. 2 is a circuit connection diagram of an embodiment of the present invention.
Detailed Description
In order to clearly illustrate the technical features of the present invention, the present invention is explained in detail by the following embodiments in combination with the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. In order to simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted so as to not unnecessarily limit the invention.
As shown in fig. 1, the utility model provides a delay power-off protection circuit, which comprises a power supply unit, a power supply detection unit, a comparison control unit and a delay power-off unit;
the first output end of the power supply unit is connected with the input end of the power supply detection unit, and the second output end of the power supply unit is connected with the first input end of the delayed power-off module;
the first output end of the power supply detection unit supplies power to the file system, and the second output end of the power supply detection unit is connected with the input end of the comparison control unit;
the output end of the comparison control unit is connected with the second input end of the time-delay power-off unit;
and the output end of the delayed power-off unit supplies power to the file system.
The file system power supply device comprises a power supply unit, a comparison control unit, a delay control unit, a power supply detection unit, a power supply switch, a delay power-off circuit, a power supply detection unit and a file system unloading unit, wherein the power supply unit supplies energy to the file system, the power supply detection unit detects the on and off states of the power supply switch, the comparison control unit judges whether power is supplied or not, and sends a control signal to the delay control unit.
Fig. 2 provides a schematic circuit diagram of an embodiment of the present invention. As shown IN fig. 2, the power supply unit includes a power supply signal VCC _ IN, a first path of the power supply signal VCC _ IN is connected IN parallel to one end of the capacitor C2 and the anode of the electrolytic capacitor C3, and the other end of the capacitor C2 and the cathode of the electrolytic capacitor C3 are grounded; the second path of the power supply signal VCC _ IN is used as the first output end of the power supply unit and is connected with the input end of the power supply detection unit; and the third path of the power supply signal VCC _ IN is used as the second output end of the power supply unit and is connected with the first input end of the time-delay power-off module.
The input end of the power supply detection unit is connected with one end of a switch S1, one path of the other end of the switch S1 is connected with one end of a resistor R1, the other path of the other end of the switch S1 is connected with the anode of a diode D1, and the cathode of the diode D1 serves as the first output end of the power supply detection unit and outputs a power supply signal VCC to the file system; one path of the other end of the resistor R1 is grounded through a resistor R2, and the other path of the resistor R1 is used as a second output end of the power supply detection unit and is connected with the input end of the comparison control unit.
The comparison control unit comprises a comparator, the input end of the comparison control unit is connected with an INA + pin of the comparator, and the INA-pin of the comparator is connected with a signal VDD5 through a resistor R10; one path of a VCC pin of the comparator is connected with a signal VDD5, and the other path of the VCC pin of the comparator is grounded through a capacitor C4; the GND pin of the comparator is grounded; and the comparator OUTPUTA pin is used as the output end of the comparison control unit and is connected with the second input end of the time-delay power-off unit. The comparator model is preferably LM 393.
One path of a second input end of the time-delay power-off unit is connected with a signal VDD5 through a resistor R3, the other path of the second input end of the time-delay power-off unit is connected with a base electrode of a triode Q1 through a resistor R4, an emitting electrode of the triode Q1 is connected with a signal VDD5, one path of a collector electrode of the triode Q1 is grounded through a resistor R6 and a resistor R7 which are connected in parallel, the other path of the collector electrode of the diode D4 is connected with a positive electrode of a diode D4, one path of a negative electrode of the diode D4 is grounded through a resistor R5 and a capacitor C1 which are connected in parallel, the other path of the collector electrode of the triode Q2 is connected with a signal VDD5, one path of the collector electrode of the triode Q2 is grounded through a resistor R8, the other path of the collector electrode of the PMOS tube Q3 is connected with a source electrode of the PMOS tube Q3 serving as a.
The file system includes, but is not limited to, the Linux file system.
When the switch S1 is closed, VCC _ IN of the power supply unit is conducted to the file system through the diode D1, the power is converted to VCC, and the voltage of VCC is divided by the resistors R1 and R2. The comparison control unit detects that INA + voltage is larger than INA-voltage at the moment through the comparator LM393, the OUTPUTA outputs high level, a time-delay power-off module triode Q1 is IN saturated conduction, the voltage VDD5 enables a capacitor C1 to be IN a charging state through a switch diode D4, the triode Q2 is IN saturated conduction, a PMOS tube Q3 is IN conduction, and therefore the input voltage VCC _ IN is led into a file system to obtain VCC power supply, and the file system is IN a power supply state.
When the switch S1 is switched off, the INA + voltage of the comparator LM393 is smaller than the INA-voltage, the OUTPUTA outputs low level, the triode Q1 is in a cut-off state, at the moment, the capacitor C1 discharges through the resistor R5, the conduction of the triode Q2 is continuously ensured, the conduction of the PMOS tube Q3 is ensured, and the discharge time is determined through configuring the capacitor C1 and the resistor R5 with proper parameters, so that the discharge time can ensure that the system normally finishes file protection and shutdown operation. After the discharge time of the capacitor C1 is over, the triode Q2 is cut off, the PMOS tube Q3 is cut off, and VCC _ IN no longer supplies power to the file system, so that the delayed power failure is realized.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, the scope of the present invention is not limited thereto. Various modifications and alterations will occur to those skilled in the art based on the foregoing description. And are neither required nor exhaustive of all embodiments. On the basis of the technical scheme of the utility model, various modifications or deformations that technical personnel in the field need not pay out creative work and can make still are within the protection scope of the utility model.
Claims (7)
1. A time-delay power-off protection circuit is characterized by comprising a power supply unit, a power supply detection unit, a comparison control unit and a time-delay power-off unit;
the first output end of the power supply unit is connected with the input end of the power supply detection unit, and the second output end of the power supply unit is connected with the first input end of the delayed power-off module;
the first output end of the power supply detection unit supplies power to the file system, and the second output end of the power supply detection unit is connected with the input end of the comparison control unit;
the output end of the comparison control unit is connected with the second input end of the time-delay power-off unit;
and the output end of the delayed power-off unit supplies power to the file system.
2. The circuit of claim 1, wherein the power supply unit comprises a power supply signal VCC _ IN, a first path of the power supply signal VCC _ IN is connected IN parallel with one end of the capacitor C2 and the anode of the electrolytic capacitor C3, and the other end of the capacitor C2 and the cathode of the electrolytic capacitor C3 are grounded; a second path of the power supply signal VCC _ IN is used as a first output end of the power supply unit; and the third path of the power supply signal VCC _ IN is used as the second output end of the power supply unit.
3. The circuit of claim 1, wherein the input terminal of the power supply detection unit is connected to one terminal of a switch S1, one terminal of a resistor R1 is connected to the other terminal of the switch S1, the other terminal of the switch is connected to the anode of a diode D1, and the cathode of the diode D1 is used as the first output terminal of the power supply detection unit; the other end of the resistor R1 is grounded through a resistor R2, and the other end is used as a second output end of the power supply detection unit.
4. The circuit of claim 1, wherein the comparison control unit comprises a comparator, an input terminal of the comparison control unit is connected to an INA + pin of the comparator, and the INA-pin of the comparator is connected to a signal VDD5 through a resistor R10; one path of a VCC pin of the comparator is connected with a signal VDD5, and the other path of the VCC pin of the comparator is grounded through a capacitor C4; the GND pin of the comparator is grounded; and the pin of the comparator OUTPUTA is used as the output end of the comparison control unit.
5. The circuit of claim 1, wherein one path of the second input terminal of the time-delay power-off unit is connected to a signal VDD5 through a resistor R3, the other path of the second input terminal of the time-delay power-off unit is connected to a base of a transistor Q1 through a resistor R4, an emitter of the transistor Q1 is connected to a signal VDD5, one path of a collector of the transistor Q1 is grounded through a resistor R6 and a resistor R7 which are connected in parallel, the other path of the collector of the diode D4 is connected to an anode of a diode D, one path of a cathode of a diode 4 is grounded through a resistor R5 and a capacitor C1 which are connected in parallel, the other path of the cathode of the diode 4 is connected to a base of a transistor Q2, an emitter of a transistor Q2 is connected to a signal VDD5, one path of a collector of the transistor Q2 is grounded through a resistor R8, the other path is connected to a gate of a PMOS transistor Q3, a source of the PMOS transistor Q.
6. The delayed power-off protection circuit of claim 4, wherein the comparator is LM 393.
7. The circuit according to any of claims 1-6, wherein said file system is a Linux file system.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921787101.2U CN210573655U (en) | 2019-10-23 | 2019-10-23 | Time-delay power-off protection circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921787101.2U CN210573655U (en) | 2019-10-23 | 2019-10-23 | Time-delay power-off protection circuit |
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| CN210573655U true CN210573655U (en) | 2020-05-19 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112213569A (en) * | 2020-09-23 | 2021-01-12 | 国网福建省电力有限公司 | Device and method for guaranteeing data integrity of handheld nuclear phase instrument of transformer substation in delayed power failure mode |
| CN112860044A (en) * | 2021-01-25 | 2021-05-28 | 浙江华创视讯科技有限公司 | Control circuit and control device |
-
2019
- 2019-10-23 CN CN201921787101.2U patent/CN210573655U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112213569A (en) * | 2020-09-23 | 2021-01-12 | 国网福建省电力有限公司 | Device and method for guaranteeing data integrity of handheld nuclear phase instrument of transformer substation in delayed power failure mode |
| CN112213569B (en) * | 2020-09-23 | 2022-11-08 | 国网福建省电力有限公司 | Device and method for guaranteeing data integrity of handheld nuclear phase instrument of transformer substation in delayed power failure mode |
| CN112860044A (en) * | 2021-01-25 | 2021-05-28 | 浙江华创视讯科技有限公司 | Control circuit and control device |
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