CN111736088B

CN111736088B - Power state indicating circuit

Info

Publication number: CN111736088B
Application number: CN202010647300.4A
Authority: CN
Inventors: 吴林
Original assignee: Shenzhen Primestone Network Technology Co ltd
Current assignee: Shenzhen Primestone Network Technology Co ltd
Priority date: 2020-07-07
Filing date: 2020-07-07
Publication date: 2023-04-07
Anticipated expiration: 2040-07-07
Also published as: CN111736088A

Abstract

The invention discloses a power supply state indicating circuit which comprises a power supply module, an input isolation and detection module, an output state detection module, a logic gate module and an output indicating module, wherein the input end of the power supply module is connected with a power supply input, the output end of the power supply module is connected with the output state detection module, the output ends of the output state detection module are connected with the input end of the logic gate module, the input end of the input isolation and detection module is connected with the power supply input, the output end of the input isolation and detection module is connected with the input end of the logic gate module, and the output end of the logic gate module is connected with the output indicating module. When multiple power supplies are output, the state of different power supplies can be quickly indicated according to the requirement. The circuit is a circuit with strong universality.

Description

Power state indicating circuit

Technical Field

The invention relates to the technical field of indicator lamps, in particular to a power supply state indicating circuit.

Background

Power supplies are essential components of electronic devices. In many occasions with high requirements on reliability, the system needs to keep real-time monitoring on the output state of the power supply. The reason for doing so is on the one hand to make things convenient for maintainer to know the system state, and on the other hand can in time produce and report an emergency and ask for help or increased vigilance when the power is unusual and instruct, reduces the system risk of failing. This requires the power supply designer to provide a power supply status indication signal regardless of the power supply's functionality. The most important of which is the output voltage status indication, which is usually implemented by separately leading out a signal line. This signal is distinguished by different level values when the power supply output state is normal and when it is abnormal. Commonly referred to as the "powergood" signal, or "power good" signal, sometimes referred to simply as the PG signal. Hereinafter, the "PG" or "PG signal" is used.

The PG signal is typically coupled to a system controller, which monitors the signal in real time. Assuming that the high level of the PG signal indicates that the power state is normal, when an abnormality occurs, the PG signal becomes low level, and the system can still supply power for a short time due to the existence of the energy storage device of the power supply. During this time, the controller may output the abnormal condition through an alarm function or write it into the flash memory for a maintenance person to view. If this time is too short, the controller may not have enough time to perform the functions described above. Therefore, the key of PG signal design is to realize level jump in time when the power supply is abnormal and send out abnormal indication.

The simplest solution (prior art solution 1) is to generate the PG signal directly from the output power or its divided voltage. The mode has simple design, low cost and wide application. The disadvantage is that the abnormal power failure condition of the power input end can not be sensed in time. Only when the alarm threshold value is reached at the output end, the PG signal level is triggered to overturn.

A more detailed scheme (prior art scheme 2) is to control the isolation device to output the PG signal through the power input signal. The advantage of this solution over the first solution is that the power supply input checks faster than the output. The output end usually has a larger energy storage device, so that the power failure is slow. The disadvantage of this scheme is that if the power supply circuit itself fails, the actual output is abnormal despite the input being normal. The PG signal only reflects the input condition and cannot normally indicate the actual output condition.

In summary, the prior art cannot respond to the power input end abnormality in time (prior art scheme 1) or cannot respond to the problem of the power module itself (prior art scheme 2), and generally speaking, the power input end abnormality cannot respond to the power abnormality quickly and sufficiently, so that the time for the processor to give an alarm action is short, and the method is not suitable for a high-reliability application scenario.

Disclosure of Invention

The present invention is directed to a power status indication circuit to solve the above problems.

In order to achieve the purpose, the invention provides the following technical scheme:

the utility model provides a power state indicating circuit, includes power module, input isolation and detection module, output state detection module, logic gate module and output indication module, power input is connected to power module's input, and output state detection module is connected to power module's output, and the input of logic gate module is all connected to output state detection module's output, and input isolation and detection module's input is connected power input, and the input of logic gate module is connected to the output of input isolation and detection module, and output indication module is connected to the output of logic gate module.

As a further technical scheme of the invention: the logic gate module is an AND gate.

As a further technical scheme of the invention: one or more output state detection modules.

As a further technical scheme of the invention: the input isolation and detection module comprises an optocoupler P1, a resistor R4, a resistor R2 and a diode D1, wherein the anode of a light-emitting diode inside the optocoupler P1 is connected with the cathode of the diode D1, the resistor R1 and the resistor R2, the other end of the resistor R1 is connected with an input end Vin +, the other end of the resistor R2 is connected with the anode of the diode D1, the input end Vin-and the cathode of the light-emitting diode inside the optocoupler P1, and the collector of a phototriode inside the optocoupler P1 is connected with a signal P through a resistor R3.

As a further technical scheme of the invention: the output state detection module comprises a resistor R5, a resistor R6, a triode Q1 and a diode D2, one end of the resistor R5 is connected with a signal P1, the other end of the resistor R5 is connected with the base of the triode Q1 and the other end of the resistor R6, the other end of the resistor R6 is connected with the collector of the triode Q1 and the ground, the emitter of the triode Q1 is connected with the cathode of the diode D2, and the anode of the diode D2 is connected with the optocoupler P1.

As a further technical scheme of the invention: the diode D2 is a light emitting diode.

As a further technical scheme of the invention: the diode D1 is a voltage stabilizing diode.

Compared with the prior art, the invention has the beneficial effects that: the invention can indicate the abnormity of the power supply, including the abnormity of the input end and the output end, at the highest speed. When multiple power supplies are output, the state of different power supplies can be quickly indicated according to the requirement. The circuit is a circuit with strong universality.

Drawings

Fig. 1 is an overall block diagram of the present invention.

Fig. 2 is a circuit diagram of a case where there is only one power supply.

Fig. 3 is a circuit diagram for a multi-channel power supply.

Fig. 4 is a circuit diagram with an indicator light for multiple power sources.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, embodiment 1: the utility model provides a power state indicating circuit, includes power module, input isolation and detection module, output state detection module, logic gate module and output indication module, power input is connected to power module's input, and output state detection module is connected to power module's output, and the input of logic gate module is all connected to output state detection module's output, and input isolation and detection module's input is connected power input, and the input of logic gate module is connected to the output of input isolation and detection module, and output indication module is connected to the output of logic gate module. The logic gate module is an AND gate. One or more output state detection modules.

Assuming that only one power supply is output, the output power supply state indication signal PG is generated by the signal Y1 after the power supply output state detection and the power supply input state indication signal Y0 in a logical and form, and the power supply state indication signal PG is normal only when the input state indication signal Y0 and the signal Y1 after the output state detection are both normal. When either or both of the input state indicating signal Y0 and the output state detected signal Y1 are abnormal, the output power state indicating signal PG is abnormal.

As shown in fig. 2, when the PG signal is high, it indicates that the power state is normal, and when the PG signal is low, it indicates that the power state is abnormal. Specifically, when the output voltage is normal, the output detection state and the logical and circuit are disconnected, the logical and result is not affected, at this time, if the input voltage is normal, the input state indication signal is at a high level, and the logical and result, namely the PG signal, is at a high level, which represents that the power supply state is normal; if the input voltage is abnormal, the input state indicating signal is at low level, and the logic AND result, i.e. the PG signal, is at low level, which represents that the power state is abnormal. When the output is lowered to the voltage alarm threshold, the output voltage detection state is low, no matter what the input state indication signal is, the logical AND result is low, and the PG signal is also low, which represents that the power state is abnormal.

Considering that in practical application, the input end power supply is suddenly disconnected (probably because of power failure or power line pull-out, etc.), even if the output end voltage does not drop yet, because the output end of the optocoupler P2 is in an open circuit state, R4 pulls down the PG signal, which is equivalent to that the input state indication signal is low and the PG signal is low. The speed of the power state indicating signal overturning is not influenced by the voltage drop speed of the output end, and the rapid state indication can be realized.

Embodiment 2, on the basis of embodiment 1, if there are multiple power outputs, each power output status detection can be logically anded with other power status detection signals and input status indication signals. If all the power supplies are normal, the logical AND result is still normal. If one or more of the power supplies are abnormal, the logical AND result is abnormal. The logical AND result represents the overall state of the power supply, and is normal only if the input and all output results are normal. See fig. 3.

Embodiment 3, on the basis of embodiment 2, when there are multiple output power sources, if the input is normal, the detected result of each power source can be indicated by the LED lamp, and the user can know the status of each output power source and the total logical and result. See fig. 4.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims

1. The utility model provides a power state indicating circuit, includes power module, input isolation and detection module, output state detection module, logic gate module and output indication module, a serial communication port, power module's input connection power input, output state detection module is connected to power module's output, logic gate module's input is all connected to output state detection module's output, input isolation and detection module's input connection power input, logic gate module's input is connected to input isolation and detection module's output, output indication module is connected to logic gate module's output, output state detection module includes resistance R5, resistance R6, triode Q1 and diode D2, signal P1 is connected to resistance R5's one end, triode Q1's base and resistance R6 are connected to resistance R5's the other end, triode Q1's collecting electrode and ground are connected to resistance R6's the other end, diode Q1's emitting pole is connected to triode Q1's projecting pole, diode D2's positive pole is connected opto-coupler P1, diode D2 is emitting diode, input isolation and detection module includes P1, resistance R4, resistance R2 and diode D1, the other end of the internal light emitting diode connects the other end of photo-diode, the other end of photo-diode is connected to the photo-diode R1, the photo-diode's negative pole is connected to the photo-coupler, the other end of photo-diode is connected to the photo-diode.

2. The power status indicator circuit of claim 1, wherein the logic gate module is an and gate.

3. The power status indication circuit according to claim 1, wherein the output status detection module comprises one or more modules.

4. A power status indicating circuit according to claim 3, wherein the diode D1 is a zener diode.