CN210490802U - Doherty power amplifier - Google Patents
Doherty power amplifier Download PDFInfo
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- CN210490802U CN210490802U CN201922172910.9U CN201922172910U CN210490802U CN 210490802 U CN210490802 U CN 210490802U CN 201922172910 U CN201922172910 U CN 201922172910U CN 210490802 U CN210490802 U CN 210490802U
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Abstract
The utility model discloses a Doherty power amplifier, which comprises a power divider, a first input matching network, a second input matching network, a phase compensator, a first power amplifier, a second power amplifier, a first output matching network, a second power amplifier output impedance compensation line and a rear matching network; the power distribution ratio of the first output end and the second output end of the power divider is 2.5:1, the first output end of the power divider is connected with the first output matching network sequentially through the phase compensator, the first input matching network and the first power amplifier, the second output end of the power divider is connected with the second power amplifier output impedance compensation line sequentially through the second input matching network, the second power amplifier and the second output matching network, and signals output by the first output matching network and the second power amplifier output impedance compensation line are converged into one path and then are output to the outside through the matching network. The utility model provides high Doherty power amplifier rolls back efficiency.
Description
Technical Field
The present invention relates to a wireless communication system, and more particularly, to a Doherty power amplifier used in a wireless communication system.
Background
Power amplifiers are an important component of an overall wireless communication system. The efficiency and output power of the power amplifier directly affect the efficiency of the whole communication system. The efficiency of the traditional A, AB and C classes when the output power of the power amplifier is saturated is ensured, but when the input signal power is lower, the efficiency of the traditional power amplifier is sharply reduced, and the requirement of a communication system, particularly a base station, on high back-off efficiency is difficult to meet. Therefore, a Doherty power amplifier is proposed, which is divided into a carrier power amplifier and a peak power amplifier, the carrier power amplifier is biased in class B, the peak power amplifier is biased in class C, when the input signal power is low, the peak power amplifier does not work, the carrier power amplifier works, and the carrier power amplifier starts to work along with the increase of the input signal power.
The traditional Doherty power amplifier has the biggest characteristic of improving the rollback efficiency of the Doherty power amplifier. With the development of communication systems, the requirement of a base station on the backoff efficiency is improved, and the backoff efficiency of a Doherty power amplifier still needs to be improved.
SUMMERY OF THE UTILITY MODEL
The utility model aims to overcome the not enough of prior art, provide a Doherty power amplifier.
The purpose of the utility model is realized through the following technical scheme: a Doherty power amplifier comprises a power divider, a first input matching network, a second input matching network, a phase compensator, a first power amplifier, a second power amplifier, a first output matching network, a second power amplifier output impedance compensation line and a rear matching network;
the power distribution ratio of a first output end and a second output end of the power divider is 2.5:1, the input end of the power divider receives radio frequency signals, the first output end of the power divider is connected with the first output matching network sequentially through the phase compensator, the first input matching network and the first power amplifier, the second output end of the power divider is connected with the second power amplifier output impedance compensation line sequentially through the second input matching network, the second power amplifier and the second output matching network, and signals output by the first output matching network and the second power amplifier output impedance compensation line are converged into one path and then are output to the outside through the matching network.
The signal output by the first output end of the power divider is set as a first branch signal, the signal output by the second output end of the power divider is set as a second branch signal, the power divider power ratio is 2.5:1, the input power of the first power amplifier can be improved, when the output power of the Doherty power amplifier is backed off, the output voltage of the carrier power amplifier is increased, and the back-off efficiency of the Doherty power amplifier is improved. The first power amplifier and the second power amplifier both adopt CGH40045F devices, and the transistor is a high electron mobility gallium nitride transistor produced by CREE company.
The first branch signal flows through the phase compensator and the first input matching network into the gate (input) of the first power amplifier. A section of microstrip line is used as the phase compensator, and the characteristic impedance of the microstrip line is 50 Ω. The length of the microstrip line is adjusted to ensure that the phase shift of the first signal branch and the phase shift of the second signal branch are equal. The first input matching network ensures that the impedance of the signal source is matched with the input impedance of the first power amplifier. The first branch signal enters the gate of the first power amplifier, is output from the drain (output) of the first power amplifier (the source of the first power amplifier is grounded), and then flows through the first output matching network. The first power amplifier is biased in class B, and the first output matching network ensures that the impedance of the output matching network looking to a load modulation point when the output power of the first power amplifier is saturated is matched with the impedance required by the current source end face of the first power amplifier, namely 2RLOptimum impedance R matched to class B current source end faceopt. Meanwhile, the first output matching network ensures that the impedance of the first power amplifier output matching network looking to the load modulation point is matched with the impedance required by the current source end face of the amplifier, namely RLIs matched to 2Ropt. Wherein R isLLooking at the impedance of the backward matching network for a load modulation point, wherein the load modulation point is a branch combination point of the first power amplifier and the second power amplifier;
the second branch signal flows through the second input matching network to enter the second branchPower amplifier gate (input). The second input matching network ensures that the impedance of the signal source is matched with the input impedance of the second power amplifier. The second branch signal enters the grid electrode of the second power amplifier, is output from the drain electrode (output end) of the second power amplifier (the source electrode of the second power amplifier is grounded), and then flows through the second output matching network. The second power amplifier is biased in class C, and the second output matching network ensures that the impedance of the output matching network looking to the load modulation point when the output power of the second power amplifier is saturated is matched with the impedance required by the current source end face of the second power amplifier, namely 2RLOptimum impedance R matched to class B current source end faceopt。
And the first branch signal flowing through the first output matching network and the second branch signal flowing through the second output matching network are synthesized together, enter the rear matching network and finally flow to the load. The post-matching network is used for matching 50 omega to RL。
PCBOAnd when the output power of the Doherty power amplifier is backed off, the fundamental wave output power of the carrier power amplifier is output. I isCBOAnd when the output power of the Doherty power amplifier is backed off, the output current of the drain electrode of the tube is output.
According to (1) (2), the following were obtained:
from equation (3) we can derive: to increase the drain efficiency of the output power back-off of the Doherty power amplifier, the amplitude of the fundamental wave of the output voltage of the carrier power amplifier needs to be increased. The utility model discloses an it increases the range of carrier power amplifier output voltage fundamental wave to set up the merit and divide the ware to 2.5: 1.
The utility model has the advantages that: the utility model discloses power divider power ratio is 2.5:1, can improve first power amplifier's input power, when Doherty power amplifier output power returns back, has increased the range of carrier power amplifier output voltage fundamental wave, has improved the Doherty power amplifier and has returned efficiency.
Drawings
FIG. 1 is a schematic block diagram of the system of the present invention;
FIG. 2 is a detailed schematic diagram of the present invention;
fig. 3 is a schematic diagram of the drain efficiency and output power curve according to the present invention.
Detailed Description
The technical solution of the present invention is described in further detail below with reference to the accompanying drawings, but the scope of the present invention is not limited to the following description.
In the embodiments of the present application, a Doherty power amplifier operating at 1.9-2.3GHz is designed as an example. This example used a Rogers 4350B substrate having a thickness of 20 mils and a relative dielectric constant of 3.36 with a loss tangent tan D of 0.0036;
fig. 1 shows a block diagram of the present invention. The power divider has a power division ratio of 2.5:1 and a load modulation point impedance RLSet to 5 omega. The first power amplifier, Cree CGH40045F, had its transistor bias in class B, gate bias set to-2.8V, and drain bias set to 28V. The second power amplifier, Cree CGH40045F, had its transistor biased in class C, gate bias set to-5.9V, and drain bias set to 28V.
Fig. 2 is a detailed schematic diagram of the present invention, in an embodiment of the present application;
the PC is a phase shift compensator and consists of a section of microstrip line and a capacitor connected in series with the microstrip line.
IMN1 is a first input matching network for matching a signal source impedance to a first power amplifier input impedance; in this embodiment, the first output matching network includes a third capacitor, a fourth capacitor, and five microstrip lines; in the first output matching network: one end of the 1 st section of microstrip line is connected with the output end of the first power amplifier, the other end of the 1 st section of microstrip line is connected with the first end of the third capacitor through the 2 nd to 4 th sections of microstrip lines in sequence, and the second end of the third capacitor is connected with the rear matching network; the first end of the 5 th microstrip line is connected to the common end of the 1 st microstrip line and the 2 nd microstrip line, the second end of the 5 th microstrip line is connected with a 28V power supply, one end of the fourth capacitor is connected with the second end of the 5 th microstrip line, and the other end of the fourth capacitor is grounded.
OMN1 is a first output matching network, which ensures that when the output power of the first power amplifier is saturated, the impedance of the output matching network looking at the load modulation point is matched with the impedance required by the current source end face of the first power amplifier, namely 10 omega is matched to Ropt. Meanwhile, the first output matching network ensures that the impedance of the output matching network looking to the load modulation point is matched with the impedance required by the current source end face of the impedance amplifier when the output power of the first power amplifier is backed off by 3dB, namely 5 omega is matched to 2Ropt. In this embodiment, the first output matching network includes a third capacitor, a fourth capacitor, and five microstrip lines; in the first output matching network: one end of the 1 st section of microstrip line is connected with the output end of the first power amplifier, the other end of the 1 st section of microstrip line is connected with the first end of the third capacitor through the 2 nd to 4 th sections of microstrip lines in sequence, and the second end of the third capacitor is connected with the rear matching network; the first end of the 5 th microstrip line is connected to the common end of the 1 st microstrip line and the 2 nd microstrip line, the second end of the 5 th microstrip line is connected with a 28V power supply, one end of the fourth capacitor is connected with the second end of the 5 th microstrip line, and the other end of the fourth capacitor is grounded.
The IMN2 is a second input matching network, and the second input matching network is configured to match a signal source impedance with a second power amplifier input impedance, where in this embodiment, the second input matching network includes a fifth capacitor, a sixth capacitor, a seventh capacitor, a second inductor, and seven microstrip lines; in the second input matching network, one end of a fifth capacitor is connected with the second output end of the power divider, and the other end of the fifth capacitor is connected with the input end of the second power amplifier through 1-6 sections of microstrip lines in sequence; the sixth capacitor is connected with the second inductor in parallel and then arranged between the 2 nd microstrip line and the 3 rd microstrip line; the first end of the 7 th microstrip line is connected to the common end of the 5 th microstrip line and the 6 th microstrip line, the second end of the 7 th microstrip line is connected to a-5.9V power supply, one end of the seventh capacitor is connected with the second end of the 7 th microstrip line, and the other end of the second capacitor is grounded.
OMN2 is a second output matching network which ensures that the impedance of the output matching network looking at the load modulation point when the output power of the second power amplifier is saturated is matched with the impedance required by the current source end face of the second power amplifier, namely 10 omega is matched to Ropt. In this embodiment, the second output matching network includes an eighth capacitor, a ninth capacitor, and a fifth microstrip line; in the second output matching network: one end of the 1 st section of microstrip line is connected with the output end of the second power amplifier, the other end of the 1 st section of microstrip line is connected with the first end of the eighth capacitor through the 2 nd to 4 th sections of microstrip lines in sequence, and the second end of the eighth capacitor is connected with the second power amplifier output impedance compensation line; the first end of the 5 th microstrip line is connected to the common end of the 1 st microstrip line and the 2 nd microstrip line, the second end of the 5 th microstrip line is connected to a 28V power supply, one end of the ninth capacitor is connected with the second end of the 5 th microstrip line, and the other end of the ninth capacitor is grounded.
OC is a second power amplifier output impedance compensation line, and the characteristic impedance is 2RL. Q is a rear matching network, comprises six sections of microstrip lines connected in sequence and is used for matching 50 omega to RL。
The length and width of each microstrip line in the above embodiment are shown in fig. 2, in the figure, a rectangular black device represents a microstrip line, and numbers below/to the right of the microstrip line represent the length and width of the microstrip line, where the left number of "/" represents the width of the microstrip line, and the length of the right digital microstrip line of "/" is mm.
Fig. 3 is the utility model discloses drain electrode efficiency and output power curve graph, at whole frequency channel the utility model discloses efficiency that 6dB of Doherty power amplifier output backed down keeps more than 55%, compares output 6dB with the Doherty power amplifier of traditional merit partition and backs down efficiency promotion 5%.
Finally, it should be noted that the above is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations should also be regarded as the protection scope of the present invention.
Claims (9)
1. A Doherty power amplifier, characterized by: the power divider comprises a power divider, a first input matching network, a second input matching network, a phase compensator, a first power amplifier, a second power amplifier, a first output matching network, a second power amplifier output impedance compensation line and a rear matching network;
the power distribution ratio of a first output end and a second output end of the power divider is 2.5:1, the input end of the power divider receives radio frequency signals, the first output end of the power divider is connected with the first output matching network sequentially through the phase compensator, the first input matching network and the first power amplifier, the second output end of the power divider is connected with the second power amplifier output impedance compensation line sequentially through the second input matching network, the second power amplifier and the second output matching network, and signals output by the first output matching network and the second power amplifier output impedance compensation line are converged into one path and then are output to the outside through the matching network.
2. A Doherty power amplifier as claimed in claim 1, wherein: the phase compensator is a microstrip line which enables the phase shift of signals at two output ends of the power divider to be equal, and the characteristic impedance of the microstrip line is 50 omega.
3. A Doherty power amplifier as claimed in claim 1, wherein: the first input matching network comprises a first capacitor, a second capacitor, a first inductor and seven sections of microstrip lines;
in the first input matching network: one end of the 1 st section of microstrip line is connected with the output end of the phase compensator, and the other end of the 1 st section of microstrip line is connected with the input end of the first power amplifier through the 2 nd to 6 th sections of microstrip lines in sequence; the first capacitor and the first inductor are connected in parallel and then arranged between the 2 nd microstrip line and the 3 rd microstrip line; the first end of the 7 th microstrip line is connected to the common end of the 5 th microstrip line and the 6 th microstrip line, the second end of the 7 th microstrip line is connected to a-2.8V power supply, one end of the second capacitor is connected with the second end of the 7 th microstrip line, and the other end of the second capacitor is grounded.
4. A Doherty power amplifier as claimed in claim 1, wherein: the first output matching network comprises a third capacitor, a fourth capacitor and five microstrip lines;
in the first output matching network: one end of the 1 st section of microstrip line is connected with the output end of the first power amplifier, the other end of the 1 st section of microstrip line is connected with the first end of the third capacitor through the 2 nd to 4 th sections of microstrip lines in sequence, and the second end of the third capacitor is connected with the rear matching network; the first end of the 5 th microstrip line is connected to the common end of the 1 st microstrip line and the 2 nd microstrip line, the second end of the 5 th microstrip line is connected with a 28V power supply, one end of the fourth capacitor is connected with the second end of the 5 th microstrip line, and the other end of the fourth capacitor is grounded.
5. A Doherty power amplifier as claimed in claim 1, wherein: the first power amplifier is biased in a B type and used as a carrier power amplifier; the second power amplifier is biased in class C and serves as a peak power amplifier.
6. A Doherty power amplifier as claimed in claim 1, wherein: the second input matching network comprises a fifth capacitor, a sixth capacitor, a seventh capacitor, a second inductor and a seventh microstrip line;
in the second input matching network, one end of a fifth capacitor is connected with the second output end of the power divider, and the other end of the fifth capacitor is connected with the input end of the second power amplifier through 1-6 sections of microstrip lines in sequence; the sixth capacitor is connected with the second inductor in parallel and then arranged between the 2 nd microstrip line and the 3 rd microstrip line; the first end of the 7 th microstrip line is connected to the common end of the 5 th microstrip line and the 6 th microstrip line, the second end of the 7 th microstrip line is connected to a-5.9V power supply, one end of the seventh capacitor is connected with the second end of the 7 th microstrip line, and the other end of the second capacitor is grounded.
7. A Doherty power amplifier as claimed in claim 1, wherein: the second output matching network comprises an eighth capacitor, a ninth capacitor and a fifth microstrip line;
in the second output matching network: one end of the 1 st section of microstrip line is connected with the output end of the second power amplifier, the other end of the 1 st section of microstrip line is connected with the first end of the eighth capacitor through the 2 nd to 4 th sections of microstrip lines in sequence, and the second end of the eighth capacitor is connected with the second power amplifier output impedance compensation line; the first end of the 5 th microstrip line is connected to the common end of the 1 st microstrip line and the 2 nd microstrip line, the second end of the 5 th microstrip line is connected to a 28V power supply, one end of the ninth capacitor is connected with the second end of the 5 th microstrip line, and the other end of the ninth capacitor is grounded.
8. A Doherty power amplifier as claimed in claim 1, wherein: the second power amplifier output impedance compensation line adopts a section of microstrip line.
9. A Doherty power amplifier as claimed in claim 1, wherein: the rear matching network comprises six sections of microstrip lines which are connected in sequence.
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| CN201922172910.9U CN210490802U (en) | 2019-12-06 | 2019-12-06 | Doherty power amplifier |
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| CN201922172910.9U CN210490802U (en) | 2019-12-06 | 2019-12-06 | Doherty power amplifier |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112491372A (en) * | 2020-11-18 | 2021-03-12 | 西安交通大学 | Radio frequency power amplifying circuit based on artificial nonlinear matching network |
| CN114553151A (en) * | 2022-02-25 | 2022-05-27 | 优镓科技(苏州)有限公司 | Doherty power amplifier based on self-adaptive bias |
| US11616476B2 (en) | 2020-10-19 | 2023-03-28 | City University Of Hong Kong | Power amplifier circuit |
| US12034408B2 (en) | 2020-11-16 | 2024-07-09 | City University Of Hong Kong | Wideband Doherty power amplifier |
-
2019
- 2019-12-06 CN CN201922172910.9U patent/CN210490802U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11616476B2 (en) | 2020-10-19 | 2023-03-28 | City University Of Hong Kong | Power amplifier circuit |
| US12034408B2 (en) | 2020-11-16 | 2024-07-09 | City University Of Hong Kong | Wideband Doherty power amplifier |
| CN112491372A (en) * | 2020-11-18 | 2021-03-12 | 西安交通大学 | Radio frequency power amplifying circuit based on artificial nonlinear matching network |
| CN112491372B (en) * | 2020-11-18 | 2023-08-15 | 西安交通大学 | Radio frequency power amplifying circuit based on artificial nonlinear matching network |
| CN114553151A (en) * | 2022-02-25 | 2022-05-27 | 优镓科技(苏州)有限公司 | Doherty power amplifier based on self-adaptive bias |
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Effective date of registration: 20210426 Address after: Room 452, 4th floor, Science Park building, Chengdu Institute of technology, No.1, Section 2, Zhongxin Avenue, Pitong Town, Pidu District, Chengdu, Sichuan 610000 Patentee after: Sichuan shipino Measurement Technology Co.,Ltd. Address before: 610000 No. 5 West core road, hi tech Zone, Chengdu, Sichuan Patentee before: CHENGDU LONGTENG ZHONGYUAN INFORMATION TECHNOLOGY Co.,Ltd. |
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