CN210466180U - Low-voltage direct-current voltage conversion circuit - Google Patents

Abstract

The utility model relates to a power management field provides a low pressure DC voltage converting circuit, including an external resistance and a power management circuit, power management circuit include a reference voltage source, an operational amplifier, a plurality of power PMOS pipe, an internal resistance, the source end and the end connection of the body of power PMOS pipe are all linked together, same drive signal is all adopted to the grid of all power PMOS pipes, the drain electrode of all power PMOS pipes all links together and supplies power to the external load. The voltage value of the low-voltage DC voltage conversion circuit for supplying power to the external load can be adjusted by adjusting the resistance value of the external resistor; increase and decrease source end and body end all are connected to DC power supply's power PMOS pipe's quantity, can adjust the utility model discloses a low pressure direct current voltage conversion circuit is to external load's drive current's size.

Description

Low-voltage direct-current voltage conversion circuit

Technical Field

The utility model relates to a power management field more precisely relates to a low pressure direct current voltage conversion circuit.

Background

Chips in small-sized electronic equipment are generally powered by a low-voltage direct-current power supply, a linear direct-current voltage conversion circuit can realize instantaneous calibration, and the linear direct-current voltage conversion circuit is low in cost, simple in scheme and increasingly applied to power management chips. However, the power, the equivalent resistance value and the required driving current of the load chip are different in different working modes. In the prior art, the same linear direct-current voltage conversion circuit often has fixed output voltage and fixed driving capability, cannot adapt to the change of the working mode of a load chip, cannot stabilize the output voltage, and cannot adjust the magnitude of the driving current.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model is to provide a low pressure direct current voltage converting circuit, can adapt to the various mode of load chip, can stabilize output voltage to can provide different drive current according to load chip's needs.

The technical solution of the present invention is to provide a low voltage dc voltage converting circuit, which comprises an external resistor and a power management circuit, wherein the power management circuit comprises a reference voltage source, an operational amplifier, a plurality of power PMOS transistors, and an internal resistor; the body end and the source end of each power PMOS tube are connected together, and the source end of at least one power PMOS tube is connected with a direct-current power supply; the reference voltage source generates a band-gap voltage which is irrelevant to the process, the power voltage and the temperature, and the band-gap voltage is electrically connected with the inverting input end of the operational amplifier; the non-inverting input end of the operational amplifier, one end of the internal resistor and one end of the external resistor are electrically connected; the other end of the external resistor is grounded; the other end of the internal resistor is electrically connected with the drain electrodes of all the power PMOS tubes; the output end of the operational amplifier is electrically connected with the grids of all the power PMOS tubes; the low-voltage direct-current voltage conversion circuit supplies power to an external load through the drain electrode of the power PMOS tube.

Compared with the prior art, the utility model discloses a low pressure direct current voltage converting circuit has following advantage: the power management circuit of the utility model can be designed in the chip together with the load, and the external resistor can be arranged outside the chip; the voltage value of the low-voltage DC voltage conversion circuit for supplying power to the external load can be adjusted by adjusting the resistance value of the external resistor; the quantity that the increase and decrease source end is connected to DC power supply's power PMOS pipe can be adjusted the utility model discloses a low pressure direct current voltage converting circuit is to external load's drive current's size.

Preferably, the power management circuit is packaged into a power management chip, the power management chip further includes an input pin, an output pin, and a plurality of power pins corresponding to the number of the power PMOS transistors, the non-inverting input terminal of the operational amplifier is connected to the external resistor through the input pin, the body end and the source end of the power PMOS transistor are connected to the dc power supply through the corresponding power pins, and the drain electrode of the power PMOS transistor supplies power to the external load through the output pin. In this way, the power management circuit is packaged into a power management chip, which is suitable for batch production; the external resistor is arranged outside the power management chip, so that the resistance value of the external resistor is convenient to adjust; the arrangement of the input pin facilitates the replacement of the external resistor; the power supply pin is arranged, so that the source end of the power PMOS tube is conveniently connected to a direct-current power supply; the arrangement of the output pin facilitates the power supply of the power management chip to an external load.

Preferably, the external resistor is a variable resistor. In this way, the resistance value of the external resistor can be adjusted linearly conveniently

Drawings

Fig. 1 is a circuit diagram of an embodiment of a low-voltage dc voltage converter circuit according to the present invention.

Detailed Description

For a better understanding of the present application, various aspects of the present application will be described in more detail with reference to the accompanying drawings. It should be understood that the detailed description is merely illustrative of exemplary embodiments of the present application and does not limit the scope of the present application in any way. Like reference numerals refer to like elements throughout the specification.

It will be further understood that the terms "comprises," "comprising," "includes," "including," "has," "having," "contains," "including," and/or "containing," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Further, when a statement such as "… at least one" appears after the list of listed features, the entire listed feature is modified rather than modifying individual elements in the list.

As shown in fig. 1, the low voltage dc voltage converting circuit of the present invention includes an external resistor Rex and a power management circuit, wherein the power management circuit includes a reference voltage source D1, an operational amplifier D2, a plurality of power PMOS transistors D3, and an internal resistor Rin; the body end and the source end of each power PMOS tube D3 are connected together, and the source end of at least one power PMOS tube D3 is connected with a direct-current power supply; the reference voltage source generates a band gap voltage which is irrelevant to the process, the power voltage and the temperature and is used as a reference potential Vb, the reference potential Vb is electrically connected with the inverting input end of the operational amplifier D2, and the reference potential Vb is 1V in the embodiment; the non-inverting input end of the operational amplifier D2, one end of the internal resistor Rin and one end of the external resistor Rex are electrically connected; the other end of the external resistor Rex is grounded; the other end of the internal resistor Rin is electrically connected with the drain electrodes of all the power PMOS tubes D3; the voltage output by the operational amplifier D2 is used as a regulation potential Vc, and the regulation potential Vc is electrically connected with the gates of all power PMOS tubes D3; the low-voltage direct-current voltage conversion circuit supplies power to an external load through the drain electrode of the power PMOS tube D3. The power management circuit is packaged into a power management chip, the voltage of the non-inverting input end of the operational amplifier D2 is used as a sampling potential Vs, and the sampling potential Vs is led out of the chip through an IN pin and is connected with an external resistor Rex; the number of the power PMOS tubes D3 is 8, the drain potential of the power PMOS tube D3 is used as an output potential Vout, and the output potential Vout is led OUT of the chip through an OUT pin and supplies power to an external load; and the body end and the source end of the power PMOS tube D3 are led out of the chip through the corresponding VDD pins to be connected with a direct-current power supply. Be used for adjusting the utility model discloses a low pressure direct current voltage converting circuit output potential Vout's external resistance Rex can be variable resistance, conveniently carries out linear adjustment to external resistance Rex's resistance.

The utility model discloses a low pressure direct voltage converting circuit's theory of operation as follows:

an external resistor Rex is connected to the pin IN, the other end of the external resistor Rex is grounded, a VDD pin corresponding to at least one power PMOS tube D3 is connected with a direct-current power supply, the pin OUT is externally connected with a load chip, the equivalent resistance of the load chip is set as Rout, then a branch consisting of an internal resistor Rin and the external resistor Rex is connected with a branch where the load chip is located IN parallel, and the equivalent resistances of the two branches are used as Rt; the operational amplifier D2 modulates the regulated potential Vc according to the comparison condition of the sampled potential Vs and the reference potential Vb, increases the regulated potential Vc if the sampled potential Vs is greater than the reference potential Vb, and decreases the regulated potential Vc if the sampled potential Vs is less than the reference potential Vb; the power PMOS tube D3 is modulated by the regulation potential Vc to generate a certain resistance Rp, and the Rp and Rt are divided to generate an output potential Vout, and the internal resistance Rin and the external resistance Rex form a voltage division sampling channel of the output potential Vout together to generate a sampling potential Vs signal. On the other hand, the number of VDD pins connected with the direct-current power supply is increased, and the current flowing through the VOUT pins is increased, so that the external driving capability of the low-voltage direct-current voltage conversion circuit is enhanced; otherwise, connect DC power supply's VDD pin quantity and reduce, the electric current that flows through the VOUT pin reduces, makes the utility model discloses a low pressure DC voltage converting circuit's external driving force weakens.

When Rout of an accessed load chip is increased due to a working mode (for example, a low power consumption mode is entered), Rt is also correspondingly increased, an output potential Vout is instantaneously increased, if the output potential Vout is still higher than the rated working voltage of the load chip after the circuit is stabilized, the value of a sampling potential Vs can be increased by increasing the resistance value of an external resistor Rex, a regulation potential Vc output by an operational amplifier D2 is increased, the resistance Rp of a power PMOS tube D3 is increased, and the value of the output potential Vout is further pulled down, so that the output potential Vout is returned to the rated working voltage of the load chip; if the output potential Vout is lower than the rated working voltage of the load chip after the circuit is stabilized, the value of the sampling potential Vs can be reduced by reducing the resistance value of the external resistor Rex, the regulation potential Vc output by the operational amplifier D2 is reduced, the resistance Rp of the power PMOS tube D3 is reduced, the value of the output potential Vout is further increased, and the output potential Vout is returned to the rated working voltage of the load chip. After load chip got into low-power consumption mode, the drive current that its needs became little, can weaken through reducing the VDD pin quantity of connecting DC power supply the utility model discloses a low pressure DC voltage converting circuit's external driving force makes the electric current that flows through the OUT pin reduce.

When Rout of an accessed load chip is reduced due to a working mode (for example, the load chip enters a high-power mode), Rt is also correspondingly reduced, an output potential Vout is instantaneously reduced, if the output potential Vout is still lower than the rated working voltage of the load chip after the circuit is stabilized, the value of a sampling potential Vs can be reduced by reducing the resistance value of an external resistor Rex, a regulation potential Vc output by an operational amplifier D2 is reduced, the resistance Rp of a power PMOS tube D3 is reduced, the value of the output potential Vout is further pulled high, and the output potential Vout is returned to the rated working voltage of the load chip; if the output potential Vout is higher than the rated working voltage of the load chip after the circuit is stabilized, the value of the sampling potential Vs can be increased by increasing the resistance value of the external resistor Rex, the regulation potential Vc output by the operational amplifier D2 is increased, the resistance Rp of the power PMOS tube D3 is increased, and then the value of the output potential Vout is reduced, so that the output potential Vout returns to the rated working voltage of the load chip. After load chip got into high-power mode, the drive current that its needs became big, can strengthen through the increase VDD pin quantity of connecting DC power supply the utility model discloses a low pressure DC voltage converting circuit's external driving force makes the current increase of flowing through the OUT pin.

Claims (3)

1. A low-voltage DC voltage conversion circuit is characterized by comprising an external resistor and a power management circuit, wherein the power management circuit comprises a reference voltage source, an operational amplifier, a plurality of power PMOS (P-channel metal oxide semiconductor) tubes and an internal resistor; the body end and the source end of each power PMOS tube are connected together, and the source end of at least one power PMOS tube is connected with a direct-current power supply; the reference voltage source generates a band gap voltage which is electrically connected with the inverting input end of the operational amplifier; the non-inverting input end of the operational amplifier, one end of the internal resistor and one end of the external resistor are electrically connected; the other end of the external resistor is grounded; the other end of the internal resistor is electrically connected with the drain electrodes of all the power PMOS tubes; the output end of the operational amplifier is electrically connected with the grids of all the power PMOS tubes; the low-voltage direct-current voltage conversion circuit supplies power to an external load through the drain electrode of the power PMOS tube.

2. The low voltage dc voltage converting circuit according to claim 1, wherein the power management circuit is packaged as a power management chip, the power management chip further comprises an input pin, an output pin, and a plurality of power pins corresponding to the number of the power PMOS transistors, the non-inverting input terminal of the operational amplifier is connected to the external resistor through the input pin, the body and source terminals of the power PMOS transistor are connected to the dc power supply through the corresponding power pins, and the drain of the power PMOS transistor supplies power to the external load through the output pin.

3. The low voltage dc voltage converting circuit according to claim 1 or 2, wherein the external resistor is a variable resistor.

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