CN210466107U - High-security network data acquisition device based on FPGA - Google Patents
High-security network data acquisition device based on FPGA Download PDFInfo
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- CN210466107U CN210466107U CN201922077649.4U CN201922077649U CN210466107U CN 210466107 U CN210466107 U CN 210466107U CN 201922077649 U CN201922077649 U CN 201922077649U CN 210466107 U CN210466107 U CN 210466107U
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Abstract
The utility model relates to a computer information field device especially relates to a high security network data collection system based on FPGA, including main FPGA, vice FPGA, network data acquisition module, the auxiliary processor who is used for the code, main FPGA wherein is connected with vice FPGA, network data acquisition module, auxiliary processor electricity respectively, and main FPGA still is connected with the memory electricity, and the auxiliary processor passes through host computer communication module and is connected with the host computer electricity.
Description
Technical Field
The utility model relates to a computer information field device, it is very much related to a high security network data acquisition device based on FPGA.
Background
The chinese utility model patent CN201620787502.8 discloses a wireless network data acquisition device, which comprises a data center computer, an AI instrument, an instrument cabinet body, an NI wireless communication module, a wireless gateway, a sensor, an analog signal and an RS-485 communication line, wherein the surface of the instrument cabinet body is arranged on an indicator lamp, the instrument cabinet body is provided with the AI instrument, a wire slot is arranged inside the instrument cabinet body, and the NI wireless communication module is fixedly installed inside the instrument cabinet body; the instrument cabinet body is provided with a terminal, a switching power supply is fixedly installed in the instrument cabinet body, the AI instrument and the indicator lamp are both electrically connected with the switching power supply, and the terminal on the instrument cabinet body is connected with an instrument cabinet node through a wire; the wireless gateway is arranged at the gateway inspection position and is intelligently connected with the data center computer through the Ethernet; the sensor is connected with a wiring terminal, the two ends of the wiring terminal are connected with AI instruments, the AI instruments are connected with the NI wireless communication module through RS-485 communication lines, and the AI instruments are connected with each other through RS-485 communication lines; the sensor signal that the said sensor sends enters the body of the instrument cupboard through wire casing and terminal, the signal is transmitted to the sampling end of AI instrument, this patent mainly describes a common network data acquisition equipment in prior art, gather the analog signal through the electrical component and then transmit to the wireless or wired communication module, then transmit to the upper computer, the main difference of the relevant technology in this technical field lies in having the information type of gathering differently, the field of the concrete application is different; however, the common problem in the above technologies is that the network data acquired by the network communication module is generally directly transmitted to the upper computer, and even if encrypted, the network data is only transmitted in the software protocol layer, so that the confidentiality of the network data transmission is not high enough in practice.
SUMMERY OF THE UTILITY MODEL
The utility model discloses an above-mentioned technical problem is solved through following technical scheme:
high security network data acquisition device based on FPGA, including main FPGA, vice FPGA, network data acquisition module, the auxiliary processor who is used for the code, main FPGA wherein is connected with vice FPGA, network data acquisition module, auxiliary processor electricity respectively, and main FPGA still is connected with the memory electricity, and the auxiliary processor passes through host computer communication module and is connected with the host computer electricity.
Furthermore, the main FPGA and the network data acquisition module share an output port which is electrically connected with the auxiliary FPGA and transmits the acquired data, and the auxiliary FPGA is connected with the main FPGA through an output port and transmits the data after being added with codes.
Furthermore, the main FPGA and/or the auxiliary FPGA adopt FPGA chips.
Furthermore, the main FPGA is electrically connected with the auxiliary FPGA through a global input/output pin and/or a common input/output pin, the main FPGA is electrically connected with the auxiliary processor through the global input/output pin and/or the common input/output pin, and the main FPGA is electrically connected with the memory through the global input/output pin and/or the common input/output pin.
Further, the network data acquisition module comprises an AD conversion module, and the network data acquisition module is used for acquiring network data which needs to be finally transmitted to the upper computer.
Furthermore, the memory adopts an EPROM memory, the auxiliary processor adopts a DSP processor, and the upper computer communication module adopts an Ethernet interface module.
Furthermore, hardware for decoding or a programmable decoding device based on the hardware is arranged in the upper computer.
Advantageous effects
The utility model discloses can add the sign indicating number once more and finally realize decoding by the host computer in the physical layer to network data in network data's collection transmission, can increase network data acquisition's security, adopted the FPGA circuit to realize direct on-the-spot programmable in addition on the processing that adds the sign indicating number, improve the flexibility of code, can also exert the natural advantage that the scalability of FPGA circuit itself is strong, the low power dissipation, the processing speed is fast.
Drawings
Fig. 1 is a circuit connection block diagram of an embodiment of the present invention.
Fig. 2 is a block diagram of the connection of part of the circuit of the present invention.
Detailed Description
High security network data acquisition device based on FPGA, as figure 1, the utility model discloses a main FPGA, vice FPGA, network data acquisition module, the auxiliary processor that are used for the code, main FPGA wherein is connected with vice FPGA, network data acquisition module, auxiliary processor electricity respectively, main FPGA still is connected with the memory electricity, the auxiliary processor passes through host computer communication module and upper computer electricity is connected; as shown in fig. 2, the main FPGA and the network data acquisition module share an output port to be electrically connected with the auxiliary FPGA and transmit acquired data, and the auxiliary FPGA is connected with the main FPGA through an output port and transmits coded data; in specific implementation, the network data acquisition module is used for acquiring network data, wherein part of the analog signals are converted into digital information through AD (analog-to-digital) conversion, most of the analog signals are direct digital signals, the acquired signals are transmitted to the auxiliary FPGA through the main FPGA and the network data acquisition module which share one output port, the auxiliary FPGA is programmable, an erasable memory is arranged in or externally connected to the auxiliary FPGA to serve as programmed data, the auxiliary FPGA is programmed to finish code adding (namely encryption is essential) on a physical layer of the network data, the coded digital signals are output to the main FPGA, the main FPGA delivers the signals to the auxiliary processor and then to the upper computer through the upper computer communication module, and finally decoding is realized on the upper computer; the utility model discloses can add the sign indicating number once more and finally realize decoding by the host computer in the physical layer to network data in network data's collection transmission, can increase network data acquisition's security, adopted the FPGA circuit to realize direct on-the-spot programmable in addition on the processing that adds the sign indicating number, improve the flexibility of code, can also exert the natural advantage that the scalability of FPGA circuit itself is strong, the low power dissipation, the processing speed is fast.
The main FPGA and/or the auxiliary FPGA adopt FPGA chips; the FPGA chip has a mature development technology in implementation, and a large batch of rapid large-scale production is supported by firstly designing and programming on a PC and then burning.
The main FPGA is electrically connected with the auxiliary FPGA through a global input/output pin and/or a common input/output pin, the main FPGA is electrically connected with the auxiliary processor through the global input/output pin and/or the common input/output pin, and the main FPGA is electrically connected with the memory through the global input/output pin and/or the common input/output pin.
The network data acquisition module comprises an AD conversion module, and the network data acquisition module is used for acquiring network data which needs to be finally transmitted to the upper computer.
The memory adopts an EPROM memory, the auxiliary processor adopts a DSP processor, and the upper computer communication module adopts an Ethernet interface module.
Hardware for decoding or a programmable decoding device based on the hardware is arranged in the upper computer.
Claims (7)
1. The high-security network data acquisition device based on the FPGA is characterized by comprising a main FPGA, an auxiliary FPGA for coding, a network data acquisition module and an auxiliary processor, wherein the main FPGA is electrically connected with the auxiliary FPGA, the network data acquisition module and the auxiliary processor respectively, the main FPGA is also electrically connected with a memory, and the auxiliary processor is electrically connected with an upper computer through an upper computer communication module.
2. The FPGA-based high-security network data acquisition device as recited in claim 1, wherein the main FPGA and the network data acquisition module share an output port to be electrically connected with the auxiliary FPGA for transmitting the acquired data, and the auxiliary FPGA is connected with the main FPGA through an output port for transmitting the encoded data.
3. The FPGA-based high-security network data acquisition device as claimed in claim 2, wherein the main FPGA and/or the auxiliary FPGA are/is FPGA chips.
4. The FPGA-based high-security network data acquisition device as recited in claim 3, wherein the main FPGA is electrically connected with the sub FPGA through a global input/output pin and/or a common input/output pin, the main FPGA is electrically connected with the auxiliary processor through the global input/output pin and/or the common input/output pin, and the main FPGA is electrically connected with the memory through the global input/output pin and/or the common input/output pin.
5. The FPGA-based high-security network data acquisition device as recited in claim 1, wherein the network data acquisition module comprises an AD conversion module, and the network data acquisition module is used for acquiring network data which needs to be finally transmitted to the upper computer.
6. The FPGA-based high-security network data acquisition device as recited in claim 1, wherein the memory is an EPROM memory, the auxiliary processor is a DSP processor, and the upper computer communication module is an Ethernet interface module.
7. The FPGA-based high-security network data acquisition device as recited in claim 1, wherein hardware for decoding or a hardware-based programmable decoding device is arranged in the upper computer.
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Cited By (1)
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CN112305961A (en) * | 2020-10-19 | 2021-02-02 | 武汉大学 | Novel signal detection and acquisition equipment |
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CN112305961A (en) * | 2020-10-19 | 2021-02-02 | 武汉大学 | Novel signal detection and acquisition equipment |
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