CN210465911U

CN210465911U - Liquid crystal display device having a plurality of pixel electrodes

Info

Publication number: CN210465911U
Application number: CN201921159473.0U
Authority: CN
Inventors: 椎名秀树
Original assignee: Japan Display Inc
Current assignee: Japan Display Inc
Priority date: 2018-07-23
Filing date: 2019-07-23
Publication date: 2020-05-05
Anticipated expiration: 2029-07-23
Also published as: JP2020016682A; JP7139179B2

Abstract

The utility model provides a liquid crystal display device, it has TFT base plate (100) including display area (90) and frame region (95), and relative base plate (200) with the relative configuration of TFT base plate, centre gripping has liquid crystal (300) between TFT base plate (100) and relative base plate (200), wherein, be formed with organic passive film (108, 110) in frame region (95) of TFT base plate (100), on organic passive film (110), be island ground with the mode of organic passive film (110) contact and be formed with a plurality of first transparent conductive films (10) under the floating state, be formed with inorganic insulating film (112) with the mode that covers first transparent conductive film (10). This prevents the common electrode and the inorganic insulating film from being peeled off in the display region due to moisture permeation.

Description

Liquid crystal display device having a plurality of pixel electrodes

Technical Field

The present invention relates to a display device, and more particularly, to a structure for coping with peeling of a film in a display region due to moisture in a liquid crystal display device.

Background

In a liquid crystal display device, a TFT substrate in which pixels having pixel electrodes and TFTs are formed in a matrix form and a counter substrate in which a black matrix or the like is formed are opposed to each other with liquid crystal interposed therebetween in a display region. Then, an image is formed by controlling the transmittance of the liquid crystal in each pixel.

Alignment films of polyimide were formed on the TFT substrate and the counter substrate, and the alignment films were subjected to alignment treatment to determine the initial alignment direction of the liquid crystal. Depending on the conditions for producing the alignment film, the adhesion between the alignment film and an inorganic film formed of silicon nitride or the like formed below the alignment film may be problematic. This problem becomes serious in a portion where a sealing material for bonding the TFT substrate and the counter substrate is formed.

Patent document 1 describes a structure in which: in the region where the sealing material is formed, an ITO (Indium Tin Oxide) film is disposed between the alignment film and the inorganic film, thereby dealing with the problem of peeling of the alignment film in the sealing portion.

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open publication No. 2017-9637.

SUMMERY OF THE UTILITY MODEL

Various conductive films and insulating films are stacked on a TFT substrate constituting a liquid crystal display device. As the insulating film, an inorganic film formed of a silicon oxide film (hereinafter, represented by an SiO film) and a silicon nitride film (hereinafter, represented by an SiN film) and an organic film formed of acrylic or polyimide can be used.

In the liquid crystal display device, the alignment of the liquid crystal is controlled by applying a voltage between the pixel electrode and the common electrode. On the TFT substrate, video signal lines for supplying video signals to pixels and scanning lines for controlling TFTs are formed, and particularly, in order to reduce parasitic capacitances between the video signal lines and the scanning lines and the common electrode, an organic film of about 1.5 to 4 μm is formed thick between the video signal lines and the common electrode.

In addition, the liquid crystal display device includes a type of function incorporating a touch sensor, and in this case, an organic film may be added to form two organic films in order to reduce parasitic capacitance between an electrode of the touch sensor and an electrode for image display.

The organic film easily contains moisture. When the organic film is formed thick, the water content increases. When the moisture is released from the organic film during the operation of the liquid crystal display device, film peeling of various films stacked on the organic film is caused. When such film peeling occurs in the display region, the display function is deteriorated, and in many cases, a product failure occurs at that time.

The technical problem of the utility model is that, the time that the membrane that especially in the display area caused because of moisture peeled off is prolonged as far as possible to increase product life.

The present invention has been made to solve the above problems, and the representative technical means is as follows.

A liquid crystal display device including a TFT substrate and a counter substrate arranged to face the TFT substrate, the TFT substrate including a display region and a frame region, and a liquid crystal interposed between the TFT substrate and the counter substrate, the liquid crystal display device characterized in that: an organic passivation film is formed in the frame region of the TFT substrate, a plurality of first transparent conductive films are formed in a floating state in an island shape on the organic passivation film so as to be in contact with the organic passivation film, and an inorganic insulating film is formed so as to cover the first transparent conductive films.

According to the liquid crystal display device of an aspect of the present invention, the time for peeling off the film in the display region can be prolonged, and the product life can be increased.

Drawings

Fig. 1 is a plan view of a liquid crystal display device.

Fig. 2 is a top view of the display area.

Fig. 3 is a sectional view a-a of fig. 2.

Fig. 4 is a plan view showing the structure of the touch sensor.

Fig. 5 is a diagram showing a relationship between an image display and an operation period of the touch sensor.

Fig. 6 is a sectional view B-B of fig. 2.

Fig. 7 is a plan view of a display area showing a technical problem of the present invention.

Fig. 8 is a cross-sectional view C-C of fig. 7.

Fig. 9 is a plan view of the TFT substrate.

Fig. 10 is a cross-sectional view taken along line D-D of fig. 9.

Fig. 11 is a sectional view showing an expanded state in the display region.

Fig. 12 is a plan view showing a TFT substrate according to example 1 of the present invention.

Fig. 13 is a cross-sectional view E-E of fig. 12.

Fig. 14 is a cross-sectional view showing the operation of the present invention.

Fig. 15 is a plan view showing the shape of the first ITO film.

Fig. 16 is a plan view showing a TFT substrate according to example 2 of the present invention.

Fig. 17 is a sectional view F-F of fig. 16.

FIG. 18 is a sectional view showing the operation of example 2.

Fig. 19 is a sectional view of the frame region of embodiment 3.

FIG. 20 is a sectional view showing the operation of example 3.

Fig. 21 is a cross-sectional view showing the operation of example 3 of another example.

Fig. 22 is a sectional view showing a technical problem of embodiment 4 of the present invention.

Fig. 23 is a sectional view showing embodiment 4 of the present invention.

Fig. 24 is a cross-sectional view showing another example of embodiment 4 of the present invention.

Description of reference numerals

10: first ITO film, 20: second ITO film, 90: display area, 91: scan line, 92: video signal line, 93: pixel, 95: frame area, 100: TFT substrate, 101: base film, 102: semiconductor layer, 103: gate insulating film, 104: gate electrode, 105: interlayer insulating film, 106: drain electrode, 107: source electrode, 108: first organic passivation film, 109: common wiring, 110: second organic passivation film, 111: common electrode, 112: capacitor insulating film, 113: pixel electrode, 114: alignment film, 115: lead-out wiring, 116: light shielding film, 120: through-hole, 125: through hole, 131: first organic passivation film via hole, 132: second organic passivation film via hole, 130: through-hole, 140: groove-like through hole, 150: sealing material, 160: terminal area, 200: opposing substrate, 201: color filter, 202: black matrix, 203: protective film, 204: alignment film, 250: first columnar spacer, 260: second columnar spacer, 270: wall-like spacer, 300: liquid crystal, 301: liquid crystal molecule, 400: flexible printed circuit board, 500: cavity, 1091: first chassis, 1111: second mount, 1121: crack, 2011: color filter base, 2021: black matrix groove, Rx: a sensor electrode.

Detailed Description

The following describes the present invention in detail with reference to examples.

[ example 1 ]

Fig. 1 is a schematic plan view of a liquid crystal display device to which the present invention is applied. In fig. 1, the TFT substrate 100 and the counter substrate 200 are bonded to each other with a sealing material 150, and a display region 90 is formed in a region surrounded by the sealing material 150. The peripheral region including the sealing material 150 is a frame region 95. On the TFT substrate 100, scanning lines 91 extend in the lateral direction (x direction) and are arranged in the longitudinal direction (y direction), video signal lines 92 extend in the longitudinal direction and are arranged in the lateral direction, and pixels 93 are formed in a region surrounded by the scanning lines 91 and the video signal lines 92.

The TFT substrate 100 is formed larger than the counter substrate 200, and a portion where the TFT substrate 100 and the counter substrate 200 do not overlap is a terminal region 160. The terminal area 160 is connected to a flexible printed circuit board 400 for supplying power and signals to the liquid crystal display device.

Fig. 2 is a plan view of the pixel 93 of the TFT substrate 100. Fig. 2 shows a pixel 93 of an IPS liquid crystal display device. In fig. 2, the scanning lines 91 extend in the lateral direction (x direction) and are arranged in the longitudinal direction (y direction). The video signal line 92 extends in the vertical direction, but extends so as to be inclined by phi or-phi with respect to the y direction at a portion where the comb-shaped pixel electrode 113 is formed. The pixel electrode 113 is formed in a region surrounded by the scanning line 91 and the video signal line 92. The pixel electrode 113 is formed of a comb-shaped electrode portion and a contact portion having a through hole 130. A common electrode 111 is formed in a planar shape on the lower layer side of the pixel electrode 113 with a capacitor insulating film interposed therebetween.

The pixel electrode 113 is formed so as to be inclined by θ with respect to the y direction, similarly to the video signal line 92. The orientation direction (AL) of the orientation film is the y direction. Thus, when a signal voltage is applied to the pixel electrode 113, the rotation direction of the liquid crystal is restricted, and the generation of a domain is prevented. A semiconductor layer 102 is formed below the video signal lines 92 and the scanning lines 91 with an insulating film interposed therebetween. The TFT is formed when the semiconductor layer 102 passes under the scanning line 91. In this case, the scanning line 91 functions as a gate electrode. Thus, the TFTs in fig. 2 are formed in two.

In fig. 2, the semiconductor layer 102 is connected to the video signal line 92 through the via 120, and is connected to the source electrode 107 through the via 125. The source electrode 107 is connected to the pixel electrode 113 in the via hole 130.

Fig. 3 is a sectional view a-a of fig. 2. In fig. 3, a base film 101 is formed on a TFT substrate 100 formed of glass. The base film 101 is generally a laminated structure of an SiO film and an SiN film. This is to prevent impurities from the TFT substrate 100 from contaminating the semiconductor layer 102.

In fig. 2, a semiconductor layer 102 is formed over a base film 101. The semiconductor layer 102 is a layer in which an a-Si film formed by CVD is converted into polycrystalline silicon by an excimer laser. The SiO film, SiN film, and a-Si film converted to polycrystalline silicon constituting the base film 101 are formed by CVD continuously while changing the raw material. A gate insulating film 103 is formed so as to cover the semiconductor layer 102. The gate insulating film 103 is an SiO film formed by CVD using TEOS (tetraethyl orthosilicate) as a raw material.

In fig. 3, a gate electrode 104, i.e., a scanning line 91, is formed on a gate insulating film 103. The interlayer insulating film 104 is formed of, for example, SiN so as to cover the gate electrode 104. On the interlayer insulating film 104, a video signal line 92 serving as a drain electrode 106 and a source electrode 107 connected to a pixel electrode 113 are formed. The video signal line 92 (drain electrode 106) and the source electrode 107 are formed simultaneously, and have a laminated structure of titanium (Ti) -aluminum (Al) -titanium (Ti), for example.

The first organic passivation film 108 is formed of an acrylic resin so as to cover the video signal lines 92 (drain electrodes 107) and the source electrodes 107. The acrylic resin is formed of, for example, a photosensitive positive resist. A common wiring 109 for inputting a common voltage or a touch sensor signal to the common electrode or an electrode which becomes an Rx electrode of the touch sensor is formed on the first organic passivation film 108. The common wiring 109 is formed of a laminated film of molybdenum (Mo) -aluminum (Al) -molybdenum (Mo), for example. In order to reduce the parasitic capacitance between the video signal lines 92 and the common wiring 109, the first organic passivation film 108 is formed thick to be 2.5 μm.

A via hole 131 is formed in the first organic passivation film 108, and the pixel electrode 113 formed later can be electrically connected to the source electrode 107. Inside the through hole 131, the first base 131 is formed using the same material and the same process as those of the common wiring 109, and connection between the source electrode 107 and the pixel electrode 113 is secured. The common wiring 109 is insulated from the first base 1091.

The second organic passivation film 110 is formed of, for example, acrylic resin in such a manner as to cover the common wiring 109 and the first organic passivation film 108. The acrylic resin is also formed of, for example, a photosensitive positive resist. A common electrode 111 is formed of ITO over the second organic passivation film 110. In addition, the common electrode 111 is a sensor electrode Rx of the touch sensor while the liquid crystal display device is operated as the touch sensor. When the common electrode 111 is caused to function as the sensor electrode Rx of the touch sensor, the sensor electrode Rx is formed over the entire common electrode 111 of a plurality of pixels. The second organic passivation film 110 is formed thick to be about 1.5 μm in order to reduce parasitic capacitance between the common electrode 111 or the common line 109 and the video signal line 92. Further, according to such a configuration, the acrylic resin having a total thickness of about 4 μm of the first organic passivation film 108 having a thickness of 2.5 μm and the second organic passivation film 110 having a thickness of 1.5 μm is present between the common electrode 111 and the video signal line 92, and the capacitances of the video signal line 92 and the common electrode 111 can be reduced.

A through hole 132 is formed in the second passivation film 110, and the pixel electrode 113 formed later can be electrically connected to the source electrode 107. Inside the through hole 132, a second base 1111 is formed of the same material and by the same process as the common electrode 111, thereby securing the connection between the source electrode 107 and the pixel electrode 113. In addition, the common electrode 111 is insulated from the second mount 1111.

A capacitor insulating film 112 is formed so as to cover the common electrode 111 and the like. The thickness of the capacitor insulating film 112 is about 75nm to 120 nm. In order to increase the holding capacitance between the common electrode 111 and the pixel electrode 113, the capacitor insulating film 112 is formed thin.

A pixel electrode 113 is formed so as to cover the capacitor insulating film 112. The shape of the pixel electrode 113 is shown in fig. 2. The pixel electrode 113 is formed of ITO and has a thickness of, for example, about 50 to 100 nm. The pixel electrode 113 extends into the via hole 130(131, 132) and is connected to the source electrode 107. In addition, the first base 1091 and the second base 1111 are present in the through hole 130, and the connection between the source electrode 107 and the pixel electrode 113 is secured.

An alignment film 114 is formed so as to cover the pixel electrode 113. As the alignment film 114, an alignment film obtained by performing alignment treatment by wiping or a photo-alignment film obtained by performing alignment treatment by polarized ultraviolet rays can be used. In the case of the IPS method, since a pretilt angle is not required, it is suitable for photo-alignment treatment.

When a video signal is applied to the pixel electrode 113, as shown in fig. 3, electromagnetic lines of force are generated through the liquid crystal layer 300, and thereby the liquid crystal molecules 301 rotate, and the light transmittance of the liquid crystal layer 300 can be controlled. Since the amount of light transmitted through the liquid crystal layer 300 from the backlight is different in each pixel 113, an image is formed.

In fig. 3, a counter substrate 200 is disposed to face the TFT substrate 100 with a liquid crystal layer 300 interposed therebetween. A color filter 201 and a black matrix 202 are formed on the opposite substrate 200. The color filter 201 corresponds to the pixel electrode 113, is formed in the transmissive region of the pixel, and can form a color image. On the other hand, the via hole 130 portion and the TFT portion are covered with the black matrix 202 to maintain the contrast of the image.

A protective film 203 is formed so as to cover the color filter 201 and the black matrix 202. The protective film 203 prevents the pigment of the color filter 201 from precipitating in the liquid crystal layer 300 and smoothes the surface. An alignment film 204 is formed so as to cover the protective film 203. The alignment treatment of the alignment film 204 is the same as that of the alignment film 114 on the TFT substrate 100 side.

Fig. 4 is a plan view showing a structure of a touch sensor incorporated in the liquid crystal display device shown in fig. 3. A self capacitance system and a mutual capacitance system exist in the touch sensor. Since the self-capacitance method detects capacitance changes of the fingertip and the electrode of a person, the electrode at each detection position may be 1 Rx electrode. The mutual capacitance method generates an electric field between 2 electrodes, and detects a change in the electric field generated by a human fingertip touch. Since 2 electrodes are required at each detection position, the number of wiring lines increases. Fig. 4 is a schematic plan view showing a touch sensor system of a self-capacitance system.

In fig. 4, the sensor electrodes Rx are arranged in the lateral and longitudinal directions within the display area 90 surrounded by the sealing material 150. For each sensor electrode Rx, a voltage is supplied from the common wiring 109 extending to the terminal area 160. Rx in fig. 4 is a sensor electrode for detecting a touch position at each detection position, and is composed of a common electrode shown in fig. 2 and 3 for a plurality of pixels. In fig. 4, Rx is shown in 3 in the transverse direction (x direction) and 5 in the longitudinal direction (y direction), which is schematically shown in order not to complicate the drawing, and in an actual product, there are 60 to 70 sensor electrodes Rx in the transverse direction and 60 to 70 sensor electrodes Rx in the longitudinal direction, for example, in the display area 90.

Fig. 5 is a diagram showing an operation of the liquid crystal display device with a touch sensor. In fig. 5, the 1-frame period Tf is divided into an image display period Td and a touch sensing period Ts. In the image display period Td, a common voltage is supplied to the common electrode 111 via the common line 109. On the other hand, during touch sensing, a sensing voltage is supplied via the common wiring 109. The image display period Td and the touch sensing period are switched by a driver IC disposed in the flexible wiring circuit board 400 of fig. 1.

Fig. 6 is a sectional view B-B of fig. 2. The layer structure of fig. 6 is the same as the layer structure described in fig. 3. In fig. 6, a base film 101 is formed over a TFT substrate 100, a gate insulating film 103 is formed thereover, and an interlayer insulating film 105 is formed thereover. The video signal line 92 is formed on the interlayer insulating film 105, and a first organic passivation film 108 is formed so as to cover the video signal line 92. The common line 109 is formed on the first organic passivation film 108, and a second organic passivation film 110 is formed so as to cover the common line 109.

A common electrode 111 also functioning as a sensor electrode Rx is formed of ITO on the second organic passivation film 110. A capacitor insulating film 112 is formed over the common electrode 111, and a pixel electrode 113 is formed thereon. An alignment film 114 is formed so as to cover the pixel electrode 13. The structure of each electrode and each insulating film is illustrated in fig. 3.

In fig. 6, a counter substrate 200 is formed with a liquid crystal layer 300 interposed therebetween, and a color filter 201 and a black matrix 202 are formed on the counter substrate 200. The color filter 201 is formed at a position corresponding to the pixel electrode 113, and the black matrix 202 is formed at a portion corresponding to the common wiring 109 and the video signal line 92. A protective film 203 is formed so as to cover the color filter 201 and the black matrix 202, and an alignment film 204 is formed so as to cover the protective film 203.

Fig. 7 is a plan view of a pixel portion showing a problem to be solved by the present invention. The structure of fig. 7 is the same as that illustrated in fig. 2. Fig. 7 is different from fig. 2 in that a cavity 500 is formed between the common electrode 111 and the capacitor insulating film 112 on which the pixel electrode 113 is formed in a portion on which the pixel electrode 113 is formed. That is, the capacitor insulating film 112 expands.

Fig. 8 is a cross-sectional view C-C of fig. 7. In fig. 8, the common electrode 111 or the sensor electrode Rx (hereinafter, represented by the common electrode) is peeled off from the capacitance insulating film 112, and a cavity 500 is generated between the common electrode 111 and the capacitance insulating film 112. When such expansion occurs in the capacitor insulating film 112, an electric field formed between the pixel electrode 113 and the common electrode 111 and passing through the liquid crystal layer 300 changes, and thus, an image signal cannot be reproduced reliably. Further, since the holding capacitance formed between the pixel electrode 113 and the common electrode 111 is reduced and the pixel electrode cannot hold the signal voltage for a predetermined period, flicker is generated. The expansion shown in fig. 8 is caused by moisture penetrating the first organic passivation film 108 or the second organic passivation film 110 from the outside.

Fig. 9 is a plan view of the TFT substrate 111 for explaining penetration of moisture from the outside. In fig. 9, the periphery of the display region 90 is a frame region 95. The terminal region 160 is formed outside the frame region 95. In the frame region 95, the first organic passivation film 108 and the second organic passivation film 110 extend to the end portions, and thus moisture enters from the side walls of these organic passivation films. W in fig. 9 represents moisture. Moisture enters the corner portion from the 2-side, and therefore, the corner portion is particularly susceptible to moisture.

Fig. 10 is a cross-sectional view taken along line D-D of fig. 9. In fig. 10, a region 95 is a frame region, and a region 90 is a display region. The basic structure of the layer structure of the bezel region 95 is the same as the layer structure of the display region 90 illustrated in fig. 3. In fig. 10, a base film 101 is formed over a TFT substrate 100, and a gate insulating film 103 is formed thereover. The scanning line 91 is formed on the gate insulating film 103 in the display region 90, and the lead line 115 is formed in the frame region 95. Further, a light shielding film 116 for shielding light from a groove 2021 formed in the black matrix 202, which will be described later, is also formed over the gate insulating film 103. The interlayer insulating film 105 is formed so as to cover the lead lines 115 and the like. On the interlayer insulating film 105, the video signal lines 92 and the like are formed in the display region 90, and lead lines are also formed in the same layer as the video signal lines 92 in the frame region 95, and are omitted in fig. 10.

In fig. 10, a first organic passivation film 108 is formed over the interlayer insulating film 105, and a second organic passivation film 110 is formed thereon. As for the structures of the first organic passivation film 108 and the second organic passivation film 110, as illustrated in fig. 3. The first organic passivation film 108 and the second organic passivation film 110 are formed up to the end portion on the TFT substrate 100 side, and thus moisture enters the inside from the end surface.

In order to prevent the moisture from entering the vicinity of the liquid crystal layer, the first organic passivation film 108 and the second organic passivation film 110 are partitioned by the groove-like through hole 140. Further, the first organic passivation film 108 and the second organic passivation film 110 are covered with the capacitor insulating film 112 made of SiN, which is impermeable to moisture, up to the inner wall of the groove-like through hole 140, thereby preventing moisture from entering the display region 90. An alignment film 114 is formed so as to cover the capacitor insulating film 112.

In fig. 10, the liquid crystal layer 300 is sandwiched between the TFT substrate 100 side and the counter substrate 200 side, and the TFT substrate 100 side and the counter substrate 200 side are bonded by the sealing material 150. On the counter substrate 200 side, a black matrix 202 is formed in the frame region 95, and a color filter 201 is formed on the display region 90 side. Since the black matrix 202 is formed of resin and the black matrix 202 is formed to the end of the counter substrate 200, moisture may enter from the outside through the black matrix 202. In order to block the moisture penetration path, a black matrix groove 2021 is formed so as to surround the display region 90. Since the portion of the black matrix groove 2021 can transmit the backlight, the light shielding film 116 is formed on the TFT substrate 100 side to shield light.

In the display region 90, the color filter 201 is formed to overlap with an end portion of the black matrix 202. In the frame region 95, a color filter base 2011 is also formed in a partial island shape. The color filter base 2011 is used to adjust the height of the column spacer 250. A protective film 203 is formed so as to cover the color filter 201 and the black matrix 202. An alignment film 204 is formed over the protective film 203.

Further, on the protective film 203, there are formed: a first columnar spacer 250 for defining a space between the TFT substrate 100 and the counter substrate 200 in a normal state; and a second column spacer 260 for defining a space between the TFT substrate 100 and the opposite substrate 200 in a case where the opposite substrate 200 receives a pressing force. That is, the first columnar spacer 250 is in contact with the TFT substrate 200 side in the normal state, and the second columnar spacer 260 is not in contact with the TFT substrate 100 side.

The first columnar spacer 250 is formed on the color filter base 2011, and therefore, even if the first columnar spacer 250 and the second columnar spacer 260 are formed at the same height, the first columnar spacer 250 can be configured to be in contact with the TFT substrate 100 side, and the second columnar spacer 260 can be configured not to be in contact with the TFT substrate 100 side.

Further, on the protective film 203, the wall spacers 270 are formed on the end portions of the counter substrate 200 from the same material as the first and

second column spacers

250 and 260, which facilitates the step of separating the liquid crystal display panel from the mother substrate by scribing. A color filter base 2011 is also formed on the wall-like spacer 270.

As shown in fig. 10, since the end portions of the first organic passivation film 108 and the second organic passivation film 110 are exposed to the outside air, moisture enters the inside from these portions. Since the total thickness of the first organic passivation film 108 and the second organic passivation film 110 is about 4 μm, a large amount of moisture easily enters. In order to block the moisture penetration path, a groove-like through hole 140 is formed in the first organic passivation film 108 and the second organic passivation film 110, and the inner walls of the groove-like through hole 140 and the first organic passivation film 108 and the second organic passivation film 110 are covered with a capacitor insulating film 112 made of SiN.

However, if a defect occurs in the capacitor insulating film 112 in the through-hole 140 or the like, moisture may penetrate through the defect and reach the vicinity of the liquid crystal layer 300 in the display region 90. Fig. 11 is a cross-sectional view showing a case where moisture from the outside reaches the frame region 95 and the display region 90. Although the first organic passivation film 108 is omitted in fig. 11, moisture also penetrates through the first organic passivation film 108. In fig. 11, the capacitor insulating film 112 is formed on the second organic passivation film 110 in the frame region 95. In the structure of the frame region 95 shown on the left side of fig. 11, the adhesion between the second organic passivation film 110 and the capacitor insulating film 112 is strong, and film peeling between the second organic passivation film 110 and the capacitor insulating film 112 is hard to occur.

On the other hand, in the structure of the display region 90 in the right-hand drawing of fig. 11, there is a common electrode 111 formed of ITO over the second organic passivation film 110, and there is a capacitance insulating film 112 formed of SiN over it, and there is a pixel electrode 113 formed of ITO over it. Hereinafter, ITO forming the common electrode 111 is also referred to as a first ITO film 10, and ITO forming the pixel electrode 113 is also referred to as a second ITO film 20.

In the right-hand drawing of fig. 11, moisture that has entered the second organic passivation film 110 permeates the common electrode 111. The adhesion between the common electrode 111 and the capacitor insulating film 112 is weak. Therefore, peeling is easily caused by the presence of moisture, and the cavity 500 is generated. It is assumed that even if the cavity 500 is generated in the frame region 95, no defect is immediately caused. However, when generated in the display area 90, the product immediately causes a failure.

Fig. 12 is a plan view showing the structure of the TFT substrate 100 according to example 1 of the present invention. Fig. 12 is different from fig. 9 in that the first ITO film 10 having an island shape is present in the frame region 95. In fig. 12, w represents moisture from the outside, as in fig. 9.

Fig. 13 is a cross-sectional view E-E of fig. 12. Fig. 13 is different from fig. 10 in that a first ITO film 10 formed by the same process as that of the common electrode 111 is present between the second organic passivation film 110 and the capacitor insulating film 112 formed of SiN in the frame region 95. That is, the laminated structure of the second organic passivation film 110, the first ITO film 10, and the capacitor insulating film 112 is the same in the frame region 95 and the display region 90. The other structure of fig. 13 is the same as fig. 10.

Fig. 14 is a schematic cross-sectional view showing the operation of example 1 of the present invention. The left drawing in fig. 14 is a sectional view of the frame region 95, and the right drawing is a sectional view of the display region 90. In the frame region 95 shown in the left side of fig. 14, moisture w from the outside permeates into the second organic passivation film 110. Moisture is transmitted through the first ITO film 10. The adhesion between the first ITO film 10 and the capacitor insulating film 112 is not strong. In this way, the capacitor insulating film 112 is peeled off from the first ITO film 10 by the presence of moisture, and the cavity 500 is generated in the frame region.

On the other hand, the cross-sectional structure of the display region 90 shown in the right-hand drawing of fig. 14 is the same as that of fig. 11. Fig. 14 is different from fig. 11 in that a part of moisture that has penetrated from the outside is blocked by the frame region 95, and the amount of moisture that has penetrated into the display region 90 can be reduced. The moisture enclosed by the border area 95 expands in the border area 95 but this does not immediately result in a poor product.

Therefore, in the configuration of fig. 14, the moisture permeating into the display region 90 decreases, and the time until the display region 90 swells increases. If the time until the display area 90 expands is longer than the expected product life, no problem will occur.

Fig. 15 shows an example of the shape of the first ITO film 10 formed in the frame region 95. In FIG. 15, the pattern of the first ITO film 10 is, for example, a square having a diameter s1 of 10 μm, and the pattern-to-pattern interval d1 is, for example, 2.5 μm. The first ITO film 10 in fig. 15 is not necessarily square. In FIG. 15, s1 and s2 may be different, and d1 and d2 may be different. In any case, d1 < s1, d2 < s2, more preferably d1 < s1/2, and d2 < s 2/2.

In fig. 15, each ITO film 10 may be electrically floating. In order to maintain the sealing effect, each ITO film 10 may be connected to the common wiring 109 in the lower layer through a through hole by connecting the ITO film to the plane, or each ITO film 10 may be connected to the common wiring 109 through a through hole.

[ example 2 ]

Fig. 16 is a plan view showing a TFT substrate 100 according to a second embodiment of the present invention. Fig. 16 is different from fig. 12 showing example 1 in that the first ITO film 10 formed in the frame region 95 is formed so as to continuously surround the display region 90 in a band shape. Since the first ITO film 10 in fig. 10 also functions as a shield electrode, a ground voltage or a common voltage is applied thereto.

Fig. 17 is a sectional view F-F of fig. 16. Fig. 17 is different from fig. 13 of embodiment 1 in that the first ITO film 10 is continuously formed in the frame region 95, and the first ITO film 10 is connected to a ground potential or a common potential. This can shield the scanning signal applied to the lead-out line 115, for example. The other structure is the same as fig. 13.

Fig. 18 is a schematic cross-sectional view showing the operation of the present embodiment. Fig. 14 is the same as fig. 14 except that the first ITO film 10 is continuously formed in the frame region 95. That is, in the frame region 95, by blocking part of the moisture that has passed through the first organic passivation film 108 and the second organic passivation film 110, the time until peeling occurs between the common electrode 111 and the capacitor insulating film 112 in the display region 90 can be increased, and the product life can be extended.

[ example 3 ]

Fig. 19 is a sectional view showing embodiment 3 of the present invention. Fig. 19 is a sectional view of the section F-F in fig. 16 corresponding to example 2. Fig. 19 is different from fig. 17 in that a second ITO film 20 is formed on the capacitor insulating film 112 in the frame region 95. The presence of the second ITO film 20 can improve the adhesion between the alignment film 114 and the underlying film. That is, the adhesion strength of the alignment film 114 to the ITO film is larger than the adhesion strength of the alignment film 114 to the capacitor insulating film 112.

In fig. 19, the second ITO film 20 is continuously formed in substantially the same range as the first ITO film 10. The second ITO film 20 is also connected to a ground potential or a common potential, and has a shielding effect. In the configuration of fig. 19, since shielding is performed by both the first ITO film 10 and the second ITO film 20, the shielding effect is high.

Fig. 20 is a schematic cross-sectional view showing the effect of the present invention in example 3. A part of the moisture passing through the first organic passivation film 108 and the second organic passivation film 110 is confined in the frame region 95, and in the frame region 95, swelling occurs between the first ITO film 10 and the capacitor insulating film 112, but accordingly the time until peeling occurs between the common electrode 111 and the capacitor insulating film 112 in the display region 90 can be increased, and the product life can be extended.

In fig. 20, the second ITO film 20 is continuously formed, but as shown in fig. 21, the same effect is obtained when the second ITO film 20 is formed at intervals in the frame region 95. In fig. 20, the first ITO film 10 is continuously formed, but the same effect is obtained when a plurality of island-shaped first ITO films 10 are formed as in example 1.

[ example 4 ]

Examples 1 to 3 are configured to increase the time until swelling occurs in the display region 90 as much as possible when moisture enters the liquid crystal display panel from the end portions of the first organic passivation film 108 and the second organic passivation film 110. Embodiment 4 provides a structure in which moisture is not intruded into the vicinity of the common electrode or the pixel electrode in the liquid crystal display panel.

In the structures of embodiments 1 to 3, since the first organic passivation film 108 and the second organic passivation film 110 are covered by the capacitor insulating film 112, if there is no defect on the capacitor insulating film 112, moisture is confined within the first organic passivation film 108 and the second organic passivation film 110 without causing swelling or the like in the display region 90. However, in practice, defects are generated in the capacitor insulating film 112 covering the organic passivation film, and moisture penetrates into the display region and the like from this portion.

Such a defect of the capacitor insulating film 112 is easily generated at the end portions of the first organic passivation film 108 and the second organic passivation film 110 as shown in fig. 22. Fig. 22 is an enlarged cross-sectional view of the vicinity of the groove-like through-holes 140 formed in the first organic passivation film 108 and the second organic passivation film 110 of fig. 10. In fig. 22, the taper angle θ 1 of the end portion of the first organic passivation film 108 and the taper angle θ 2 of the end portion of the second organic passivation film are 45 degrees or more. Thus, if the taper angle is large, in this portion, a crack 1121 or the like is generated in the capacitor insulating film 112 covering the first organic passivation film 108 and the second organic passivation film 110. Then, moisture penetrates from the crack 1121 toward the liquid crystal layer 300. Further, the taper angles θ 1, θ 2, and the like are defined by a wiring on a central portion of the through-hole inner wall in the thickness direction.

In order to prevent such a defect of the capacitor insulating film 112 covering the first organic passivation film 108 and the second organic passivation film 110, the taper angles of the first organic passivation film 108 and the second organic passivation film 110 may be reduced. Fig. 23 is a sectional view showing this example. In fig. 23, through holes are formed on the first organic passivation film 108 and the second organic passivation film 110 using a half etching technique. That is, the groove-like through hole 140 is opened by two-stage exposure. Alternatively, a step portion may be formed on the inner wall of the groove-like through hole of the first organic passivation film 108 and the second organic passivation film 110.

By forming the inner wall of the groove-like through hole 140 in two stages, the inner wall can be smoothly formed, and the taper angles θ 3 and θ 4 of the wall can be reduced. In fig. 23, for example, the taper angles θ 3 and θ 4 of the wall may be limited to 40 degrees or less. Therefore, the cracks 1121 and the like of the capacitor insulating film 112 at the end portions of the groove-like through-holes 140 can be prevented. This can prevent moisture from penetrating into the display region, particularly in the vicinity of the common electrode 111 and the pixel electrode 113, and can prevent peeling or swelling of the film in the display region 90. Further, the taper angles θ 3, θ 4, and the like are defined by wirings on the central portions of the corresponding through-hole inner walls in the thickness direction.

FIG. 24 is a sectional view showing a combination of the structure of example 4 and examples 1 to 3. In fig. 24, the inner walls of the groove-like through holes 140 formed in the first organic passivation film 108 and the second organic passivation film 110 are formed in a two-stage structure by half etching. Therefore, defects such as cracks are not easily generated in the capacitor insulating film 112. However, it is difficult to completely suppress the defect of the capacitor insulating film 112.

Therefore, in fig. 24, by forming the first ITO film 10 on the first organic passivation film 108 and the second organic passivation film 110 on the display region side of the groove-like through hole 140, the time until the expansion occurs in the display region 90 can be increased, and the product life can be extended, according to the effects described in embodiments 1 to 3.

In fig. 22 to 24, the organic passivation film is composed of the first organic passivation film 108 and the second organic passivation film 110, but similar effects can be obtained by forming the inner wall of the groove-like through hole 140 in a two-stage structure by half etching, as in the case where the organic passivation film is formed of only 1 layer.

Claims

1. A liquid crystal display device having a TFT substrate and an opposing substrate arranged to face the TFT substrate, the TFT substrate having a display region and a frame region, and a liquid crystal sandwiched between the TFT substrate and the opposing substrate, the liquid crystal display device characterized in that:

an organic passivation film is formed on the frame region of the TFT substrate, a plurality of first transparent conductive films are formed on the organic passivation film in an island-like floating state in contact with the organic passivation film,

an inorganic insulating film is formed so as to cover the first transparent conductive film.

2. The liquid crystal display device according to claim 1, wherein:

a second transparent conductive film is formed over the inorganic insulating film.

3. The liquid crystal display device according to claim 1, wherein:

the first transparent conductive film is continuously formed so as to surround the display region in a plan view.

4. The liquid crystal display device according to claim 2, wherein:

an alignment film is formed over the second transparent conductive film.

5. The liquid crystal display device according to claim 2, wherein:

a plurality of second transparent conductive films are formed in an island shape in a plan view.

6. The liquid crystal display device according to claim 2, wherein:

the second transparent conductive film is continuously formed so as to surround the display region in a plan view.

7. The liquid crystal display device according to claim 6, wherein:

the second transparent conductive film is applied with a common voltage.

8. The liquid crystal display device according to claim 7, wherein:

the first transparent conductive film and the second transparent conductive film are connected via a through hole.

9. The liquid crystal display device according to claim 2, wherein:

the first transparent conductive film and the common electrode in the display region are present in the same layer, and the second transparent conductive film and the pixel electrode in the display region are present in the same layer.

10. The liquid crystal display device according to claim 1, wherein:

the organic passivation film is a double-layer structure of a first organic passivation film and a second organic passivation film.

11. The liquid crystal display device according to claim 10, wherein:

a common electrode in the display region is formed over the second organic passivation film,

a common wiring connected to a common electrode in the display region is formed between the first organic passivation film and the second organic passivation film.