CN210405117U - Rectifier bridge circuit - Google Patents
Rectifier bridge circuit Download PDFInfo
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- CN210405117U CN210405117U CN201921310294.2U CN201921310294U CN210405117U CN 210405117 U CN210405117 U CN 210405117U CN 201921310294 U CN201921310294 U CN 201921310294U CN 210405117 U CN210405117 U CN 210405117U
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Abstract
The utility model provides a rectifier bridge circuit, include: first MOS pipe, second MOS pipe, third MOS pipe, fourth MOS pipe, first drive signal circuit, second drive signal circuit, the first end of first MOS pipe with the first end of second MOS pipe links to each other as the first end of rectification back power, the second end of third MOS pipe with the second end of fourth MOS pipe links to each other as the second end of rectification back power, the first end of fourth MOS pipe with the second end of second MOS pipe links to each other and is connected to the first end of alternating current, the first end of third MOS pipe with the second end of first MOS pipe links to each other and is connected to the second end of alternating current. The utility model discloses rectifier bridge circuit uses the MOS pipe as rectifier bridge, and the MOS pipe is the one-way device that switches on, and the on-resistance is less, can be far less than ordinary diode in the forward voltage drop under the condition of the same electric current of flowing through, so reduced the power consumption, improved efficiency, also reduced the radiator size of rectifier bridge installation simultaneously and can save even.
Description
Technical Field
The utility model belongs to the technical field of the switching power supply of AC input type, especially, relate to a rectifier bridge circuit.
Background
The existing commonly used rectification mode is that diode rectification is adopted, for example, fig. 1 shows a single-phase rectifier bridge circuit adopting 4 diodes, the rectifier bridge circuit is characterized in that the circuit is simple and low in cost, but the main disadvantage of the circuit is that the voltage drop of the diodes is large and the power consumption is high, and if a single diode drops 1V and flows through a diode current 10A, two diodes are conducted in the forward direction at the same time, so that the power consumption of the rectifier bridge is 1V 10A 2 to 20W, the large power consumption not only affects the efficiency but also needs to be installed on a radiator with a large area for heat dissipation, otherwise, the rectifier bridge is easy to overheat and damage.
SUMMERY OF THE UTILITY MODEL
To this problem, the utility model provides a lower rectifier bridge circuit of consumption.
The technical purpose of the utility model is realized by the following technical scheme:
a rectifier bridge circuit, the rectifier bridge circuit comprising: the first end of the first MOS tube is connected with the first end of the second MOS tube to serve as the first end of a rectified power supply, the second end of the third MOS tube is connected with the second end of the fourth MOS tube to serve as the second end of the rectified power supply, the first end of the fourth MOS tube is connected with the second end of the second MOS tube to be connected to the first end of alternating current, the first end of the third MOS tube is connected with the second end of the first MOS tube to be connected to the second end of the alternating current, the third end of the first MOS tube is connected with the first output end of the first driving signal circuit, the third end of the fourth MOS tube is connected with the second output end of the first driving signal circuit, and the third end of the second MOS tube is connected with the first output end of the second driving signal circuit, the third end of the third MOS tube is connected with the second output end of the second driving signal circuit, and the driving signal output by the first driving signal circuit and the driving signal output by the second driving signal circuit are mutually exclusive.
Further, first MOS pipe, second MOS pipe, third MOS pipe, fourth MOS pipe are the NMOS, the first end of first MOS pipe, second MOS pipe, third MOS pipe, fourth MOS pipe is the source electrode, the second end of first MOS pipe, second MOS pipe, third MOS pipe, fourth MOS pipe is the drain electrode, the third end of first MOS pipe, second MOS pipe, third MOS pipe, fourth MOS pipe is the grid, the first end of rectification back power is the power negative terminal, the second end of rectification back power is the power positive terminal, the first end of alternating current is the live wire, the second end of alternating current is the zero line, the power negative terminal also is as ground.
Further, the rectifier bridge circuit further comprises a driving signal generating circuit and a signal inverting circuit, the input end of the driving signal generating circuit is connected with the alternating current, the output end of the driving signal generating circuit is connected with the input end of the first driving signal circuit, and the output end of the driving signal generating circuit is further connected with the input end of the second driving signal circuit through the signal inverting circuit.
Further, the driving signal generating circuit comprises an operational amplifier and a comparator, a first input end of the operational amplifier is connected with a second end of the alternating current through a first resistor, a first input end of the operational amplifier is further connected with an output end of the operational amplifier through a second resistor, a second input end of the operational amplifier is connected with the first end of the alternating current through a third resistor, a second input end of the operational amplifier is further connected with a first input end of the comparator through a fourth resistor and is grounded, an output end of the operational amplifier is connected with a second input end of the comparator, an output end of the comparator is connected with a first working power supply through a fifth resistor and serves as an output end of the driving signal generating circuit, two power supply ends of the operational amplifier are respectively connected with the first working power supply and the fourth working power supply, and two power supply ends of the comparator are respectively connected with the first working power supply and the ground, the first working power supply and the fourth working power supply are two common-ground positive and negative power supplies.
Further, the operational amplifier is a differential operational amplifier, a first input end of the operational amplifier is a reverse input end of the differential operational amplifier, a second input end of the operational amplifier is a forward input end of the differential operational amplifier, a first input end of the comparator is a reverse input end, and a second input end of the comparator is a forward input end.
Further, the first driving signal circuit comprises a first triode, a fourth triode and a first optocoupler, wherein a first end of the first triode is used as an input end of the first driving signal circuit to be connected with an output end of the driving signal generating circuit through a sixth resistor, a second end of the first triode is grounded through a seventh resistor and is used as a first output end of the first driving signal circuit, a third end of the first triode is connected with the first working power supply, a first input end of the first optocoupler is also connected with an input end of the first driving signal circuit through an eighth resistor, a second input end of the first optocoupler is connected with the first working power supply, a first output end of the first optocoupler is connected with a first end of the fourth triode, a second output end of the first optocoupler is connected with a third end of the fourth triode and is connected with a second working power supply, the second end of the fourth triode is connected with the reference ground of the second working power supply through a ninth resistor and serves as the second output end of the first driving signal circuit, and the reference ground of the second working power supply is the first end of the alternating current.
Further, the signal inverting circuit includes a not gate, an input end of the not gate is used as an input end of the signal inverting circuit and connected to an output end of the driving signal generating circuit, two power supply ends of the not gate are respectively connected to the first working power supply and the ground, and an output end of the not gate is used as an output end of the signal inverting circuit.
Further, the second driving signal circuit has the same structure as the first driving signal circuit, the second driving signal circuit comprises a second triode, a third triode and a second optical coupler, the first end of the second triode is used as the input end of the second driving signal circuit to be connected with the output end of the signal inverting circuit through a tenth resistor, the second end of the second triode is grounded through an eleventh resistor and used as the first output end of the second driving signal circuit, the third end of the second triode is connected with the first working power supply, the first input end of the second optical coupler is also connected to the input end of the second driving signal circuit through a twelfth resistor, the second input end of the second optical coupler is connected with the first working power supply, the first output end of the second optical coupler is connected with the first end of the third triode, the second output end of the second optical coupler is connected with the third end of the third triode and connected with the third working power supply And a second end of the third triode is connected with a reference ground of the third working power supply through a thirteenth resistor and is used as a second output end of the second driving signal circuit, and the reference ground of the third working power supply is a second end of the alternating current.
Further, the first end of first triode, second triode, third triode, fourth triode is the base, the second end of first triode, second triode, third triode, fourth triode is the projecting pole, the third end of first triode, second triode, third triode, fourth triode is the collecting electrode, the first input end of first opto-coupler, second opto-coupler is the emitting diode negative pole, the second input end of first opto-coupler, second opto-coupler is the emitting diode positive pole, the first output end of first opto-coupler, second opto-coupler is the projecting pole of phototriode, the second output end of first opto-coupler, second opto-coupler is the collecting electrode of phototriode.
Further, the rectifier bridge circuit further comprises a capacitor, and the capacitor is connected between the first end of the rectified power supply and the second end of the rectified power supply.
The utility model discloses rectifier bridge circuit uses the MOS pipe as rectifier bridge, and the MOS pipe is the one-way device that switches on, and the on-resistance is less, can be far less than ordinary diode in the forward voltage drop under the condition of the same electric current of flowing through, so reduced the power consumption, improved efficiency, also reduced the radiator size of rectifier bridge installation simultaneously and can save even.
Drawings
FIG. 1 is a block diagram of a conventional rectifier bridge circuit;
fig. 2 is a block diagram of a rectifier bridge circuit according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a rectifier bridge circuit according to an embodiment of the present invention.
Detailed Description
In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein, as those skilled in the art will be able to make similar modifications without departing from the spirit and scope of the present invention.
It will be understood that when an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only and do not represent the only embodiments.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Referring to fig. 2, a rectifier bridge circuit according to an embodiment of the present invention includes: a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q3, a fourth MOS transistor Q4, a first driving signal circuit 10, and a second driving signal circuit 20, wherein a first end of the first MOS transistor Q1 is connected to a first end of the second MOS transistor Q2 to serve as a first end DC of a rectified power supply, a second end of the third MOS transistor Q3 is connected to a second end of the fourth MOS transistor Q4 to serve as a second end DC of the rectified power supply, a first end of the fourth MOS transistor Q4 is connected to a second end of the second MOS transistor Q2 to be connected to a first end L of an alternating current, a first end of the third MOS transistor Q3 is connected to a second end N of the first MOS transistor Q1 to be connected to a second end of the alternating current, a third end of the first MOS transistor Q1 is connected to a first output end of the first driving signal circuit 10, and a third end of the fourth MOS transistor Q4 is connected to a second output end of the second driving signal circuit 10, a third terminal of the second MOS transistor Q2 is connected to the first output terminal of the second driving signal circuit 20, a third terminal of the third MOS transistor Q3 is connected to the second output terminal of the second driving signal circuit 20, and the driving signal output by the first driving signal circuit 10 and the driving signal output by the second driving signal circuit 20 are mutually exclusive.
The term "the driving signal output by the first driving signal circuit 10 and the driving signal output by the second driving signal circuit 20 are mutually exclusive, means that when the driving signal output by the first driving signal circuit 10 is at a high level, the driving signal output by the second driving signal circuit 20 is at a low level, and when the driving signal output by the first driving signal circuit 10 is at a low level, the driving signal output by the second driving signal circuit 20 is at a high level, so that the second MOS transistor Q2 and the third MOS transistor Q3 are inevitably turned off when the first MOS transistor Q1 and the fourth MOS transistor Q4 are turned on, and conversely, the second MOS transistor Q2 and the third MOS transistor Q3 are inevitably turned on when the first MOS transistor Q1 and the fourth MOS transistor Q4 are turned off.
In a specific embodiment, the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, and the fourth MOS transistor Q4 are all NMOS, the first ends of the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, and the fourth MOS transistor Q4 are all sources, the second ends of the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, and the fourth MOS transistor Q4 are drains, the third ends of the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, and the fourth MOS transistor Q4 are gates, the first end DC-of the rectified power supply is a negative power supply terminal, the second end DC + of the rectified power supply is a positive power supply terminal, the first end L of the alternating current is a live wire, the second end N of the alternating current is a zero wire, and the negative power supply terminal is also used as ground GND 1.
Referring to fig. 3, the rectifier bridge circuit further includes a driving signal generating circuit 30 and a signal inverting circuit 40, an input end of the driving signal generating circuit 30 is connected to the alternating current, an output end 30 of the driving signal generating circuit is connected to an input end of the first driving signal circuit 10, and an output end of the driving signal generating circuit 30 is further connected to an input end of the second driving signal circuit 20 through the signal inverting circuit 40.
Wherein, the driving signal generating circuit 30 includes an operational amplifier U1 and a comparator U2, a first input terminal of the operational amplifier U1 is connected to the second terminal N of the alternating current through a first resistor R1, a first input terminal of the operational amplifier U1 is further connected to an output terminal of the operational amplifier U1 through a second resistor R2, a second input terminal of the operational amplifier U1 is connected to the first terminal L of the alternating current through a third resistor R3, a second input terminal of the operational amplifier U1 is further connected to a first input terminal of the comparator U2 through a fourth resistor R4 and is grounded GND1, an output terminal of the operational amplifier U1 is connected to a second input terminal of the comparator U2, an output terminal of the comparator U2 is connected to a first operating power supply + VCC1 through a fifth resistor R5 and serves as an output terminal of the driving signal generating circuit 30, two terminals of the operational amplifier U1 are respectively connected to the first operating power supply + VCC-1 and a fourth operating power supply terminal VCC-1, two power ends of the comparator U2 are respectively connected with the first working power supply + VCC1 and the ground GND1, and the first working power supply + VCC1 and the fourth working power supply-VCC are positive and negative power supplies of two common grounds GND 1.
In a specific embodiment, the operational amplifier U1 is a differential operational amplifier, the first input terminal of the operational amplifier U1 is an inverting input terminal of the differential operational amplifier, the second input terminal of the operational amplifier U1 is a forward input terminal of the differential operational amplifier, the first input terminal of the comparator U2 is an inverting input terminal, and the second input terminal of the comparator U2 is a forward input terminal. The operational amplifier U1 down samples the ac power to obtain a signal of a suitable magnitude, which is connected to the positive input terminal and the negative input terminal of the comparator U2 for comparison and then output, the comparator U2 outputs a high level when the first terminal L of the ac power is positive with respect to the second terminal N, and the comparator U2 outputs a low level when the first terminal L of the ac power is negative with respect to the second terminal N.
Further, the first driving signal circuit 10 includes a first triode T1, a fourth triode T4 and a first optocoupler P1, a first end of the first triode T1 is connected to the output end of the driving signal generating circuit 30 as the input end of the first driving signal circuit 10 through a sixth resistor R6, a second end of the first triode T1 is connected to the GND1 through a seventh resistor R7 and is connected to the first output end DR _ G1 of the first driving signal circuit 10, a third end of the first triode T1 is connected to the first operating power supply + VCC1, a first input end of the first optocoupler P1 is also connected to the input end of the first driving signal circuit 10 through an eighth resistor R8, a second input end of the first optocoupler P1 is connected to the first operating power supply + VCC1, a first output end of the first optocoupler P1 is connected to a first end of the fourth triode T4, a second output end of the first optocoupler P1 is connected to the third end of the fourth triode T4 and is connected to the third end of the third optocoupler 4A working power supply + VCC2, a second terminal of the fourth transistor T4 is connected to a ground reference GND2 of the second working power supply through a ninth resistor R9 and serves as a second output terminal DR _ G4 of the first driving signal circuit 10, and a ground reference GND2 of the second working power supply serves as a first terminal L of the alternating current. The first driving signal circuit 10 generates two logically identical but mutually isolated driving signals to drive the first MOS transistor Q1 and the fourth MOS transistor Q4 respectively. An output signal of the comparator U2 is amplified by a first triode T1 and then output to a first output end DR _ G1 to drive a first MOS tube Q1, and an output signal of the comparator U2 is isolated by a first optocoupler P1 and amplified by a fourth triode T4 and then output to a second output end DR _ G4 to drive a fourth MOS tube Q4.
Further, the signal inverting circuit 40 includes a not gate U3, an input terminal of the not gate U3 is connected to an output terminal of the driving signal generating circuit 30 as an input terminal of the signal inverting circuit 40, two power terminals of the not gate U3 are respectively connected to the first operating power supply + VCC1 and the ground GND1, and an output terminal of the not gate U3 is connected to an output terminal of the signal inverting circuit 40. The not gate U3 inverts the output signal of the comparator U2 and then provides it to the second drive signal circuit 20.
Further, the second driving signal circuit 20 has the same structure as the first driving signal circuit 10, the second driving signal circuit 20 includes a second transistor T2, a third transistor T3 and a second optical coupler P2, a first end of the second transistor T2 is connected to the output end of the signal inverting circuit 40 as the input end of the second driving signal circuit 20 through a tenth resistor R10, a second end of the second transistor T2 is connected to the ground GND1 through an eleventh resistor R11 and serves as a first output end DR _ G2 of the second driving signal circuit 20, a third end of the second transistor T2 is connected to the first operating power supply + VCC1, a first input end of the second optical coupler P2 is also connected to the input end of the second driving signal circuit 20 through a twelfth resistor R12, a second input end of the second optical coupler P2 is connected to the first operating power supply + VCC1, and a first output end VCC P2 of the second optical coupler P2 is connected to the third end DR _ G3 of the optical coupler, a second output end of the second optocoupler P2 is connected to a third end of the third transistor T3 and is connected to a third operating power supply + VCC3, a second end of the third transistor T3 is connected to a ground reference GND3 of the third operating power supply through a thirteenth resistor R13 and serves as a second output end DR _ G3 of the second driving signal circuit 20, and a ground reference GND3 of the third operating power supply is a second end N of the alternating current. Similarly, the second driving signal circuit 20 generates two logically identical but isolated driving signals to drive the second MOS transistor Q2 and the third MOS transistor Q3, respectively. An output signal of the not gate U3 is amplified by the second triode T2 and then output to the first output terminal DR _ G2 to drive the second MOS transistor Q2, and an output signal of the not gate U3 is isolated by the second optocoupler P2 and amplified by the third triode T3 and then output to the second output terminal DR _ G3 to drive the third MOS transistor Q3.
In a specific embodiment, first ends of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are bases, second ends of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are emitters, third ends of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are collectors, first input ends of the first optocoupler P1 and the second optocoupler P2 are light emitting diode cathodes, second input ends of the first optocoupler P1 and the second optocoupler P2 are light emitting diode anodes, first output ends of the first optocoupler P1 and the second optocoupler P2 are phototransistors, and second output ends of the first optocoupler P1 and the second optocoupler P2 are phototransistors.
Further, the rectifier bridge circuit further comprises a capacitor C1, and the capacitor C1 is connected between the first end of the rectified power supply and the second end of the rectified power supply, and performs energy storage filtering on the rectified power supply, and then provides the energy storage filtering for a load.
The utility model discloses rectifier bridge circuit's working process as follows:
(1) when the first terminal L of the alternating current is positive relative to the second terminal N, the driving signal generating circuit 30 outputs a high level signal, and the first output terminal DR _ G1 and the second output terminal DR _ G4 of the first driving signal circuit 10 output a high level signal, so that the first MOS transistor Q1 and the fourth MOS transistor Q4 are turned on; meanwhile, a high level signal output by the driving signal generating circuit 30 is inverted by the signal inverting circuit 40 and then is provided to the second driving signal circuit 20, the first output end DR _ G2 and the second output end DR _ G3 of the second driving signal circuit 20 output a low level, so that the second MOS transistor Q2 and the third MOS transistor Q3 are cut off, a current flows from the first end L of the alternating current to the load and capacitor C1 through the fourth MOS transistor Q4, and the current flows from the load and capacitor C1 and returns to the second end N of the alternating current through the first MOS transistor Q1, so that a loop is formed after the current flows through one loop.
(2) When the first terminal L of the alternating current is negative with respect to the second terminal N, the driving signal generating circuit 30 outputs a low level signal, and the first output terminal DR _ G1 and the second output terminal DR _ G4 of the first driving signal circuit 10 output a low level signal, so that the first MOS transistor Q1 and the fourth MOS transistor Q4 are turned off; meanwhile, the low level signal output by the driving signal generating circuit 30 is inverted by the signal inverting circuit 40 and then is provided to the second driving signal circuit 20, the first output end DR _ G2 and the second output end DR _ G3 of the second driving signal circuit 20 output high level, so that the second MOS transistor Q2 and the third MOS transistor Q3 are turned on, the current starts from the second end N of the alternating current and passes through the third MOS transistor Q3 to the load and capacitor C1, the current flows out from the load and capacitor C1 and returns to the first end L of the alternating current through the second MOS transistor Q2, and thus, the current flows through one turn to form a closed loop.
As a specific embodiment, LM2904 is adopted for the operational amplifier U1, LM239DG is adopted for the comparator U2, SN74AHC1G04 is adopted for the not gate U3, FZT651 is adopted for the triodes T1 to T4, N-channel MOS IPW60R041P6 is adopted for the MOS transistors Q1 to Q4, and PC817 is adopted for the opto-coupler, and the specific specification of the device can be comprehensively considered according to factors such as actual circuit power, current magnitude, voltage height, other performance requirements and the like.
The utility model discloses mainly be and solve the high problem of traditional rectifier bridge consumption. The traditional diode rectifier bridge circuit is high in power consumption and severe in heat generation, and in order to reduce the power consumption of the rectifier bridge, the forward voltage drop of a rectifier device or the current flowing through the rectifier device is reduced, the input current cannot be reduced under the condition that the input voltage of load power is certain, so that the reduction of the current flowing through the rectifier device is basically impossible (the reactive current is not considered, the power factor PF is assumed to be 1), and the loss of the rectifier bridge can be reduced only by reducing the forward voltage drop of the rectifier device. The MOS transistor as a unidirectional device has a smaller on-resistance Rdson, and the forward voltage drop can be much lower than that of a common diode under the condition of flowing the same current, which is a good choice, for example, a MOS transistor with Rdson of 50m Ω is selected to form a rectifier bridge, and a current of 10A also flows, the power consumption of which is 10A 10 × 0.05 Ω × 2 of 10W, and the power consumption is significantly reduced compared with that of a common rectifier bridge 20W.
The utility model discloses rectifier bridge circuit uses the MOS pipe as rectifier bridge, and the MOS pipe is the one-way device that switches on, and the on-resistance is less, can be far less than ordinary diode in the forward voltage drop under the condition of the same electric current of flowing through, so reduced the power consumption, improved efficiency, also reduced the radiator size of rectifier bridge installation simultaneously and can save even.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only represent some embodiments of the present invention, and the description thereof is specific and detailed, but not to be construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.
Claims (10)
1. A rectifier bridge circuit, characterized in that the rectifier bridge circuit comprises: the first end of the first MOS tube is connected with the first end of the second MOS tube to serve as the first end of a rectified power supply, the second end of the third MOS tube is connected with the second end of the fourth MOS tube to serve as the second end of the rectified power supply, the first end of the fourth MOS tube is connected with the second end of the second MOS tube to be connected to the first end of alternating current, the first end of the third MOS tube is connected with the second end of the first MOS tube to be connected to the second end of the alternating current, the third end of the first MOS tube is connected with the first output end of the first driving signal circuit, the third end of the fourth MOS tube is connected with the second output end of the first driving signal circuit, and the third end of the second MOS tube is connected with the first output end of the second driving signal circuit, the third end of the third MOS tube is connected with the second output end of the second driving signal circuit, and the driving signal output by the first driving signal circuit and the driving signal output by the second driving signal circuit are mutually exclusive.
2. The rectifier bridge circuit according to claim 1, wherein the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor are NMOS, the first ends of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor are source electrodes, the second ends of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor are drain electrodes, the third ends of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor are gate electrodes, the first end of the rectified power supply is a power supply negative end, the second end of the rectified power supply is a power supply positive end, the first end of the alternating current is a live wire, the second end of the alternating current is a zero wire, and the power supply negative end is also used as a ground.
3. The rectifier bridge circuit according to claim 1, further comprising a driving signal generating circuit and a signal inverting circuit, wherein an input terminal of the driving signal generating circuit is connected to the alternating current, an output terminal of the driving signal generating circuit is connected to an input terminal of the first driving signal circuit, and an output terminal of the driving signal generating circuit is further connected to an input terminal of the second driving signal circuit through the signal inverting circuit.
4. The rectifier bridge circuit according to claim 3, wherein the driving signal generating circuit comprises an operational amplifier and a comparator, a first input terminal of the operational amplifier is connected to the second terminal of the alternating current through a first resistor, the first input terminal of the operational amplifier is further connected to an output terminal of the operational amplifier through a second resistor, the second input terminal of the operational amplifier is connected to the first terminal of the alternating current through a third resistor, the second input terminal of the operational amplifier is further connected to the first input terminal of the comparator through a fourth resistor and grounded, the output terminal of the operational amplifier is connected to the second input terminal of the comparator, the output terminal of the comparator is connected to a first working power supply through a fifth resistor and serves as the output terminal of the driving signal generating circuit, two power supply terminals of the operational amplifier are respectively connected to the first working power supply and the fourth working power supply, and two power supply terminals of the comparator are respectively connected to the first working power supply and the ground, the first working power supply and the fourth working power supply are two common-ground positive and negative power supplies.
5. The rectifier bridge circuit of claim 4, wherein the operational amplifier is a differential operational amplifier, a first input terminal of the operational amplifier is an inverting input terminal of the differential operational amplifier, a second input terminal of the operational amplifier is a forward input terminal of the differential operational amplifier, a first input terminal of the comparator is an inverting input terminal, and a second input terminal of the comparator is a forward input terminal.
6. The rectifier bridge circuit according to claim 4, wherein the first driving signal circuit comprises a first transistor, a fourth transistor and a first optocoupler, a first end of the first transistor is connected to the output end of the driving signal generating circuit as an input end of the first driving signal circuit through a sixth resistor, a second end of the first transistor is grounded through a seventh resistor and is used as a first output end of the first driving signal circuit, a third end of the first transistor is connected to the first operating power source, a first input end of the first optocoupler is also connected to the input end of the first driving signal circuit through an eighth resistor, a second input end of the first optocoupler is connected to the first operating power source, a first output end of the first optocoupler is connected to the first end of the fourth transistor, a second output end of the first optocoupler is connected to the third end of the fourth transistor and is connected to the second operating power source, the second end of the fourth triode is connected with the reference ground of the second working power supply through a ninth resistor and serves as the second output end of the first driving signal circuit, and the reference ground of the second working power supply is the first end of the alternating current.
7. The rectifier bridge circuit according to claim 6, wherein the signal inverting circuit comprises a not gate, an input terminal of the not gate is connected to the output terminal of the driving signal generating circuit as an input terminal of the signal inverting circuit, two power terminals of the not gate are respectively connected to the first operating power supply and the ground, and an output terminal of the not gate is used as an output terminal of the signal inverting circuit.
8. The rectifier bridge circuit according to claim 7, wherein the second driving signal circuit has the same structure as the first driving signal circuit, the second driving signal circuit includes a second transistor, a third transistor and a second optocoupler, a first end of the second transistor is connected to the output end of the signal inverting circuit as the input end of the second driving signal circuit through a tenth resistor, a second end of the second transistor is grounded through an eleventh resistor and serves as the first output end of the second driving signal circuit, a third end of the second transistor is connected to the first operating power supply, a first input end of the second optocoupler is also connected to the input end of the second driving signal circuit through a twelfth resistor, a second input end of the second optocoupler is connected to the first operating power supply, and a first output end of the second optocoupler is connected to the first end of the third transistor, and a second output end of the second optocoupler is connected with a third end of the third triode and is connected with a third working power supply, a second end of the third triode is connected with a reference ground of the third working power supply through a thirteenth resistor and is used as a second output end of the second driving signal circuit, and the reference ground of the third working power supply is a second end of the alternating current.
9. The rectifier bridge circuit according to claim 8, wherein first ends of the first triode, the second triode, the third triode and the fourth triode are bases, second ends of the first triode, the second triode, the third triode and the fourth triode are emitters, third ends of the first triode, the second triode, the third triode and the fourth triode are collectors, first input ends of the first optocoupler and the second optocoupler are light emitting diode cathodes, second input ends of the first optocoupler and the second optocoupler are light emitting diode anodes, first output ends of the first optocoupler and the second optocoupler are emitters of phototransistors, and second output ends of the first optocoupler and the second optocoupler are collectors of phototransistors.
10. The rectifier bridge circuit of claim 1, further comprising a capacitor coupled between the first terminal of the rectified power source and the second terminal of the rectified power source.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110492768A (en) * | 2019-08-13 | 2019-11-22 | 苏州格远电气有限公司 | Rectifier circuit |
| CN112886800A (en) * | 2020-12-31 | 2021-06-01 | 江苏东方四通科技股份有限公司 | Power controller with automatic current-limiting protection function |
-
2019
- 2019-08-13 CN CN201921310294.2U patent/CN210405117U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110492768A (en) * | 2019-08-13 | 2019-11-22 | 苏州格远电气有限公司 | Rectifier circuit |
| CN112886800A (en) * | 2020-12-31 | 2021-06-01 | 江苏东方四通科技股份有限公司 | Power controller with automatic current-limiting protection function |
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