CN210380777U - High speed voltage feedback amplifier with current feedback amplifier characteristics - Google Patents
High speed voltage feedback amplifier with current feedback amplifier characteristics Download PDFInfo
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- CN210380777U CN210380777U CN201921609343.2U CN201921609343U CN210380777U CN 210380777 U CN210380777 U CN 210380777U CN 201921609343 U CN201921609343 U CN 201921609343U CN 210380777 U CN210380777 U CN 210380777U
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Abstract
The utility model discloses a high-speed voltage feedback amplifier with current feedback amplifier characteristic, include: the input stage circuit is provided with a positive input end INP and a negative input end INN and can convert positive and negative voltage signals into current signals; the gain stage circuit is used for carrying out transconductance amplification on the current signal and outputting a voltage signal; the output stage circuit transmits a voltage signal to an output end OUT of the amplifier to increase current driving capability; the input stage circuit includes: a first buffer having a positive input terminal INP as an input terminal; a second buffer having a positive input terminal INN as an input terminal; the two ends of the resistor Re are respectively connected with the first output end of the first buffer and the output end of the second buffer; the utility model discloses have the beneficial effect that satisfies voltage feedback amplifier's external characteristic and current feedback amplifier's high-pressure slew rate characteristic simultaneously.
Description
Technical Field
The utility model relates to a voltage feedback amplifier especially relates to high-speed voltage feedback amplifier.
Background
The operational amplifier can be divided into a current feedback amplifier (CFA, as shown in fig. 1B) and a voltage feedback amplifier (VFA, as shown in fig. 1C) according to the feedback manner. These two structures of operational amplifiers have their own advantages:
the voltage feedback amplifier has the advantages that: the internal structure and the peripheral application circuit are simple, the input zero point and the loop gain can be determined by using the feedback resistor and the input resistor, meanwhile, because the positive input end and the negative input end are of symmetrical differential pair tube structures, the input impedance is large, the common mode characteristic is good, and the chip has good common mode rejection ratio and power supply rejection ratio.
The current feedback amplifier has the advantages that: the internal input stage and the gain stage both adopt a follower structure and a current mirror structure with good high-frequency characteristics, and the bandwidth of the amplifier is not limited by a feedback loop, so that the whole amplifier has the advantages of wide band, good high-frequency characteristics and high slew rate.
The disadvantages of both amplifiers are also evident:
for a voltage feedback amplifier, since the product of the bandwidth and the feedback loop gain is constant, the bandwidth of the amplifier is generally small and the high frequency performance is inferior to that of a current amplifier while ensuring a proper gain. In addition, the capacitance of the differential input node is large, the existence of the internal compensation capacitor is realized, the slew rate of the whole amplifier is small, and the conversion performance is poor when a high-slew-rate large signal is input.
For a current feedback amplifier, the structure of an internal circuit is complex, the parameter setting of a peripheral application circuit is strict, and a proper feedback resistor is determined firstly because the feedback resistor influences the dominant pole and the bandwidth of the amplifier; and then, selecting a proper input resistor, wherein the positive input end and the negative input end are asymmetric, the positive input end is a high-resistance node, the negative input end is a low-resistance node, the loop gain is reduced due to overlarge input resistor, the application range is limited, the input zero frequency is too low due to too small input resistor, the bandwidth is reduced, and the high-frequency characteristic of the amplifier is seriously influenced. Meanwhile, the asymmetric input stage deteriorates the common-mode characteristic of the chip, and the common-mode rejection ratio is generally inferior to that of the voltage feedback amplifier.
SUMMERY OF THE UTILITY MODEL
The utility model discloses not enough according to the above, provide a high-speed voltage feedback amplifier with current feedback amplifier characteristic, under the condition that keeps current feedback amplifier primary structure, changed input stage into voltage feedback amplifier's difference input structure to make feedback signal become voltage by the electric current, under the condition of having sacrificed partly amplifier bandwidth, let the amplifier have voltage feedback amplifier's external characteristic and current feedback amplifier's high-pressure slew rate characteristic simultaneously.
The technical scheme of the utility model is that:
a high speed voltage feedback amplifier having current feedback amplifier characteristics, comprising:
the input stage circuit is provided with a positive input end INP and a negative input end INN and can convert positive and negative voltage signals into current signals;
the gain stage circuit is used for carrying out transconductance amplification on the current signal and outputting a voltage signal;
the output stage circuit transmits a voltage signal to an output end OUT of the amplifier to increase current driving capability; one path of the output end OUT of the amplifier is grounded through an input resistor Ri through a feedback resistor Rf, and the other path of the output end OUT of the amplifier is connected with a negative input end INN of an input stage circuit;
the input stage circuit includes:
a first buffer having a positive input terminal INP as an input terminal;
a second buffer having a positive input terminal INN as an input terminal;
the two ends of the resistor Re are respectively connected with the first output end of the first buffer and the output end of the second buffer;
the gain stage circuit includes:
and the input end of the current mirror is connected with the second output end of the first buffer, the output end of the current mirror is connected with the input end of the output stage circuit, and the second output end of the first buffer is connected with the output end of the second buffer through a resistor Re.
The output stage circuit includes:
the input end of the third buffer is connected with the output end of the current mirror, and the output end of the third buffer is the output end OUT of the output stage circuit;
and two ends of the compensation capacitor Cc are respectively connected with the input end and the output end of the third buffer.
When differential voltage signals are respectively input to the positive input end and the negative input end of the high-speed amplifier, the first buffer and the second buffer transmit two paths of signals with opposite phases and same amplitude to two ends of the resistor Re, and the two paths of signals are converted into a current signal through the resistor Re. The value of the current signal is the difference input voltage to the resistance value of the resistor Re, and the current is output to the gain stage circuit from the other output end of the first buffer. The current mirror is used for carrying out transconductance amplification on a current signal, and the current signal is transferred to the output end of the gain stage circuit in a one-to-one mirror mode and is converted into a voltage signal with larger amplitude at the same time. Since the equivalent resistance of this output terminal node is typically several hundred kilohms to several megaohms, the magnitude of the voltage signal is the current signal multiplied by the node equivalent resistance of the output of the gain stage circuit. The voltage signal passes through the third buffer to the output of the high speed amplifier.
The utility model provides a high-speed voltage feedback amplifier with current feedback amplifier characteristic, its high-speed characteristic is realized like this: by retaining part of the input stage, which is consistent with the traditional current feedback amplifier, and the whole gain stage output stage circuit, the high speed and the broadband of the whole amplifier circuit are realized, namely the main structure of the amplifier is the traditional current feedback amplifier.
The utility model provides a high-speed voltage feedback amplifier with current feedback amplifier characteristic, its voltage feedback characteristic is realized like this: by adopting a symmetrical differential input stage circuit similar to a traditional voltage feedback amplifier and adding some proper bias circuits, the output voltage and current of the amplifier are adjusted according to the received voltage signal of the negative input end, namely the topology of the feedback loop of the amplifier is still voltage feedback.
The utility model discloses have the beneficial effect that satisfies voltage feedback amplifier's external characteristic and current feedback amplifier's high-pressure slew rate characteristic simultaneously.
Drawings
Fig. 1A is a schematic diagram of an operational amplifier.
Fig. 1B is a schematic diagram of a conventional voltage feedback amplifier.
Fig. 1C is a schematic diagram of a conventional current feedback amplifier.
Fig. 2 is a schematic structural diagram of a voltage feedback amplifier with high speed characteristics according to the present invention.
Fig. 3 is an embodiment of the present invention.
Fig. 4 is another embodiment of the present invention.
Detailed Description
The present invention will now be further described with reference to the accompanying drawings:
as shown in the figure, in order to more clearly illustrate the innovative point of the present invention, that is, how to keep the high speed and more accurate high slew rate and high conversion rate characteristic of the current feedback amplifier while the whole feedback mode of the amplifier is voltage feedback, the operational principle of the amplifier with two feedback modes is firstly combined for explanation.
Fig. 1A shows a schematic diagram of the structure of an operational amplifier. As shown in fig. 1A, the amplifier is composed of an input stage circuit 10, a gain stage circuit 20, and an output stage circuit 30. In operation, the peripheral feedback circuit of the amplifier needs to be set as a deep negative feedback loop, so that a feedback resistor Rf and an input resistor Ri are needed.
Fig. 1B shows a schematic diagram of a conventional voltage feedback amplifier. As shown in fig. 1B, an input stage 10 of the conventional voltage feedback amplifier is a strictly symmetric differential pair transistor structure, and amplifies an input voltage signal by a certain multiple and transmits the amplified signal to a gain stage. The gain stage 20 typically employs a common source stage or similar high voltage gain configuration, and the output stage 30 has a variety of configurations that are not described in detail herein. In order to ensure that the amplifier has sufficient phase margin and gain margin, a suitable compensation capacitor Cc is also connected across the input and output terminals of the output stage.
When a positive step signal is input to the input terminal, the voltage signal is instantaneously transmitted to the input terminal of the gain stage, i.e., the front end of the compensation capacitor, and the bias current source of the gain stage quickly charges the compensation capacitor. After the capacitor is charged and discharged, the large step signal is transmitted to the output terminal. The change rate of the instantaneous voltage of the output end is equal to the ratio of the bias current value to the compensation capacitance value, and meanwhile, the bias current is generally dozens to hundreds of microamperes, so the compensation capacitance cannot be overlarge. The charge and discharge process is slowed down due to the fact that the capacitance is too large, the maximum instantaneous change rate of a large signal reaching the output end is directly reduced, and the speed of the amplifier is seriously influenced.
Fig. 1C shows a schematic diagram of a conventional current feedback amplifier. As shown in fig. 1C, the input stage 10 of the current feedback amplifier is asymmetric, and the input voltage signal at the positive input terminal passes through a buffer before reaching the error resistor Re and being converted into a current signal. The gain stage 20 typically employs a current mirror configuration, and this current signal is amplified by the transconductance of the gain stage 20 to the output stage 30. The output stage 30 is similar to the VFA in many ways. Similarly, to ensure that the amplifier has sufficient phase and gain margins, a suitable compensation capacitor Cc is also connected across the input and output terminals of the output stage 30.
Similarly, a positive step signal is input, and after the voltage signal is converted into a step current signal through the error resistor, the current mirror 20 will instantaneously copy the current signal from the input terminal to the output terminal. Since the current mirror 20 is directly supplied with current from the power supply, theoretically, regardless of how large a transient current signal is inputted to the input terminal of the current mirror 20, this current signal can be directly copied one to one and then outputted from the output terminal. The subsequent process is similar to VFA, and the large current directly charges and discharges the compensation capacitor, and then the voltage of the output end is rapidly converted.
It should be noted that, in contrast to the structures of the VFA and CFA gain stages and the input stage, the input stage 10 of the VFA is a common-source differential amplifier, the gain stage 20 is also a common-source amplifier, and there is a parasitic capacitance across the input and output terminals of each stage. This parasitic capacitance translates into a large value that cannot be ignored, due to the miller effect, at the input and output nodes. In contrast, the input stage and the gain stage of the CFA adopt a source follower and a current mirror, and the Miller effect of parasitic capacitance does not exist, so that the high-frequency characteristic and the conversion characteristic are far better than that of the VFA, and the upper limit cut-off frequency is close to the cut-off frequency of a single tube. The compensation capacitance Cc of the CFA is much smaller than that of the VFA.
In summary, it can be seen that the smaller compensation capacitor and the larger charging current without an upper limit, both factors, increase the speed of the CFA amplifier.
As shown in fig. 2, a high speed voltage feedback amplifier having a current feedback amplifier characteristic includes:
the input stage circuit 10 is provided with a positive input end INP and a negative input end INN, and the input stage circuit 10 can convert positive and negative voltage signals into current signals;
a gain stage circuit 20 for performing transconductance amplification on the current signal and outputting a voltage signal;
the output stage circuit 30 transmits a voltage signal to an output end OUT of the amplifier to increase current driving capability, one path of the output end OUT of the amplifier is grounded through an input resistor Ri through a feedback resistor Rf, and the other path of the output end OUT of the amplifier is connected with a negative input end INN of the input stage circuit 10;
the input stage circuit 10 includes:
a first buffer 110 having a positive input terminal INP as an input terminal;
a second buffer 120 having a positive input terminal INN as an input terminal;
a resistor Re having two ends respectively connected to the first output terminal of the first buffer 110 and the output terminal of the second buffer 120;
the first buffer 110 and the second buffer 120 can transfer the differential signal one by one to both ends of the resistor Re and simultaneously convert into a current signal; the value of the current signal is the differential input voltage versus the resistance of the resistor Re.
The gain stage circuit 20 includes:
and an input terminal of the current mirror is connected to the second output terminal of the first buffer 110, an output terminal of the current mirror is connected to the input terminal of the output stage circuit 30, and the second output terminal of the first buffer 110 is connected to the output terminal of the second buffer 120 via the resistor Re.
The current mirror is used for transconductance amplification of a current signal, the current mirror can transmit the current signal to the output end of the gain stage circuit in a one-to-one mirror mode, and meanwhile, the current signal can be converted into a voltage signal at the output end of the gain stage circuit, the voltage signal is the current signal multiplied by equivalent resistance of the output end of the gain stage circuit, and the equivalent resistance is hundreds of kiloohms to several megaohms.
The output stage circuit 30 includes:
an input end of the third buffer 310 is connected to the output end of the current mirror, and an output end of the third buffer 310 is an output end OUT of the output stage circuit 30;
and a compensation capacitor Cc having two ends respectively connected to the input end and the output end of the third buffer 310.
The characteristic of the buffer is that the voltage gain is close to 1, and the buffer has a large input resistance and a small output resistance, and plays a role in isolation on two nodes of input and output. From the negative terminal of the error resistor Re through the second buffer 120, looking into the negative input terminal of the amplifier, the input signal amplitude at the negative input terminal is almost unchanged, and the equivalent node resistance is still close to the original low resistance point. The circuit topology of the error resistor to the output stage is consistent with that of the current feedback amplifier. Therefore, the present invention provides a high speed amplifier having the good characteristics of high speed, wide band of the conventional CFA operational amplifier.
The equivalent input resistance, which is the same as the positive input terminal, from the negative input terminal of the amplifier through the second buffer 120 to the negative terminal of the error resistor Re, is close to the gate-source resistance of the MOS fet, typically several mega-ohms or more. Therefore, the two input ports have good symmetry similar to differential input, and the input resistance of the positive end and the negative end is a large value, so that the common-mode characteristic of the chip is greatly improved.
It can be seen from fig. 1C and fig. 2 that the negative feedback signal of fig. 2 is the voltage of the negative input terminal, and the negative feedback signal of fig. 1C is the current of the negative input terminal, i.e. the utility model discloses a mixed structure's negative feedback signal has become the voltage again, and the whole feedback mode is voltage feedback, therefore has the simple easy-to-use advantage of all voltage feedback amplifiers in the application, does not need too to limit the value range of feedback resistance and input resistance.
To sum up, fig. 2 is shown the utility model provides a high speed amplifier has current feedback amplifier's high-pressure slew rate good characteristic, and the special construction of input stage lets whole feedback mode and port characteristic be close voltage feedback amplifier simultaneously, and the common mode characteristic is good, and input resistance is big, and the application circuit is succinct.
Further example 1, as shown in fig. 3:
the first buffer 110 includes:
a PMOS transistor M1, the gate of which is connected to the positive input terminal INP, the drain is grounded, and the source is connected to the power supply via a current source I1;
the grid electrode of the NMOS tube M2 is connected with a current source I1, one path of the source electrode is grounded through a current source I2, the drain electrode of the NMOS tube M2 is connected with the input end of the current mirror, and the other path of the source electrode of the NMOS tube M2 is connected with one end of a resistor Re;
m1 and M2 form a two-stage source follower, so that a signal at a positive input end is transmitted to a source of M2 one by one, and I1 and I2 respectively provide bias currents for M1 and M2, and the two transistors are ensured to work in an amplification region. M1 and M2 use two different types of transistors in order to keep the common mode level of the input signals unchanged, i.e. the common mode level of the voltage signal across R1 is equal to the common mode level of the positive and negative input voltage signals.
The second buffer 120 is shown to include:
a PMOS transistor M3, the grid of which is connected with the negative input terminal INN, the source of which is connected with the power supply through a current source I3, and the drain of which is grounded;
the gate of the NMOS transistor M4 is connected to the current source I1, the source is grounded via the current source I4, the drain is connected to the power source via the diode D1, and the source of the NMOS transistor M4 is also connected to the other end of the resistor Re.
The signaling process of M3 and M4 is exactly the same as that of the first buffer 110, and D1 is to make the quiescent voltage of M4 approach M2, so as to ensure that the quiescent operating points of the two buffers are exactly the same.
The current mirror includes:
a PMOS transistor M5, the source electrode of which is connected with the power supply and the drain electrode of which is respectively connected with the grid electrode and the drain electrode of the NMOS transistor M2;
the gate of the PMOS transistor M6 is connected to the gate of the PMOS transistor M5, and the source and drain of the PMOS transistor M6 are connected to the power supply and the output terminal of the current mirror.
M5 and M6 are typical basic current mirror structures that ensure that the current flowing out of the drain of M5 is mirrored at a very fast rate to the drain of M6 and out of the first current mirror 20 through R2. The R2 and the I6 have the function of providing bias current voltage for the M6 and ensuring that the M6 works in an amplification region.
It should be noted that although the input and output currents of the first current mirror 20 are the same, the transconductance gain of the current mirror is very large. The main reason is that the equivalent node resistance of the output end of the current mirror is the parallel connection of the following three parts: the equivalent resistance of I6, R2, to the power supply through M6, the equivalent resistance to ground of the output stage circuit 30. All three are large values, with the equivalent resistance to ground of the input stage circuit 30 typically being above a few mega ohms. The high impedance of the output node provides sufficient transconductance gain to the gain stage circuit 20 and also provides sufficient voltage gain to the entire amplifier, as compared to the low impedance of the input node of the current mirror 20.
The output stage circuit 30 includes:
one path of grid of the PMOS tube M7 is connected with the drain of the PMOS tube M6 through a resistor R2, the other path of grid is connected to the ground through a current source I6, the source is connected to the power supply through the current source I7, and the drain of the PMOS tube M7 is grounded;
the grid electrode of the PMOS tube M8 is connected with the source electrode of the PMOS tube M7, the drain electrode of the PMOS tube M8 is connected with the power supply, one path of the source electrode is connected to the ground through the current source I8, the other path of the source electrode is connected to the grid electrode of the PMOS tube M7 through the compensation capacitor Cc, and the source electrode of the PMOS tube M8 is used as the output end OUT of the stage. M7 and M8 form a two-stage source follower, so that the input signal of the third buffer 310 is transmitted to the output terminal, i.e. the output terminal of the whole high-speed amplifier, one by one, and a certain current driving capability is provided. I7 and I8 respectively provide bias current for M7 and M8, and ensure that the two transistors work in an amplification region. M7 and M8 use two different types of transistors in order to keep the common mode level of the input signal unchanged, i.e., the common mode level of the output voltage signal of the buffer 310 is equal to the common mode level of the input voltage signal.
Overall, the signal is transmitted and amplified by: the differential input voltage signal is converted into a current signal through R1, mirrored to the input end of the output stage 30 through a current mirror formed by M5 and M6, converted into a voltage signal, and then output to the outside of the high-speed amplifier through a two-stage source follower.
Further example 2, as shown in fig. 4:
in this embodiment, the current mirror 20 is replaced by a cascode current mirror, and by adding a pair of field effect transistors, the mirror matching precision of the current mirror 20 is greatly improved, the equivalent resistance of the output node of the current mirror 20 is also increased, and the open-loop voltage gain of the whole amplifier is increased. Since the drain voltage of M2 is lower than that of the circuit of fig. 3, in order to ensure good symmetry of the positive and negative inputs, a diode D2 needs to be added at the drain of the symmetric M4. Meanwhile, in order to improve the current push-pull capability of the whole amplifier, the original third buffer 310 is replaced by a class AB output circuit, namely a pair of complementary field effect transistors.
The first buffer 110 includes:
a PMOS transistor M1, the gate of which is connected to the positive input terminal INP, the drain is grounded, and the source is connected to the power supply via a current source I1;
the grid electrode of the NMOS tube M2 is connected with a current source I1, one path of the source electrode is grounded through a current source I2, the drain electrode of the NMOS tube M2 is connected with the input end of the current mirror, and the other path of the source electrode of the NMOS tube M2 is connected with one end of a resistor Re;
the second buffer 120 is shown to include:
a PMOS transistor M3, the grid of which is connected with the negative input terminal INN, the source of which is connected with the power supply through a current source I3, and the drain of which is grounded;
the gate of the NMOS transistor M4 is connected to the current source I1, the source is grounded via the current source I4, the drain is connected to the power source via the diode D1 and the diode D2, and the source of the NMOS transistor M4 is also connected to the other end of the resistor Re.
The current mirror includes:
a PMOS transistor M5, the drain electrodes of which are respectively connected with the grid electrode and the drain electrode of the NMOS transistor M2;
a PMOS transistor M6, the grid of which is connected with the grid and the drain of the PMOS transistor M5 as the output end of the current mirror;
the drain electrode of the PMOS tube M51 is respectively connected with the grid electrode and the source electrode of the PMOS tube M5, and the source electrode of the PMOS tube M51 is connected with the power supply;
a PMOS transistor M61, the grid of which is connected with the grid of the PMOS transistor M51, the source of which is connected with the power supply, and the drain of which is connected with the source of the PMOS transistor M6;
the output stage circuit 30 includes:
one gate of the NMOS transistor M71 is connected with the drain of the PMOS transistor M6 through a resistor R2, the other gate is connected with the ground through a current source I6, the drain is connected with a power supply, and the source is used as the output end OUT of the current stage;
a PMOS transistor M81, the grid of which is connected with the grid of the NMOS transistor M71, the source of which is connected with the source of the NMOS transistor M71, and the drain of the PMOS transistor M81 is grounded;
and one end of the compensation capacitor Cc is connected with the output end OUT, and the other end of the compensation capacitor Cc is connected with the grid electrode of the PMOS tube M81.
The output stage circuit 30 may optionally be a class AB output stage if it is desired to improve the push-pull current capability of the output stage circuit.
The above description is only exemplary of the present invention and should not be construed as limiting the present invention, and any modifications, equivalents and improvements made within the spirit and principles of the present invention should be protected within the scope of the present invention.
Claims (8)
1. A high speed voltage feedback amplifier having current feedback amplifier characteristics, comprising:
the input stage circuit (10) is provided with a positive input end INP and a negative input end INN, and the input stage circuit (10) can convert positive and negative voltage signals into current signals;
a gain stage circuit (20) for transconductance-amplifying the current signal and outputting a voltage signal;
an output stage circuit (30) for transmitting a voltage signal to an output terminal OUT of the amplifier to increase current driving capability;
the method is characterized in that:
an input stage circuit (10) includes:
a first buffer (110) having a positive input terminal INP as an input terminal;
a second buffer (120) having a positive input terminal INN as an input terminal;
a resistor Re, the two ends of which are respectively connected with the first output end of the first buffer (110) and the output end of the second buffer (120);
a second output terminal of the first buffer (110) is connected to an input terminal of the gain stage circuit (20).
2. A high speed voltage feedback amplifier having current feedback amplifier characteristics as claimed in claim 1 wherein said gain stage circuit (20) comprises:
and the input end of the current mirror is connected with the second output end of the first buffer (110), and the output end of the current mirror is connected with the input end of the output stage circuit (30).
3. A high-speed voltage feedback amplifier having current feedback amplifier characteristics as claimed in claim 2, wherein said output stage circuit (30) comprises:
the input end of the third buffer (310) is connected with the output end of the current mirror, and the output end of the third buffer (310) is the output end OUT of the output stage circuit (30);
and a compensation capacitor Cc, the two ends of which are respectively connected with the input end and the output end of the third buffer (310).
4. A high speed voltage feedback amplifier having current feedback amplifier characteristics as claimed in claim 3 wherein said first buffer (110) comprises:
a PMOS transistor M1, the gate of which is connected to the positive input terminal INP, the drain is grounded, and the source is connected to the power supply via a current source I1;
the grid electrode of the NMOS tube M2 is connected with a current source I1, one path of the source electrode is grounded through the current source I2, the drain electrode of the NMOS tube M2 is connected with the input end of the current mirror, and the other path of the source electrode of the NMOS tube M2 is connected with one end of the resistor Re;
the second buffer (120) comprises:
a PMOS transistor M3, the grid of which is connected with the negative input terminal INN, the source of which is connected with the power supply through a current source I3, and the drain of which is grounded;
the grid electrode of the NMOS tube M4 is connected with a current source I1, one path of the source electrode is grounded through the current source I4, the drain electrode of the NMOS tube M4 is connected with the power supply through a diode D1, and the source electrode of the NMOS tube M4 is also connected with the other end of the resistor Re;
the current mirror includes:
a PMOS transistor M5, the source electrode of which is connected with a power supply, and the drain electrode of which is respectively connected with the grid electrode and the drain electrode of the NMOS transistor M2;
a PMOS transistor M6, the grid of which is connected with the grid of the PMOS transistor M5, the source of the PMOS transistor M6 is connected with the power supply, and the drain is used as the output end of the current mirror;
the output stage circuit (30) comprises:
a PMOS transistor M7, wherein one path of grid electrode of the PMOS transistor M7 is connected with the drain electrode of the PMOS transistor M6 through a resistor R2, the other path of grid electrode of the PMOS transistor M7 is connected to the ground through a current source I6, the source electrode of the PMOS transistor M7 is connected to the power supply through a current source I7, and the drain electrode of the PMOS transistor M7 is grounded;
the grid electrode of the PMOS tube M8 is connected with the source electrode of the PMOS tube M7, the drain electrode of the PMOS tube M8 is connected with the power supply, one path of the source electrode is connected to the ground through the current source I8, the other path of the source electrode is connected to the grid electrode of the PMOS tube M7 through the compensation capacitor Cc, and the source electrode of the PMOS tube M8 is used as the output end OUT of the stage.
5. A high speed voltage feedback amplifier having current feedback amplifier characteristics as claimed in claim 3 wherein said first buffer (110) comprises:
a PMOS transistor M1, the gate of which is connected to the positive input terminal INP, the drain is grounded, and the source is connected to the power supply via a current source I1;
the grid electrode of the NMOS tube M2 is connected with a current source I1, one path of the source electrode is grounded through the current source I2, the drain electrode of the NMOS tube M2 is connected with the input end of the current mirror, and the other path of the source electrode of the NMOS tube M2 is connected with one end of the resistor Re;
the second buffer (120) comprises:
a PMOS transistor M3, the grid of which is connected with the negative input terminal INN, the source of which is connected with the power supply through a current source I3, and the drain of which is grounded;
the gate of the NMOS tube M4 is connected with a current source I1, one path of the source electrode is grounded through the current source I4, the drain electrode is connected with the power supply through a diode D1 and a diode D2, and the source electrode of the NMOS tube M4 is also connected with the other end of the resistor Re;
the current mirror includes:
a PMOS transistor M5, the drain electrodes of which are respectively connected with the grid electrode and the drain electrode of the NMOS transistor M2;
a PMOS transistor M6, the grid of which is connected with the grid and the drain of the PMOS transistor M5 as the output end of the current mirror;
the drain electrode of the PMOS tube M51 is respectively connected with the grid electrode and the source electrode of the PMOS tube M5, and the source electrode of the PMOS tube M51 is connected with the power supply;
a PMOS transistor M61, the grid of which is connected with the grid of the PMOS transistor M51, the source of which is connected with the power supply, and the drain of which is connected with the source of the PMOS transistor M6;
the output stage circuit (30) comprises:
one gate of the NMOS transistor M71 is connected with the drain of the PMOS transistor M6 through a resistor R2, the other gate is connected to the ground through a current source I6, the drain is connected with a power supply, and the source is used as the output end OUT of the current stage;
a PMOS transistor M81, the grid of which is connected with the grid of the NMOS transistor M71, the source of which is connected with the source of the NMOS transistor M71, and the drain of the PMOS transistor M81 is grounded;
and one end of the compensation capacitor Cc is connected with the output end OUT, and the other end of the compensation capacitor Cc is connected with the grid electrode of the PMOS tube M81.
6. A high-speed voltage feedback amplifier with current feedback amplifier characteristics as in any of claims 1-3, wherein said first buffer (110) and said second buffer (120) are capable of passing a differential signal one-to-one across said resistor Re and simultaneously converting to a current signal; the value of the current signal is the difference input voltage over the resistance of the resistor Re.
7. A high speed voltage feedback amplifier having the characteristics of a current feedback amplifier as claimed in any one of claims 2 to 3, wherein said current mirror operates to transconductance amplify said current signal, said current mirror being capable of mirroring said current signal one-to-one to the output of said gain stage circuit and, at the same time, of converting therefrom into a voltage signal having a magnitude of said current signal multiplied by the equivalent resistance of the output of said gain stage circuit, said equivalent resistance being from several hundred kilohms to several mega-ohms.
8. A high speed circuit having current feedback amplifier characteristics as claimed in any one of claims 1 to 3
The voltage feedback amplifier is characterized in that the output stage circuit (30) is an AB class output stage.
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| CN201921609343.2U CN210380777U (en) | 2019-09-25 | 2019-09-25 | High speed voltage feedback amplifier with current feedback amplifier characteristics |
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| CN110601663A (en) * | 2019-09-25 | 2019-12-20 | 杭州瑞盟科技有限公司 | High speed voltage feedback amplifier with current feedback amplifier characteristics |
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