CN210351012U

CN210351012U - Full MOS tube synchronous rectification voltage regulator control system for motorcycle

Info

Publication number: CN210351012U
Application number: CN201921934492.6U
Authority: CN
Inventors: 李红星; 付强; 王开云
Original assignee: Chongqing Hecheng Electric Appliance Co ltd
Current assignee: Chongqing Hecheng Electric Appliance Co ltd
Priority date: 2019-11-11
Filing date: 2019-11-11
Publication date: 2020-04-17
Anticipated expiration: 2029-11-11

Abstract

The utility model discloses a full MOS manages synchronous rectification voltage regulator control system for motorcycle, including main circuit and control circuit, the main circuit is three-phase bridge rectifier circuit, three-phase bridge rectifier circuit's last bridge arm and lower bridge arm constitute by MOSFET, control circuit include the main control unit and respectively with the every corresponding pulse management unit of three-phase bridge rectifier circuit, pulse management unit includes an input and two outputs, every looks pulse management unit's input is used for connecting the main control unit respectively and corresponds looks control pulse output, each looks two outputs of pulse management unit respectively with three-phase bridge rectifier circuit corresponds the grid connection of the MOSFET of going up bridge arm and lower bridge arm mutually. The utility model discloses can realize that the interference killing feature is strong, avoid cophase upper and lower bridge arm to be direct to effectively improve system security performance's purpose.

Description

Full MOS tube synchronous rectification voltage regulator control system for motorcycle

Technical Field

The utility model relates to a voltage regulator technical field, concretely relates to full MOS manages synchronous rectification voltage regulator control system for motorcycle.

Background

The current motorcycle voltage converter mainly adopts a mode of phase-controlled rectification output direct-current voltage to supply power to a rear-end load by a rectifier circuit constructed by silicon controlled rectifier and diode/silicon controlled rectifier. The power supply mode adopting devices such as a rectifier diode, a silicon controlled rectifier and the like causes large conduction voltage drop, large loss and heat productivity, low reliability and low efficiency.

In order to overcome the problems of large heat productivity and low efficiency, a main circuit formed by a rectifier diode and a silicon controlled rectifier is replaced by a main circuit part of a diode/MOSFET mixed rectification and full MOSFET synchronous rectification, and the purpose of the main circuit is to reduce the heat productivity of the motorcycle voltage regulator by utilizing the low on-resistance characteristic of the MOSFET and improve the reliability of the voltage regulator. The upper bridge arm rectifying elements of the hybrid rectifying circuit and the full MOSFET synchronous rectifying main circuit which are composed of the diodes/MOSFETs work in a diode state; the MOSFET of the lower bridge arm is in a low on-resistance state, so that the heat generated by the lower bridge arm is obviously reduced, and the efficiency of the whole machine is improved. However, the upper bridge arm is still in a diode state, so that the heat productivity of the upper bridge arm is reduced limitedly; from the viewpoint of heat generation, the heat generation of the schottky diode/MOSFET and the full MOSFET mainly comes from the upper arm schottky diode or the MOSFET body diode, and therefore, how to further reduce the heat generation, reduce the loss, and improve the efficiency becomes a direction to be further studied.

At present, a control system of a rectification voltage regulator generally generates a three-phase control pulse with a sudden change signal through a main control unit, the three-phase control pulse is used for controlling the on and off of MOSFET tubes of each phase in a three-phase bridge rectification circuit, when the main control unit generates the three-phase control pulse, the three-phase control pulse is obtained by comparing the output voltage of the adopted three-phase bridge rectification circuit with a set voltage, specifically, the main control unit compares the acquired output voltage of the three-phase bridge rectification circuit with a lower limit set voltage and an upper limit set voltage, when the output voltage of the three-phase bridge rectification circuit is lower than the lower limit set voltage and the input voltage of a certain phase is in a positive half-wave state, the main control unit generates a control pulse of the corresponding phase to a phase pulse management unit, and an output end connected with a grid electrode of an upper bridge arm MOSFET, the output end of the phase pulse management unit, which is connected with the grid electrode of the lower bridge arm MOSFET, generates a low level signal, if the output voltage of the three-phase bridge rectifier circuit is lower than the lower limit set voltage and the master control unit acquires that the input voltage of a certain phase is in a negative half-wave state, the master control unit generates a control pulse of the corresponding phase to the phase pulse management unit, the output end of the phase pulse management unit, which is connected with the grid electrode of the upper bridge arm MOSFET, generates a low level signal, and the output end of the phase pulse management unit, which is connected with the grid electrode of the lower bridge arm MOSFET, generates a high level signal; when the main control unit acquires that the output voltage of the three-phase bridge rectifier circuit is higher than the upper limit set voltage, the main control unit generates three-phase control pulses to the pulse management units of the corresponding phases, the output end of each phase of pulse management unit, which is connected with the grid electrode of the upper bridge arm MOSFET, generates a low level signal, and the output end of each phase of pulse management unit, which is connected with the grid electrode of the lower bridge arm MOSFET, generates a high level signal. The main control unit is connected with each phase MOSFET in the three-phase bridge rectifier circuit through a subsequent circuit to control the on-off of the three-phase control pulse generated in the manner, and the subsequent circuit is designed specifically to effectively avoid the direct connection of the same-phase upper bridge arm MOSFET and the same-phase lower bridge arm MOSFET during control, so that the improvement of the safety and reliability of the system operation becomes a technical problem which needs to be solved urgently.

SUMMERY OF THE UTILITY MODEL

The aforesaid to prior art exist not enough, the to-be-solved technical problem of the utility model is: how to provide a full MOSFET tube synchronous rectification voltage regulator control system for a motorcycle, which can realize strong anti-interference capability and avoid the direct connection of an upper bridge arm and a lower bridge arm in the same phase, thereby effectively improving the safety performance of the system.

In order to solve the technical problem, the utility model discloses a following technical scheme:

the control system is characterized by comprising a main circuit and a control circuit, wherein the main circuit is a three-phase bridge rectifier circuit, an upper bridge arm and a lower bridge arm of the three-phase bridge rectifier circuit are both composed of MOSFETs, the control circuit comprises a main control unit and pulse management units respectively corresponding to the three-phase bridge rectifier circuit, each pulse management unit comprises an input end and two output ends, the input end of each pulse management unit is respectively used for connecting the control pulse output ends of the corresponding phase of the main control unit, and the two output ends of each pulse management unit are respectively connected with the grids of the MOSFETs of the upper bridge arm and the lower bridge arm of the corresponding phase of the three-phase bridge rectifier circuit.

The working principle of the utility model is as follows: when the control system works, when three-phase control pulses generated by the main control unit generate signal sudden change, the output end of the corresponding phase pulse management unit outputting high level is converted into low level and turns off the corresponding MOSFET, and the output end of the corresponding phase pulse management unit outputting low level is converted into high level after the set dead time and turns on the corresponding MOSFET. Therefore the utility model discloses a control system switches on and turn-off control the MOSFET of bridge arm about the cophase when, at first make former MOSFET that switches on turn-off earlier, after the dead time of setting for again, the MOSFET of former turn-off switches on again, and the dead time of setting for switches on with the control mode of turning off earlier and switching on again can effectually avoid upper and lower bridge arm MOSFET's while, has realized that the interference killing feature is strong from this, can effectively avoid cophase upper and lower bridge arm direct to effectively improve system security performance's purpose.

Preferably, the pulse management unit comprises a rising edge identification circuit, a falling edge identification circuit, a dead time generation circuit, an upper bridge arm pulse generation circuit and a lower bridge arm pulse generation circuit, the input ends of the rising edge identification circuit and the falling edge identification circuit are used for inputting corresponding control pulses generated by the main control unit, the output end of the rising edge identification circuit respectively outputs signals to the upper bridge arm pulse generating circuit and the dead zone generating circuit, the output end of the falling edge identification circuit respectively outputs signals to the lower bridge arm pulse generating circuit and the dead zone generating circuit, the output end of the dead zone generating circuit respectively outputs signals to the upper bridge arm pulse generating circuit and the lower bridge arm pulse generating circuit, the output end of the upper bridge arm pulse generating circuit is connected with the grid electrode of the MOSFET of the corresponding upper bridge arm, and the output end of the lower bridge arm pulse generating circuit is connected with the grid electrode of the MOSFET of the corresponding lower bridge arm.

Therefore, when the rising edge identification circuit identifies that the corresponding control pulse signal is a rising edge, the rising edge identification circuit outputs a low-level signal to the upper bridge arm pulse generating circuit so that the output end signal of the upper bridge arm pulse generating circuit is converted from a high level to a low level, and at the moment, the MOSFET of the upper bridge arm connected with the output end of the upper bridge arm pulse generating circuit is turned off; meanwhile, the rising edge recognition circuit also sends an output signal to the dead zone generation circuit to enable the dead zone generation circuit to generate a dead zone delay signal, after the dead zone delay signal passes, the dead zone generation circuit outputs a high level signal to the lower bridge arm pulse generation circuit to enable an output end signal of the lower bridge arm pulse generation circuit to be converted from a low level to a high level, and at the moment, the MOSFET tube of the lower bridge arm connected with the output end of the lower bridge arm pulse generation circuit is conducted;

when the falling edge identification circuit identifies that the corresponding phase control pulse signal is a falling edge, the falling edge identification circuit outputs a low-level signal to the lower bridge arm pulse generation circuit so that an output end signal of the lower bridge arm pulse generation circuit is converted from a high level to a low level, and at the moment, the MOSFET tube of the lower bridge arm connected with the output end of the lower bridge arm pulse generation circuit is turned off; meanwhile, the falling edge identification circuit also sends an output signal to the dead zone generation circuit to enable the dead zone generation circuit to generate a dead zone delay signal, after the dead zone delay signal passes, the dead zone generation circuit outputs a high level signal to the upper bridge arm pulse generation circuit to enable an output end signal of the upper bridge arm pulse generation circuit to be converted from a low level to a high level, and at the moment, the MOSFET tube of the lower bridge arm connected with the output end of the upper bridge arm pulse generation circuit is conducted;

when the corresponding control pulse signals are not recognized by the rising edge recognition circuit and the falling edge recognition circuit, the signal states of the output ends of the upper bridge arm pulse generation circuit and the lower bridge arm pulse generation circuit are kept unchanged, and the working states of the MOSFET tubes of the upper bridge arm and the lower bridge arm are kept unchanged.

In conclusion, the pulse management unit controls the conduction and the turn-off of the MOSFET (metal oxide semiconductor field effect transistor) tubes of the upper bridge arm and the lower bridge arm, and the MOSFET tubes of the upper bridge arm and the lower bridge arm are effectively prevented from being simultaneously conducted under the action of the dead zone generating circuit, so that the safety performance of the system is improved.

Preferably, the pulse management unit includes a resistor R1 and a capacitor C1 connected in series, the other end of the resistor R1 connected to the capacitor C1 is connected to the control pulse of the corresponding phase generated by the main control unit, the other end of the capacitor C1 connected to the resistor R1 is grounded, the pulse management unit further includes a first voltage comparator and a second voltage comparator, the forward input end of the first voltage comparator and the forward input end of the second voltage comparator are both connected between the resistor R1 and the capacitor C1, the reverse input end of the first voltage comparator is grounded through a resistor R4, the reverse input end of the second voltage comparator is grounded through a resistor R3 and a resistor R4 connected in series, the reverse input end of the second voltage comparator is further connected to the output end of the three-phase bridge rectifier circuit through a resistor R2, the output end of the first voltage comparator is connected to the gate of the MOSFET of the corresponding phase, and the output end of the second voltage comparator is connected to the gate of the MOSFET of the corresponding phase lower bridge arm.

Thus, when the control pulse generated by the main control unit is shaped by the resistor R1 and the capacitor C1 to become a voltage line with a certain slope, the voltage at the reverse input end of the first voltage comparator is set as a first comparison voltage, the voltage at the reverse input end of the second voltage comparator is set as a second comparison voltage, when the control pulse is a rising edge signal, the voltage of the voltage line rises to pass through the first comparison voltage, the output end of the first voltage comparator is set to be 0, so that the MOSFET tube of the upper bridge arm corresponding to the first voltage comparator is turned off, when the voltage continuously rises to reach the second comparison voltage, the output end of the second voltage comparator is set to be 1, so that the MOSFET tube of the lower bridge arm corresponding to the second voltage comparator is turned on, because the voltage difference of the resistor R3 exists between the first comparison voltage and the second comparison voltage, the voltage rises to a certain time from the first comparison voltage to the second comparison voltage, and the time difference also exists between the turn-off of the MOSFET tube of the upper MOSFET bridge arm and, the time difference is set dead time, so that the safety in the driving state conversion of the upper bridge arm and the lower bridge arm can be effectively ensured;

when the control pulse is a falling edge signal, when the voltage of the voltage line drops and passes through a second comparison voltage, the output end of the second voltage comparator is set to be 0, so that the MOSFET tube of the lower bridge arm corresponding to the second voltage comparator is turned off, when the voltage continuously drops and reaches the first comparison voltage, the output end of the first voltage comparator is set to be 1, so that the MOSFET tube of the upper bridge arm corresponding to the first voltage comparator is turned on, and because a voltage difference value of a resistor R3 exists between the first comparison voltage and the second comparison voltage, the voltage drops to the first comparison voltage from the second comparison voltage for a certain time, a time difference value also exists between the turning-off of the MOSFET tube of the lower bridge arm and the turning-on of the MOSFET tube of the upper bridge arm, and the time difference value is a set dead time, so that the safety in the driving state conversion of the;

in conclusion, the effects of state conversion, pulse generation and dead zone insertion are achieved, the straight-through of the upper bridge arm and the lower bridge arm in the driving state conversion process is effectively avoided, and the use safety of the MOSFET (metal oxide semiconductor field effect transistor) tube of the upper bridge arm and the MOSFET tube of the lower bridge arm are ensured.

Preferably, the main control unit adopts an integrated chip MST2101, a VSEN pin of the integrated chip MST2101 is connected with an output end of the three-phase bridge rectifier circuit through a resistor R47, a VREF pin is grounded after sequentially passing through a resistor R48, a resistor R49 and a resistor R50 which are connected in series, a VCH pin is connected between the resistor R48 and the resistor R49, a VCL pin is connected between the resistor R49 and the resistor R50, a DRV1 pin, a DRV2 pin and a DRV3 pin are respectively connected with an input end of the corresponding phase pulse management unit, a PH1 pin, a PH2 pin and a PH3 pin are respectively connected with three input ends of the three-phase bridge rectifier circuit, a voltage at the VCH pin is set as an upper limit setting voltage, and a voltage at the VCL pin is set as a lower limit setting voltage.

Thus, a VSEN pin of an integrated chip MST2101 is connected with an output end of a three-phase bridge rectifier circuit through a resistor R47, the VSEN pin is used for adopting output voltage of the three-phase bridge rectifier circuit, a VREF pin constantly outputs 2.5V reference voltage, upper and lower limits of the output voltage are set by matching with a VCH pin and a VCL pin, the voltage of the VCL pin is used as lower limit setting voltage, and the voltage of the VCH pin is used as upper limit setting voltage; when the main control unit controls the three-phase bridge rectifier circuit, the acquired output voltage is compared with the upper limit setting voltage and the lower limit setting voltage, the state of the three-phase input voltage is detected through a PH1 pin, a PH2 pin and a PH3 pin, and when the output voltage is smaller than the lower limit setting voltage and the input voltage of a certain phase is in a positive half-wave state, a control pulse of the phase is generated to the corresponding pulse management unit to enable the MOSFET tube of the upper bridge arm of the phase to be connected and the MOSFET tube of the lower bridge arm to be disconnected; when the output voltage is less than the lower limit set voltage and the input voltage of a certain phase is in a negative half-wave state, generating a control pulse of the phase to a corresponding pulse management unit to enable the MOSFET tube of the lower bridge arm of the phase to be connected and the MOSFET tube of the upper bridge arm to be disconnected; when the output voltage is greater than the upper limit set voltage, three-phase control pulses are generated to the corresponding pulse management units to enable the MOSFET (metal oxide semiconductor field effect transistor) tube of the lower bridge arm of each phase to be connected and the MOSFET tube of the upper bridge arm to be disconnected, and therefore the control of the main control unit on the working state of the three-phase bridge type rectifying circuit is achieved.

Preferably, the set dead time is 0-50 us.

Therefore, the time provides enough time difference to realize the switching of the driving states of the MOSFET tubes of the upper and lower bridge arms, and the influence on the rectification waveform is small.

Drawings

FIG. 1 is a schematic diagram of a control system according to an embodiment of the present invention;

fig. 2 is a schematic diagram of a control system when the integrated chip MST2101 is used in the embodiment of the present invention;

FIG. 3 is a circuit diagram of a U-phase pulse management unit according to an embodiment of the present invention;

FIG. 4 is a diagram showing the relationship between U-phase PU, VC1, P1 and P4 according to the embodiment of the present invention;

FIG. 5 is a circuit diagram of a V-phase pulse management unit according to an embodiment of the present invention;

FIG. 6 is a diagram of the relationship of the V-phase PV, VC2, P2 and P5 according to the embodiment of the present invention;

FIG. 7 is a circuit diagram of a W-phase pulse management unit according to an embodiment of the present invention;

FIG. 8 is a diagram illustrating relationships among W-phases PW, VC3, P3 and P6 according to an embodiment of the present invention;

fig. 9 is a pin connection diagram of the integrated chip MST2101 according to an embodiment of the present invention.

Detailed Description

The present invention will be further explained with reference to the drawings and examples.

As shown in fig. 1 and fig. 2, an all-MOS synchronous rectification voltage regulator control system for a motorcycle includes a main circuit and a control circuit, the main circuit is a three-phase bridge rectifier circuit, an upper bridge arm and a lower bridge arm of the three-phase bridge rectifier circuit are both composed of MOSFETs, the control circuit includes a main control unit and a pulse management unit respectively corresponding to each of the three-phase bridge rectifier circuit, the pulse management unit includes an input terminal and two output terminals, the input terminal of each pulse management unit is respectively used for connecting a control pulse output terminal of a corresponding phase of the main control unit, and the two output terminals of each pulse management unit are respectively connected to gates of the MOSFETs of the upper bridge arm and the lower bridge arm corresponding to the three-phase bridge.

Therefore, when the control system works, when the control pulse generates signal sudden change, the output end of the corresponding phase pulse management unit outputting high level is converted into low level and turns off the corresponding MOSFET, and the output end of the corresponding phase pulse management unit outputting low level is converted into high level after the set dead time and turns on the corresponding MOSFET. Therefore the utility model discloses a control system switches on and turn-off control the MOSFET of bridge arm about the cophase when, at first make former MOSFET that switches on turn-off earlier, after the dead time of setting for again, the MOSFET of former turn-off switches on again, and the dead time of setting for switches on with the control mode of turning off earlier and switching on again can effectually avoid upper and lower bridge arm MOSFET's while, has realized that the interference killing feature is strong from this, can effectively avoid cophase upper and lower bridge arm direct to effectively improve system security performance's purpose.

In this embodiment, the pulse management unit includes a rising edge identification circuit, a falling edge identification circuit, the output end of the dead zone generation circuit respectively outputs signals to the upper bridge arm pulse generation circuit and the lower bridge arm pulse generation circuit, the output end of the upper bridge arm pulse generation circuit is connected with the grid electrode of the MOSFET of the corresponding upper bridge arm, and the output end of the lower bridge arm pulse generation circuit is connected with the grid electrode of the MOSFET of the corresponding lower bridge arm.

In this embodiment, the pulse management unit includes a resistor R1 and a capacitor C1 connected in series, the other end of the resistor R1 connected to the capacitor C1 is connected to the control pulse of the corresponding phase generated by the main control unit, the other end of the capacitor C1 connected to the resistor R1 is grounded, the pulse management unit further includes a first voltage comparator and a second voltage comparator, the forward input end of the first voltage comparator and the forward input end of the second voltage comparator are both connected between the resistor R1 and the capacitor C1, the reverse input end of the first voltage comparator is grounded through the resistor R4, the reverse input end of the second voltage comparator is grounded through the resistor R3 and the resistor R4 connected in series, the reverse input end of the second voltage comparator is further connected to the output end of the three-phase bridge rectifier circuit through the resistor R2, the output end of the first voltage comparator is connected to the gate of the MOSFET of the corresponding phase, and the output end of the second voltage comparator is connected to the gate of the MOSFET of the corresponding phase lower bridge arm.

In this embodiment, the circuit structure of the U, V, W three-phase pulse management unit is described separately:

the circuit connection diagram of the U-phase pulse management unit is shown in fig. 3, the main control unit outputs a control pulse PU, and the pulse is shaped by a resistor R1 and a capacitor C1 to become a line VC1 (shown in fig. 4) with a certain slope. Setting a comparison point V1/V2, when the voltage VC1 rises and passes through the comparison point V1, setting P1 to be 0 to enable the MOSFET (metal oxide semiconductor field effect transistor) of the upper bridge arm of the U phase to be turned off, and setting P4 to be 1 to enable the MOSFET of the lower bridge arm of the U phase to be turned on when the voltage rises and passes through the comparison point V2, so that a dead zone Td is generated between P1 and P4, and the dead zone is used for ensuring the safety of the upper bridge arm and the lower bridge arm in the drive state conversion of the upper bridge arm and; similarly, when the voltage VC1 drops and passes through a comparison point V2, 0 is set at P4 to turn off the MOSFET tube of the lower arm of the U phase, and when the voltage drops again and passes through V1, 1 is set at P1 to turn on the MOSFET tube of the upper arm of the U phase, so that state conversion, pulse generation and dead zone insertion are completed, signals P1 and P4 are used as control signals of driving circuits of the MOSFET tubes Q1 and Q2 of the upper arm and the lower arm of the U phase, the MOSFET tubes are turned on when the signals are effective, and the MOSFET tubes are turned off when the signals are ineffective.

The circuit connection diagram of the V-phase pulse management unit is shown in figure 5. The master control unit outputs a control pulse PV, which is shaped by a resistor R5 and a capacitor C2 to become a line VC2 (as shown in fig. 6) with a certain slope. Setting a V3/V4 comparison point, when the voltage VC2 rises and passes through the comparison point V3, setting P2 to be 0 to enable the MOSFET (metal oxide semiconductor field effect transistor) tube of the upper bridge arm of the V phase to be turned off, and when the voltage rises and passes through the comparison point V4, setting P5 to be 1 to enable the MOSFET tube of the lower bridge arm of the V phase to be turned on, so that a dead zone Td is generated between P2 and P5, and the dead zone is used for ensuring the safety of the upper bridge arm and the lower bridge arm in the drive state conversion of; similarly, when the voltage VC2 drops and passes through the comparison point V4, the P5 is set to 0 to turn off the MOSFET of the lower arm of the V-phase, and then the voltage VC2 drops and passes through the comparison point V3, and the P2 is set to 1 to turn on the MOSFET of the upper arm of the V-phase, thereby completing the state transition, the pulse generation, and the dead zone insertion. Signals P2 and P5 are used as control signals of a driving circuit of the V-phase upper and lower bridge arm MOSFET Q3 and Q4, the MOSFET is conducted when the signals are effective, and the MOSFET is turned off when the signals are ineffective.

The circuit connection diagram of the W-phase pulse management unit is shown in figure 7, the main control unit outputs a control pulse PW, and the pulse is shaped by a resistor R9 and a capacitor C3 to become a line VC3 with a certain slope (shown in figure 8). Setting a comparison point V5/V6, when a voltage VC3 rises to pass through the comparison point V5, setting P3 to be 0 to enable the MOSFET (metal oxide semiconductor field effect transistor) tube of the upper bridge arm of the W phase to be turned off, and setting P6 to be 1 to enable the MOSFET tube of the lower bridge arm of the W phase to be turned on when the voltage rises to pass through the comparison point V6, so that a dead zone Td is generated between P3 and P6, and the dead zone is used for ensuring the safety of the upper bridge arm and the lower bridge arm in the drive state conversion of the upper; similarly, when the voltage VC3 drops and passes through the comparison point V6, the P6 is set to 0 to turn off the MOSFET of the W-phase lower arm, and when the voltage VC3 drops and passes through the comparison point V5, the P3 is set to 1 to turn on the MOSFET of the W-phase upper arm, thereby completing the state transition, the pulse generation, and the dead zone insertion. Signals P3 and P6 are used as control signals of the drive circuit of the W-phase upper and lower bridge arm MOSFET Q5 and Q6, the MOSFET is conducted when the signals are effective, and the MOSFET is turned off when the signals are ineffective.

In this embodiment, the main control unit is connected to the input end and the output end of the three-phase bridge rectifier circuit, and the main control unit collects three-phase input voltage signals and three-phase output voltage signals of the three-phase bridge rectifier circuit;

the main control unit compares the collected output voltage of the three-phase bridge rectifier circuit with a lower limit setting voltage and an upper limit setting voltage, when the output voltage of the three-phase bridge rectifier circuit is lower than the lower limit setting voltage and a certain phase input voltage is in a positive half-wave state, the main control unit generates a control pulse of a corresponding phase to the phase pulse management unit, an output end of the phase pulse management unit connected with a grid electrode of an upper bridge arm MOSFET generates a high level signal, an output end of the phase pulse management unit connected with a grid electrode of a lower bridge arm MOSFET generates a low level signal, if the output voltage of the three-phase bridge rectifier circuit is lower than the lower limit setting voltage and the main control unit collects a certain phase input voltage to be in a negative half-wave state, the main control unit generates a control pulse of a corresponding phase to the phase pulse management unit, and an output end of the phase pulse management unit connected with the grid electrode of, the output end of the phase pulse management unit, which is connected with the grid of the lower bridge arm MOSFET, generates a high-level signal;

when the main control unit acquires that the output voltage of the three-phase bridge rectifier circuit is higher than the upper limit set voltage, the main control unit generates three-phase control pulses to the pulse management units of the corresponding phases, the output end of each phase of pulse management unit, which is connected with the grid electrode of the upper bridge arm MOSFET, generates a low level signal, and the output end of each phase of pulse management unit, which is connected with the grid electrode of the lower bridge arm MOSFET, generates a high level signal.

In this embodiment, the main control unit adopts an integrated chip MST2101, a VSEN pin of the integrated chip MST2101 is connected with an output end of a three-phase bridge rectifier circuit through a resistor R47, a VREF pin is grounded after sequentially passing through a resistor R48, a resistor R49 and a resistor R50 which are connected in series, a VCH pin is connected between the resistor R48 and the resistor R49, a VCL pin is connected between the resistor R49 and the resistor R50, a DRV1 pin, a DRV2 pin and a DRV3 pin are respectively connected with an input end of a corresponding phase pulse management unit, a PH1 pin, a PH2 pin and a PH3 pin are respectively connected with three input ends of the three-phase bridge rectifier circuit, a voltage at the VCH pin is set as an upper limit setting voltage, and a voltage at the VCL pin is set as a lower limit.

As shown in fig. 8, the integrated chip MST2101 is a control IC for a voltage regulator of a motorcycle magneto, and has 14 pins, wherein the first pin is a TD pin, which is grounded through a capacitor C18 for detecting whether the magneto is working normally, the second pin is a DRV1 pin, which outputs a U-phase control pulse to a U-phase pulse management unit, the third pin is a PH1 pin, which is connected to a U-phase input terminal of a three-phase bridge rectifier circuit, the fourth pin is a DRV2 pin, which outputs a V-phase control pulse to a V-phase pulse management unit, the fifth pin is a PH2 pin, which is connected to a V-phase input terminal of the three-phase bridge rectifier circuit, the sixth pin is a DRV3 pin, which outputs a W-phase control pulse to the W-phase pulse management unit, the seventh pin is a PH3 pin, which is connected to a W-phase input terminal of the three-phase bridge rectifier circuit, the eighth pin is a VCL pin, which is grounded through a resistor R50 for adjusting and providing a lower limit setting voltage, the ninth pin is a VCH pin, the pin is grounded through a resistor R49 and a resistor R50 for adjusting and providing an upper limit set voltage, the tenth pin is a GND pin, the pin is directly grounded, the eleventh pin is a VREF pin, the pin constantly outputs 2.5V reference voltage, the pin is grounded through a resistor R48, a resistor R49 and a resistor R50 in sequence, so that a lower limit setting voltage and an upper limit setting voltage are generated on a ninth pin and a tenth pin, respectively, the twelfth pin is a VCC pin, the pin is connected with a power supply VCC and used for supplying power to an internal circuit, the thirteenth pin is a BAT pin, the pin is grounded through a capacitor C17, and in order to enable the output voltage to be more temperature-dependent, the fourteenth pin is a VSEN pin, and the pin is connected with the output end of the three-phase bridge rectifier circuit through a resistor R47.

Thus, a VSEN pin of an integrated chip MST2101 is connected with an output end of a three-phase bridge rectifier circuit through a resistor R47, the VSEN pin is used for adopting output voltage of the three-phase bridge rectifier circuit, a VREF pin constantly outputs 2.5V reference voltage, upper and lower limits of the output voltage are set by matching with a VCH pin and a VCL pin, the voltage of the VCL pin is used as lower limit setting voltage, and the voltage of the VCH pin is used as upper limit setting voltage; when the main control unit controls the three-phase bridge rectifier circuit, the acquired output voltage is compared with the upper limit setting voltage and the lower limit setting voltage, meanwhile, the state of the three-phase input voltage is detected through a PH1 pin, a PH2 pin and a PH3 pin, when the output voltage is smaller than the lower limit setting voltage and the input voltage of a certain phase (such as a U phase) is in a positive half-wave state, a control pulse of the U phase is generated to the corresponding pulse management unit, so that the MOSFET Q1 of the upper bridge arm of the U is switched on, the MOSFET Q2 of the lower bridge arm of the U is switched off, and the voltage of a magneto is rectified through the MOSFET Q1 of the upper bridge arm and then outputs electric energy to a; when the output voltage is less than the lower limit set voltage and the U-phase input voltage is in a negative half-wave state, generating a U control pulse to a corresponding pulse management unit to enable the MOSFET Q2 of the U-phase lower bridge arm to be switched on and the MOSFET Q1 of the upper bridge arm to be switched off, and enabling the voltage to flow into a magneto through the MOSFET Q2 of the lower bridge arm; when the output voltage is greater than the upper limit set voltage, the U-phase control pulse enables the MOSFET tube of the U-phase lower bridge arm to be conducted and the MOSFET tube of the upper bridge arm to be cut off, and the electric energy of the magneto is always prevented from being rectified and output to a load, so that the control of the main control unit on the working state of the three-phase bridge rectifier circuit is realized. Meanwhile, in the whole working process, the upper bridge arm MOSFET is conducted only when the output voltage of the three-phase bridge rectifier circuit is lower than the lower limit set voltage and the voltage is in a positive half-wave state, and the rest of the output voltage is in a turn-off state, compared with the control mode that the upper bridge arm MOSFET is conducted for a long time in the prior art, the scheme can greatly reduce the heat productivity of the upper bridge arm MOSFET by timely conducting the upper bridge arm MOSFET and turning off the upper bridge arm MOSFET in the rest of the time, the heat loss of a rectifier bridge upper bridge arm power device (MOSFET) is less than 1/5 of the original loss, the overall power consumption is reduced to 1/3, the power consumption is lower, the temperature of a voltage regulator is greatly reduced, the service life of the device is prolonged, the heat loss efficiency is reduced, the efficiency is greatly improved, a common temperature device can be.

In the present embodiment, the set dead time is 0 to 50 us.

Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and not for limiting the technical solutions, and those skilled in the art should understand that those modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions, and all should be covered in the scope of the claims of the present invention.

Claims

1. The control system is characterized in that the control circuit also comprises a pulse management unit corresponding to each three-phase bridge rectification circuit, the pulse management unit comprises an input end and two output ends, the input end of each pulse management unit is respectively used for connecting the control pulse output ends of the corresponding phases of the main control unit, and the two output ends of each phase of the pulse management unit are respectively connected with the grids of the MOSFETs of the corresponding upper bridge arm and the lower bridge arm of the three-phase bridge rectification circuit.

2. The all-MOS tube synchronous rectification voltage regulator control system for the motorcycle of claim 1, wherein the pulse management unit comprises a rising edge identification circuit, a falling edge identification circuit, a dead time generation circuit, an upper bridge arm pulse generation circuit and a lower bridge arm pulse generation circuit, the input ends of the rising edge identification circuit and the falling edge identification circuit are used for inputting corresponding control pulses generated by the main control unit, the output end of the rising edge identification circuit respectively outputs signals to the upper bridge arm pulse generation circuit and the dead time generation circuit, the output end of the falling edge identification circuit respectively outputs signals to the lower bridge arm pulse generation circuit and the dead time generation circuit, the output end of the dead time generation circuit respectively outputs signals to the upper bridge arm pulse generation circuit and the lower bridge arm pulse generation circuit, the output end of the upper bridge arm pulse generating circuit is connected with the grid electrode of the MOSFET of the corresponding upper bridge arm, and the output end of the lower bridge arm pulse generating circuit is connected with the grid electrode of the MOSFET of the corresponding lower bridge arm.

3. The full-MOS tube synchronous rectification voltage regulator control system for the motorcycle of claim 1, wherein the pulse management unit comprises a resistor R1 and a capacitor C1 connected in series, the other end of the resistor R1 connected with the capacitor C1 is connected with the control pulse of the corresponding phase generated by the main control unit, the other end of the capacitor C1 connected with the resistor R1 is grounded, the full-MOS tube synchronous rectification voltage regulator control system further comprises a first voltage comparator and a second voltage comparator, the forward input end of the first voltage comparator and the forward input end of the second voltage comparator are both connected between a resistor R1 and a capacitor C1, the reverse input end of the first voltage comparator is grounded through a resistor R4, the reverse input end of the second voltage comparator is grounded through a resistor R3 and a resistor R4 connected in series, the reverse input end of the second voltage comparator is further connected with the output end of the three-phase bridge rectifier circuit through a resistor R2, the output end of the first voltage comparator is connected with the gate of the MOSFET of the corresponding upper bridge arm, and the output end of the second voltage comparator is connected with the grid electrode of the MOSFET of the corresponding lower bridge arm.

4. The control system of the all-MOS synchronous rectification voltage regulator for the motorcycle of claim 1, wherein the main control unit employs an integrated chip MST2101, a VSEN pin of the integrated chip MST2101 is connected to an output terminal of the three-phase bridge rectifier circuit through a resistor R47, a VREF pin is grounded after sequentially passing through a resistor R48, a resistor R49 and a resistor R50 which are connected in series, a VCH pin is connected between a resistor R48 and a resistor R49, a VCL pin is connected between a resistor R49 and a resistor R50, a DRV1 pin, a DRV2 pin and a DRV3 pin are respectively connected to an input terminal of the corresponding phase pulse management unit, a PH1 pin, a PH2 pin and a PH3 pin are respectively connected to three input terminals of the three-phase bridge rectifier circuit, a voltage at the VCH pin is set to an upper limit setting voltage, and a voltage at the VCL pin is set to a lower limit setting voltage.

5. The control system of the all-MOS synchronous rectification voltage regulator for motorcycles according to claim 1, wherein the set dead time is 0 to 50 us.