CN210328148U - Interconnection structure between millimeter wave active antenna unit and PCB - Google Patents

Abstract

The utility model relates to an interconnect structure between millimeter wave active antenna unit and PCB board, interconnect structure between PCB board include mainboard and AIP antenna module. The first multilayer PCB board is provided with a first ground pad, a signal transmission line and a first pad electrically connected with the signal transmission line. The second multilayer PCB board is provided with a second ground pad, a second pad and a signal processing circuit. The second ground pad is lap-welded to the first ground pad. The interconnection structure between the PCBs saves expensive millimeter wave interconnection components and has low cost; on the other hand, the interconnection design among the multilayer PCBs can be realized in a mode of direct welding among the PCBs, the integration level is greatly improved, and the miniaturization design of millimeter wave equipment is facilitated; in addition, the first ground pad on the first multilayer PCB is connected with the second ground pad on the second multilayer PCB in an overlaying and welding mode, the ground plane interconnection area is increased, the stability and the reliability of the single board are improved physically, and therefore the long-term reliability of interconnection among the PCBs can be guaranteed.

Description

Interconnection structure between millimeter wave active antenna unit and PCB

Technical Field

The utility model relates to a millimeter wave communication technology field especially relates to a millimeter wave active antenna unit and interconnect structure between PCB board.

Background

With the development of 5G communication technology, millimeter waves have significant advantages in large bandwidth and high-rate communication. The 5G system needs overall planning and complementary advantages of Sub-6GHz and millimeter wave frequency bands. The 5G millimeter wave can be widely applied to scenes such as a small base station, a CPE (customer premise equipment), a Repeater and the like. For a millimeter wave AAU (Active Antenna Unit) product, the product includes an AIP (Antenna in package) Antenna module and a motherboard connected to the AIP Antenna module. The antenna radiation unit of the AIP antenna module is positioned on the surface layer (the multilayer means not less than two layers) of the multilayer PCB, and the interconnection millimeter wave signal line of the AIP antenna module and the mainboard is positioned at the bottom of the multilayer PCB to complete the interconnection between the AIP antenna module and the mainboard. However, the conventional AIP antenna module usually adopts the BGA ball-mounting method to complete the inter-board interconnection design, which is costly, or adopts the millimeter wave AAU product obtained by the PCB board soldering process, which is low in cost, but has limited long-term reliability of the interconnection between the PCBs.

SUMMERY OF THE UTILITY MODEL

Therefore, it is necessary to overcome the defects of the prior art and provide an interconnection structure between a millimeter wave active antenna unit and a PCB, which can ensure the long-term reliability of the interconnection between PCBs while achieving low cost.

The technical scheme is as follows: an inter-PCB board interconnect structure comprising: the main board is a first multilayer PCB board which is provided with a first ground pad, a signal transmission line and a first pad electrically connected with the signal transmission line; the AIP antenna module, the AIP antenna module is second multilayer PCB board, second multilayer PCB board is equipped with second ground pad, second pad and signal processing circuit, the second pad with first pad superpose welded connection, the second pad with signal processing circuit electric connection, the second ground pad with first pad superpose welded connection.

In the interconnection structure between the PCBs, the main board and the AIP antenna module adopt a direct welding interconnection mode between the multilayer PCBs, so that on one hand, expensive millimeter wave interconnection components (such as axes, waveguides and the like) are saved, and the cost is very low; on the other hand, the reliability of the product is improved by the mode of direct welding between the boards, the interconnection design among the multilayer PCBs can be realized, the integration level among the multilayer PCBs is greatly improved, and the miniaturization design of millimeter wave equipment is facilitated; in addition, the first ground pad on the first multilayer PCB is connected with the second ground pad on the second multilayer PCB in an overlaying and welding mode, the ground plane interconnection area is increased, the stability and the reliability of the single board are improved physically, and therefore the long-term reliability of interconnection among the PCBs can be guaranteed. In addition, the first ground pad and the first pad are arranged adjacently and are closer to each other, and the second ground pad and the second pad are arranged adjacently and are closer to each other, so that the inductance effect of a backflow path can be reduced, insertion loss is reduced, and standing waves are improved.

In one embodiment, the first pad is located on a top circuit layer of the first multilayer PCB, the top circuit layer of the first multilayer PCB comprises a first grounding conductive layer, and the first grounding pad is laid on the first grounding conductive layer; the second pad is located the bottom circuit layer of second multilayer PCB board, the bottom circuit layer of second multilayer PCB board includes second ground connection conducting layer, the second pad is laid in second ground connection conducting layer.

In one embodiment, the number of the first ground pads is more than two, and the more than two first ground pads are laid on the first ground conductive layer; the number of the second grounding pads is more than two, and the more than two second grounding pads are laid on the second grounding conductive layer; and more than two second ground pads are in one-to-one correspondence overlaying welding connection with more than two first ground pads.

In one embodiment, more than one first ground pad is respectively arranged on two sides of the first pad; more than one second grounding pad is respectively arranged on two sides of the second bonding pad.

In one embodiment, the signal transmission line is located on a bottom circuit layer of the first multilayer PCB, the first multilayer PCB is provided with a first signal hole penetrating from the first pad to the signal transmission line, and the signal transmission line is electrically connected with the first pad through a conductive layer on a side wall of the first signal hole.

In one embodiment, the bottom circuit layer of the first multilayer PCB comprises a third ground conductive layer, the third ground conductive layer is provided with a first gap area, the signal transmission line is located in the first gap area, and the outer edge of the signal transmission line is spaced from the inner edge of the first gap area;

the first grounding conducting layer is provided with a second gap area, the first pad is positioned in the second gap area, and the outer edge of the first pad and the inner edge of the second gap area are arranged at intervals;

the second grounding conducting layer is provided with a third gap area, the second pad is located in the third gap area, and the second pad and the inner edge of the third gap area are arranged at intervals.

In one embodiment, the first multilayer PCB further comprises one or more inner circuit layers disposed between the bottom circuit layer and the top circuit layer of the first multilayer PCB, and the inner circuit layers of the first multilayer PCB are provided with a first anti-pad gap region around the first signal hole.

In one embodiment, the first multilayer PCB is further provided with a first ground hole, the first ground hole penetrates from the first ground pad to the bottom circuit layer of the first multilayer PCB, and the conductive layer on the side wall of the first ground hole is electrically connected with the ground conductive layer of each layer of the first multilayer PCB;

the second multilayer PCB board is also provided with a second ground hole, the second ground hole penetrates through the second ground pad to the top layer circuit layer of the second multilayer PCB board, and the conducting layer of the side wall of the second ground hole is electrically connected with the grounding conducting layer of each layer of the second multilayer PCB board.

In one embodiment, the first multilayer PCB is further provided with more than one third ground hole, the third ground hole penetrates from the first ground conductive layer to the top circuit layer of the first multilayer PCB, the conductive layer on the side wall of the third ground hole is electrically connected with the ground conductive layer of each layer of the first multilayer PCB, and the third ground holes are arranged at intervals along the arrangement direction of the signal transmission lines;

the second multilayer PCB board still is equipped with more than one fourth ground hole, the fourth ground hole is followed the second ground connection conducting layer runs through to the top layer circuit layer of second multilayer PCB board, the conducting layer of the lateral wall in fourth ground hole with the ground connection conducting layer electric connection of each layer of second multilayer PCB board, the fourth ground hole along the direction interval that sets up of second pad sets up.

A millimeter wave active antenna unit comprises the interconnection structure between PCBs.

The millimeter wave active antenna unit comprises the interconnection structure between the PCBs, so that the technical effect is brought by the interconnection structure between the PCBs, and the millimeter wave active antenna unit has the same beneficial effect as the interconnection structure between the PCBs, and is not repeated.

Drawings

Fig. 1 is a schematic structural diagram of an interconnection structure between PCBs according to an embodiment of the present invention;

fig. 2 is a structural diagram of a bottom circuit layer of a motherboard of an interconnection structure between PCBs according to an embodiment of the present invention;

fig. 3 is a structural diagram of an inner circuit layer of a motherboard of an interconnection structure between PCBs according to an embodiment of the present invention;

fig. 4 is a structural diagram of a top circuit layer of a motherboard of an inter-PCB interconnection structure according to an embodiment of the present invention;

fig. 5 is a structural diagram of a bottom circuit layer of an AIP antenna module of an interconnection structure between PCBs according to an embodiment of the present invention;

fig. 6 is a structural diagram of an inner circuit layer of an AIP antenna module according to an embodiment of the present invention;

fig. 7 is a three-dimensional electromagnetic simulation scattering parameter curve diagram of the interconnection structure between PCBs according to an embodiment of the present invention.

Reference numerals:

10. a first multi-layered PCB board, 11, a signal transmission line, 12, a first pad, 13, a bottom layer circuit layer, 131, a third ground conductive layer, 132, a first gap region, 14, a top layer circuit layer, 141, a first ground conductive layer, 142, a second gap region, 143, a first ground pad, 15, a first signal hole, 16, an inner layer circuit layer, 161, a first antipad gap region, 17, a first dielectric layer, 18, a second dielectric layer, 191, a hollow gap, 192, a first ground hole, 193, a third ground hole, 20, a second multi-layered PCB board, 21, a second pad, 22, an impedance matching transformation stub, 23, an impedance line, 24, a signal processing circuit, 25, a bottom layer circuit layer, 251, a second ground conductive layer, 252, a third gap region, 253, a second ground pad, 26, an inner layer circuit layer, 261, a second antipad gap region, 27, an auxiliary welding hole, 271, an auxiliary welding conductive layer, 272. an auxiliary pad 281, a second ground hole 282, a fourth ground hole 291, a third dielectric layer 292, a fourth dielectric layer 293, a fifth dielectric layer 294, and a top wiring layer.

Detailed Description

In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein, as those skilled in the art will be able to make similar modifications without departing from the spirit and scope of the present invention.

In the description of the present invention, it is to be understood that the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

In the description of the present invention, it is to be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly connected" to another element, there are no intervening elements present.

In one embodiment, referring to fig. 1 to 5, an interconnect structure between PCBs includes a main board and an AIP antenna module. The main board is a first multilayer PCB board 10, and the first multilayer PCB board 10 is provided with a first ground pad 143, a signal transmission line 11, and a first pad 12 electrically connected to the signal transmission line 11. The AIP antenna module is a second multilayer PCB 20, the second multilayer PCB 20 is provided with a second land 253, a second land 21 and a signal processing circuit 24, the second land 21 is connected to the first land 12 by overlaying welding, the second land 21 is connected to the signal processing circuit 24 by electrical connection, and the second land 253 is connected to the first land 143 by overlaying welding. The signal processing circuit 24 may be a power divider processing circuit or other millimeter wave processing circuit. Further, the signal transmission line 11 is embodied as a GCPW (ground-coplanar waveguide) transmission line, a microstrip line, or other types of transmission lines.

In the interconnection structure between the PCBs, the main board and the AIP antenna module adopt a direct welding interconnection mode between the multilayer PCBs, so that on one hand, expensive millimeter wave interconnection components (such as axes, waveguides and the like) are saved, and the cost is very low; on the other hand, the reliability of the product is improved by the mode of direct welding between the boards, the interconnection design among the multilayer PCBs can be realized, the integration level among the multilayer PCBs is greatly improved, and the miniaturization design of millimeter wave equipment is facilitated; in addition, the first ground pad 143 on the first multi-layer PCB 10 and the second ground pad 253 on the second multi-layer PCB 20 are connected by overlaying and welding, so that the ground plane interconnection area is increased, and the physical single-board stability and reliability are improved, thereby ensuring the long-term reliability of interconnection between PCBs. In addition, the first ground pad 143 is disposed adjacent to the first pad 12 at a short distance, and the second ground pad 253 is disposed adjacent to the second pad 21 at a short distance, so that the inductance effect of the return path can be reduced, the insertion loss can be reduced, and the standing wave can be improved.

Further, referring to fig. 4 and 5, the first pad 12 is located on the top circuit layer 14 of the first multilayer PCB 10, the top circuit layer 14 of the first multilayer PCB 10 includes a first ground conductive layer 141, and the first ground pad 143 is disposed on the first ground conductive layer 141. The second pad 21 is located on the bottom circuit layer 25 of the second multi-layer PCB 20, the bottom circuit layer 25 of the second multi-layer PCB 20 includes a second ground conductive layer 251, and the second ground pad 253 is laid on the second ground conductive layer 251.

Further, referring to fig. 4 and 5, the number of the first ground pads 143 is two or more, and the two or more first ground pads 143 are disposed on the first ground conductive layer 141; the number of the second ground pads 253 is two or more, and the two or more second ground pads 253 are laid on the second ground conductive layer 251; and two or more second ground pads 253 are stacked and soldered to two or more first ground pads 143 in a one-to-one correspondence.

In one embodiment, referring to fig. 4 and 5, more than one first ground pad 143 is disposed on two sides of the first pad 12. More than one second land 253 is disposed on each of both sides of the second land 21. Specifically, two first ground pads 143 are spaced apart from one side of the first pad 12, and two first ground pads 143 are spaced apart from the other side; accordingly, two second pads 253 are spaced apart from one side of the second pad 21, and two second pads 253 are also spaced apart from the other side of the second pad 21. The first and second ground pads 143 and 253 should have an area as large as possible according to design requirements to maximize the ground plane interconnection area of the first and second multi-layer PCB boards 10 and 20. In addition, the shapes and the numbers of the first land pads 143 and the second land pads 253 are not limited to this embodiment, and for example, rectangular pads whose number is larger than 4 may be used, or the first land pads 12, the first land pads 143 on both sides of the second land pad 21, the second land pads 253 may be combined into one large land pad, or the like.

In one embodiment, referring to fig. 1 and 2, the signal transmission line 11 is located on a bottom circuit layer 13 of the first multilayer PCB 10, the first multilayer PCB 10 is provided with a first signal hole 15 penetrating from the first pad 12 to the signal transmission line 11, and the signal transmission line 11 is electrically connected to the first pad 12 through a conductive layer on a sidewall of the first signal hole 15. In this way, the signal transmission line 11 on the bottom circuit layer 13 of the first multilayer PCB 10 can be electrically connected to the first pad 12 of the top circuit layer 14 through the first signal hole 15, and is electrically connected to the second pad 21 on the second multilayer PCB 20 through the first pad 12, so as to transmit the signal to the signal processing circuit 24. The signal transmission on different planes can be realized, the interconnection design among multiple layers of PCBs can be realized, and the stability and the machinability are greatly enhanced.

In one embodiment, referring to fig. 1 and 2, the bottom circuit layer 13 of the first multi-layer PCB 10 includes a third ground conductive layer 131, the third ground conductive layer 131 has a first gap area 132, the signal transmission line 11 is located in the first gap area 132, and an outer edge of the signal transmission line 11 is spaced apart from an inner edge of the first gap area 132. The third ground conductive layer 131 is disposed to surround the signal transmission line 11, and thus, the transmission of higher modes of the signal transmission line 11 can be effectively prevented, thereby improving the performance of the signal transmission line 11. In addition, the short circuit phenomenon caused by the electrical connection between the signal transmission line 11 and the third grounding conductive layer 131 can be avoided. The spacing distance between the outer edge of the signal transmission line 11 and the inner edge of the first notch area 132 can be determined according to the design rule of the signal transmission line 11 (microstrip line or GCPW transmission line), which is not described in detail herein.

In one embodiment, referring to fig. 1 and 4, the first ground conductive layer 141 is provided with a second gap area 142, the first pad 12 is located in the second gap area 142, and an outer edge of the first pad 12 is spaced apart from an inner edge of the second gap area 142. In this way, the first grounding conductive layer 141 is wrapped around the first pad 12, so as to prevent the first pad 12 from being electrically connected to the first grounding conductive layer 141 and causing a short circuit. The spacing distance between the outer edge of the first pad 12 and the inner edge of the second notch area 142 can be determined according to electromagnetic simulation and processing requirements, and is generally 0.2 mm.

In one embodiment, referring to fig. 1 and 5, the second ground conductive layer 251 is provided with a third gap area 252, the second pad 21 is located in the third gap area 252, and the inner edges of the second pad 21 and the third gap area 252 are spaced apart. In this manner, the second ground conductive layer 251 is also wrapped around the second pad 21, and thus, transmission of higher order modes can be effectively prevented, thereby improving performance. In addition, the short circuit phenomenon caused by the electrical connection between the second pad 21 and the third grounding conductive layer 131 can also be avoided. The spacing distance between the outer edge of the second pad 21 and the inner edge of the third notch area 252 may be determined according to a specific design rule, which is not described in detail.

In one embodiment, referring to fig. 1 and 3, the first multi-layer PCB 10 further includes one or more inner circuit layers 16 disposed between the bottom circuit layer 13 and the top circuit layer 14 of the first multi-layer PCB 10, and the inner circuit layers 16 of the first multi-layer PCB 10 are provided with a first antipad gap area 16 around the first signal hole 15. Thus, the first anti-pad gap region 16 isolates the conductive layer of the sidewall of the first signal hole 15 from the inner circuit layer 16, thereby avoiding the occurrence of short circuit. Specifically, the number of the inner circuit layers 16 may be one, or may be two, three, or four, without limitation.

In one embodiment, referring to fig. 1 to 4, the first multi-layer PCB 10 further has a first ground hole 192, the first ground hole 192 penetrates from the first ground pad 143 to the bottom circuit layer 13 of the first multi-layer PCB 10, and the conductive layer of the sidewall of the first ground hole 192 is electrically connected to the ground conductive layer of each layer of the first multi-layer PCB 10.

Referring to fig. 1, 5 and 6, the second multi-layer PCB 20 further has a second ground hole 281, the second ground hole 281 penetrates from the second ground pad 253 to the top circuit layer 294 of the second multi-layer PCB 20, and a conductive layer of a sidewall of the second ground hole 281 is electrically connected to a ground conductive layer of each layer of the second multi-layer PCB 20.

Specifically, the first ground hole 192 and the second ground hole 281 are two or more, so that the ground conductive layers of the first multi-layer PCB 10 can be well connected to each other, and the ground conductive layers of the second multi-layer PCB 20 can be well connected to each other. In addition, for high-frequency signals, the first ground hole 192 and the second ground hole 281 are added, so that the signals flow back nearby, the inductive effect can be reduced, and the signal quality is better.

In one embodiment, referring to fig. 1 to 4, the first multi-layer PCB 10 further has more than one third ground holes 193, the third ground holes 193 penetrate from the first ground conductive layer 141 to the top circuit layer 14 of the first multi-layer PCB 10, the conductive layer of the sidewall of the third ground holes 193 is electrically connected to the ground conductive layer of each layer of the first multi-layer PCB 10, and the third ground holes 193 are disposed at intervals along the disposition direction of the signal transmission lines 11. In this way, the first grounding conductive layer 141 is disposed around the signal transmission line 11, and the third grounding holes 193 (the specific number and position are determined according to the design) are disposed around the signal transmission line 11, so as to effectively prevent the transmission of the higher mode of the millimeter wave transmission line and improve the performance of the signal transmission line 11.

In addition, referring to fig. 5 and 6, the second multi-layer PCB 20 further has at least one fourth ground hole 282, the fourth ground hole 282 penetrates from the second ground conductive layer 251 to the top circuit layer 294 of the second multi-layer PCB 20, the conductive layer of the sidewall of the fourth ground hole 282 is electrically connected to the ground conductive layer of each layer of the second multi-layer PCB 20, and the fourth ground holes 282 are spaced apart along the arrangement direction of the second pads 21. In this way, the second ground conductive layer 251 wraps the second pad 21, and the fourth ground holes 282 are disposed around the second pad 21 (the specific number and location are determined according to the design), so that the high-order mode transmission of the millimeter wave transmission line can be effectively prevented, and the performance can be improved.

In one embodiment, two or more third ground holes 193 are disposed at intervals on both sides of the signal transmission line 11; two or more fourth ground holes 282 are formed at intervals on both sides of the second pad 21.

Further, referring to fig. 1 and 5, the second multi-layer PCB 20 further includes an impedance matching transformation branch 22 and an impedance line 23 between the second pad 21 and the signal processing circuit 24. The second bonding pad 21 is electrically connected to the impedance line 23 through the impedance matching transformation branch 22. The impedance line 23 is electrically connected to the signal processing circuit 24. Thus, the impedance matching transformation branch 22 and the impedance line 23 are arranged between the second bonding pad 21 and the signal processing circuit 24, and the specific design size of the impedance matching transformation branch 22 and the impedance line 23 can be designed according to the corresponding simulation of the specific working frequency, so that the method is suitable for a wider frequency range and a wider range of the laminated number.

Further, referring to fig. 1 and 5, the second bonding pad 21, the impedance matching transformation branch 22 and the impedance line 23 are all located in the third notched area 252, and the outer edges of the second bonding pad 21, the impedance matching transformation branch 22 and the impedance line 23 are all spaced apart from the inner edge of the third notched area 252. In this manner, the second ground conductive layer 251 is wrapped around the second pad 21, the impedance matching transformation branch 22, and the impedance line 23, and thus, the high-order mode transmission of the impedance matching transformation branch 22 and the impedance line 23 can be effectively prevented, and the performance of the impedance matching transformation branch 22 and the impedance line 23 can be improved. In addition, the short circuit phenomenon caused by the electrical connection of the impedance matching transformation branch 22 and the impedance line 23 with the second grounding conductive layer 251 can also be avoided. The spacing distance between the outer edges of the impedance matching transformation branch 22 and the impedance line 23 and the inner edge of the third notch area 252 can be determined according to the design rule of the impedance matching transformation branch 22 and the impedance line 23 (microstrip line or GCPW transmission line), which is not described in detail.

Further, referring to fig. 1, the first multi-layer PCB 10 further includes a first dielectric layer 17 disposed between the bottom circuit layer 13 and the inner circuit layer 16 of the first multi-layer PCB 10, and a second dielectric layer 18 disposed between the top circuit layer 14 and the inner circuit layer 16 of the first multi-layer PCB 10. The first dielectric layer 17 is a high frequency dielectric layer, and the second dielectric layer 18 is an RF4 dielectric layer. The high-frequency dielectric layer may be Rogers4350, Rogers5880, or the like, and the second dielectric layer 18 is made of RF4 board with relatively low cost. The material cost of the first multi-layer PCB 10 can be reduced by stacking the layers together using a hybrid lamination process.

Further, referring to fig. 1 again, a partial region of the first multi-layer PCB 10 is overlapped with a partial region of the second multi-layer PCB 20, and an overlapping region of the first multi-layer PCB 10 overlapping with the second multi-layer PCB 20 includes a first overlapping region i and a second overlapping region ii connected to the first overlapping region, and the first overlapping region is closer to a plate edge of the first multi-layer PCB 10 than the second overlapping region. The first pads 12 are located at the second stacking region, and the second pads 21 are located at an end of the second multi-layer PCB panel 20 and are disposed corresponding to the second stacking region. The first overlapping area and the part corresponding to the impedance matching transformation branch 22 are provided with hollowed-out notches 191. Specifically, the hollow-out gap 191 is a groove vertically dug from top to bottom on the first multi-layer PCB 10 based on the width of the impedance matching transformation branch 22 in the first overlapping region, and the groove penetrates through the first multi-layer PCB 10, so as to avoid the second dielectric layer 18 from adversely affecting the signal on the signal line of the second multi-layer PCB 20 (for example, the defects of standing wave increase and insertion loss increase).

Further, the first multi-layer PCB board 10 further includes a third stacking region iii connected to the second stacking region, a portion of the first pad 12 is located in the second stacking region, and another portion of the first pad 12 is located in the third stacking region. In this way, during the soldering operation of the first pad 12 and the second pad 21, solder can be placed on the first pad 12 at a portion corresponding to the third overlapping area, so that the soldering performance between the first pad 12 and the second pad 21 is improved. In addition, the portion of the first pad 12 corresponding to the second overlap region is overlapped and soldered with the second pad 21, and the reliability of signal connection can be ensured.

Further, referring to fig. 1 to 4, the end of the second multi-layer PCB 20 is provided with an auxiliary solder hole 27 corresponding to the second solder pad 21. The auxiliary welding hole 27 penetrates from the top layer of the second multilayer PCB 20 to the second pad 21, and an auxiliary welding conductive layer 271 is disposed on a sidewall of the auxiliary welding hole 27. Therefore, soldering tin can be placed on the side wall of the auxiliary welding hole 27, so that the welding performance between the first bonding pad 12 and the second bonding pad 21 is improved, the overlapping welding of the part of the first bonding pad 12 corresponding to the second overlapping area and the second bonding pad 21 is facilitated, and the reliability of signal connection can be ensured. Specifically, the auxiliary welding holes 27 are auxiliary welding semicircular holes. In the design, an auxiliary welding semicircular hole is formed through back drilling or a sink process, and under the condition of meeting weldability, the height of the auxiliary welding conducting layer 271 on the side wall of the auxiliary welding hole 27 is as small as possible (namely, the length of the branch is as short as possible), so that adverse effects on millimeter wave signals are avoided.

In one embodiment, referring to fig. 1, 5 and 6 again, the second multi-layer PCB 20 is provided with an inner circuit layer 26, the inner circuit layer 26 of the second multi-layer PCB 20 is provided with a second anti-pad gap region 261 around the auxiliary bonding hole 27, and the second anti-pad gap region 261 is provided with an auxiliary bonding pad 272 electrically connected to the auxiliary bonding conductive layer 271. Thus, the second anti-pad-gap region 261 isolates the auxiliary bonding conductive layer 271 of the sidewall of the auxiliary bonding hole 27 from the inner circuit layer 26, thereby preventing a short circuit. In addition, the auxiliary pad 272 is added to the second anti-pad notch region 261 of the inner layer wiring layer 26 of the second multi-layer PCB panel 20, mainly to increase the interconnection reliability of the vertically arranged auxiliary solder semi-circular hole.

Specifically, the number of the inner circuit layers 26 of the second multilayer PCB 20 may be one, two, three, or four, without limitation.

In one embodiment, the second multi-layer PCB 20 is provided with more than two inner-layer circuit layers 26, the second multi-layer PCB 20 further includes a third dielectric layer 291 disposed between the bottom circuit layer 25 and the inner-layer circuit layer 26 of the second multi-layer PCB 20, a fourth dielectric layer 292 disposed between adjacent inner-layer circuit layers 26 of the second multi-layer PCB 20, and a fifth dielectric layer 293 disposed between the top circuit layer 294 and the inner-layer circuit layers 26 of the second multi-layer PCB 20. The third dielectric layer 291 and the fifth dielectric layer 293 are high frequency dielectric layers, and the fourth dielectric layer 292 is an RF4 dielectric layer. The high-frequency dielectric layer may be Rogers4350, Rogers5880, or the like, and the second dielectric layer 18 is made of RF4 board with relatively low cost. The material cost of the second multi-layer PCB board 20 can be reduced by stacking the layers together using a co-extrusion lamination process.

The first pad 12 is as small as possible under the condition of satisfying the solderability, so as to reduce the difficulty of the matching design, and the size of the embodiment is specifically 1mm × 2 mm.

Further, the length and width of the impedance matching transformation stub 22 can be determined according to electromagnetic simulation, and the size of the embodiment is specifically 1.95mm by 0.5 mm. In addition, the impedance of the impedance line 23 may be determined according to electromagnetic simulation, specifically 50Ohm in this embodiment. Alternatively, the impedance matching transformation branch 22 may be stepped (i.e., a multi-step impedance suitable for matching in a wider frequency band), or may be in a shape with a gradually changing width (i.e., chebyshev transition matching).

Referring to fig. 7, fig. 7 is a diagram of an electromagnetic simulation result according to an embodiment of the present invention, and it can be known from simulation that, in a frequency range of 24GHz-28GHz, an insertion loss of the interconnection structure of the first multilayer PCB 10 and the second multilayer PCB 20 is less than 0.6dB, and a return loss is less than-18 dB, so that a high performance index of the interconnection structure between different planes of the first multilayer PCB 10 and the second multilayer PCB 20 is achieved.

In one embodiment, a millimeter wave active antenna unit includes a PCB to board interconnect structure as described in any of the above embodiments.

The millimeter wave active antenna unit comprises the interconnection structure between the PCBs, so that the technical effect is brought by the interconnection structure between the PCBs, and the millimeter wave active antenna unit has the same beneficial effect as the interconnection structure between the PCBs, and is not repeated.

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only represent some embodiments of the present invention, and the description thereof is specific and detailed, but not to be construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.

Claims (10)

1. An interconnect structure between PCBs, comprising:

the main board is a first multilayer PCB board which is provided with a first ground pad, a signal transmission line and a first pad electrically connected with the signal transmission line;

the AIP antenna module, the AIP antenna module is second multilayer PCB board, second multilayer PCB board is equipped with second ground pad, second pad and signal processing circuit, the second pad with first pad superpose welded connection, the second pad with signal processing circuit electric connection, the second ground pad with first pad superpose welded connection.

2. The PCB inter-board interconnection structure of claim 1, wherein the first pad is located on a top circuit layer of the first multi-layer PCB, the top circuit layer of the first multi-layer PCB comprises a first grounding conductive layer, and the first ground pad is laid on the first grounding conductive layer;

the second pad is located the bottom circuit layer of second multilayer PCB board, the bottom circuit layer of second multilayer PCB board includes second ground connection conducting layer, the second pad is laid in second ground connection conducting layer.

3. The interconnection structure between PCBs as claimed in claim 2, wherein the number of the first ground pads is two or more, and the two or more first ground pads are laid on the first ground conductive layer; the number of the second grounding pads is more than two, and the more than two second grounding pads are laid on the second grounding conductive layer; and more than two second ground pads are in one-to-one correspondence overlaying welding connection with more than two first ground pads.

4. The interconnection structure between PCBs as claimed in claim 3, wherein more than one first ground pad is disposed on each side of the first pad; more than one second grounding pad is respectively arranged on two sides of the second bonding pad.

5. The interconnect structure of claim 2, wherein the signal transmission line is located on a bottom circuit layer of the first multi-layer PCB, the first multi-layer PCB is provided with a first signal hole penetrating from the first pad to the signal transmission line, and the signal transmission line is electrically connected to the first pad through a conductive layer on a sidewall of the first signal hole.

6. The PCB-to-PCB interconnection structure of claim 5, wherein the bottom circuit layer of the first multi-layer PCB comprises a third ground conductive layer, the third ground conductive layer is provided with a first gap area, the signal transmission line is positioned in the first gap area, and the outer edge of the signal transmission line is spaced from the inner edge of the first gap area;

the first grounding conducting layer is provided with a second gap area, the first pad is positioned in the second gap area, and the outer edge of the first pad and the inner edge of the second gap area are arranged at intervals;

the second grounding conducting layer is provided with a third gap area, the second pad is located in the third gap area, and the second pad and the inner edge of the third gap area are arranged at intervals.

7. The inter-PCB interconnect structure of claim 6, wherein the first multi-layer PCB further comprises one or more inner layer trace layers disposed between a bottom trace layer and a top trace layer of the first multi-layer PCB, the inner layer trace layers of the first multi-layer PCB being provided with a first anti-pad relief area around the first signal hole.

8. The PCB-to-PCB interconnection structure of claim 6, wherein the first multi-layer PCB is further provided with a first ground hole penetrating from the first ground pad to a bottom circuit layer of the first multi-layer PCB, and the conductive layer of the side wall of the first ground hole is electrically connected with the ground conductive layer of each layer of the first multi-layer PCB;

the second multilayer PCB board is also provided with a second ground hole, the second ground hole penetrates through the second ground pad to the top layer circuit layer of the second multilayer PCB board, and the conducting layer of the side wall of the second ground hole is electrically connected with the grounding conducting layer of each layer of the second multilayer PCB board.

9. The interconnection structure between PCBs as claimed in any one of claims 2 to 8, wherein the first multi-layer PCB is further provided with one or more third ground holes penetrating from the first ground conductive layer to the top circuit layer of the first multi-layer PCB, the conductive layer of the sidewall of the third ground hole is electrically connected to the ground conductive layer of each layer of the first multi-layer PCB, and the third ground holes are spaced along the arrangement direction of the signal transmission lines;

the second multilayer PCB board still is equipped with more than one fourth ground hole, the fourth ground hole is followed the second ground connection conducting layer runs through to the top layer circuit layer of second multilayer PCB board, the conducting layer of the lateral wall in fourth ground hole with the ground connection conducting layer electric connection of each layer of second multilayer PCB board, the fourth ground hole along the direction interval that sets up of second pad sets up.

10. A millimeter wave active antenna element comprising the PCB inter-board interconnect structure of any of claims 1 to 9.

Images