CN210137482U

CN210137482U - Structure and packaging body of circuit board and carrier plate

Info

Publication number: CN210137482U
Application number: CN201822118335.XU
Authority: CN
Inventors: 王忠宝
Original assignee: Individual
Current assignee: Individual
Priority date: 2017-12-18
Filing date: 2018-12-17
Publication date: 2020-03-10
Anticipated expiration: 2028-12-17

Abstract

The utility model discloses a structure and packaging body that a circuit board and a carrier plate are combined, wherein, the circuit board at least has a circuit and a solder mask layer, the carrier plate at least has a component, the solder mask layer can have a reserved opening (or a through opening) corresponding to the circuit, the reserved opening will be removed in the manufacturing process of the packaging body, the circuit can be used for external electric connection, one surface of the solder mask layer is jointed with one surface of the circuit, the other surface is jointed with one surface of the carrier plate, wherein, because the lower surface of the carrier plate can be provided with the solder mask layer, and the solder mask layer is arranged between the circuit and the carrier plate, and according to the requirement, the solder mask layer has the reserved opening, the reserved opening is composed of a part of the solder mask layer, accordingly, the reserved opening does not penetrate through the solder mask layer, thereby, the utility model can avoid the circuit of the circuit board from being attacked by the etching solution to cause damage, and can improve the structure rigidity (rigidity) of, to avoid damage that could cause bending and/or breaking.

Description

Structure and packaging body of circuit board and carrier plate

Technical Field

The utility model relates to the field of semiconductor technology, concretely relates to structure and packaging body of circuit board and support plate, especially indicate the structure and the packaging body of circuit board and support plate that supply semiconductor chip to use.

Background

As shown in fig. 11-1 to 11-4, a method for manufacturing a package 1A according to the related art will be described below: referring to fig. 11-1, a cross-sectional view of a prior art package 1A is shown, first, a prior art circuit board 5A and a detachable carrier 8K are provided, wherein the circuit board 5A comprises an insulator 4H and a circuit 35 for power transmission, the insulator 4H has an upper surface 41, a lower surface 42 and a through hole (via)44, the circuit 35 has an upper surface 31, a lower surface 32 and a side 33, the circuit 35 is disposed on the lower surface 42 of the insulator 4H, and the lower surface 32 and the side 33 are bonded to the insulator 4H, wherein the portion of the lower surface 32 exposed by the through hole 44 is implemented as a contact (terminal)324, for external electrical connection, the upper surface 31 is exposed on the lower surface 42 of the insulator 4H, the thickness T of the insulator 4H is determined by the thickness T4 between the upper surface 41 and the lower surface 32 of the circuit 35, and a thickness T3 of the line 35, the thickness T3 of the line 35 being 15-30 micrometers (mum); the carrier plate 8K is composed of a copper foil substrate (copper clad laminate)8A, a curing adhesive (preprig) 8B and a detachable copper foil 8C, the copper foil substrate 8A is composed of two copper foils 8A1 and an adhesive 8A2, the adhesive 8A2 is composed of a curing adhesive or other suitable adhesive, wherein the adhesive 8A2 is formed by bonding the two copper foils 8A1 together, the adhesive 8A2 is between the two copper foils 8A1, the detachable copper foil 8C is composed of two copper foils and a film layer (not shown) bonding the two copper foils together, and the film layer is between the two copper foils, wherein one copper foil bonded to the film layer is formed as a bonding layer 8C1, the other copper foil bonded to the film layer is formed as a detachable layer 8C2, and the detachable layer 8C2 is bonded to the substrate 8A by the curing adhesive 8B, the detachable copper foil layer 8C1 and the detachable copper layer (copper layer) are composed of other suitable metals or other suitable metals such as a copper layer 2 and/or a detachable copper layer (copper layer) A layer composition, wherein a carrier 8K is disposed on the lower surface 42 of the insulator 4H of the circuit board 5A and is bonded to the lower surface 42 of the insulator 4H of the circuit board 5A by a bonding layer 8C1 so that the upper surface 31 of the wiring 35 is not exposed to the atmosphere, wherein the lower surface of the bonding layer 8C1 is implemented as a lower surface 82 of the carrier 8K and the upper surface of the copper foil substrate 8A is implemented as an upper surface 81 of the carrier 8K, and then a chip (chip)20 and a conductive member 18 implemented as a conductive wire are provided, wherein the chip 20 is disposed on the upper surface 41 of the insulator 4H and then is bonded to the terminals 24 of the chip 20 and the terminals 324 of the wiring 35 by the conductive members 18, respectively, so that the chip 20 is electrically connected to the circuit board 5A, and then a plastic 60 is provided, and the plastic 60 covers the chip 20, the conductive member 18 and the surface of the; next, as shown in the cross-sectional view of the manufacturing method of the package 1A in the prior art shown in fig. 11-2, a detaching step (process) is provided to detach the bonding layer 8C1 and the detaching layer 8C2 of the carrier 8K, so that the detaching layer 8C2, the curing adhesive 8B and the copper foil substrate 8A are removed simultaneously, wherein the removing step is performed with an etching solution; next, as shown in fig. 11-3, which is a bottom view, an etching (etching) removing process is provided to remove the bonding layer 8C1 of the detachable copper foil, so that the upper surface 31 of the trace 35 is exposed on the lower surface 42 of the insulator 4H; then, as shown in the cross-sectional view of the prior art package 1A shown in FIG. 11-4, a solder ball S is provided as required, and the solder ball S is bonded to the upper surface 31 of the circuit 35, so that the chip 20 can be electrically connected to the outside through the solder ball S; from the above description, it is clear that the circuit board 5A has at least the following disadvantages, which are explained below: 1) as shown in fig. 11-4, the thickness T3 of the circuit 35 is usually greater than 15 μm, and after the circuit 35 is bonded to the solder ball S, when the solder ball S is pulled by an external force F, a delamination (delamination) or a gap G is easily generated at the junction between the lower surface 32 of the circuit 35 and the insulator 4H, so that the electrical transmission between the circuit 35 and the conductive member 18 is unstable, and even the package 1A is damaged due to the electrical connection, wherein although the thickness T3 of the circuit 35 is increased to 22 μm or more, the thickness T3 is increased to increase the bonding area and strength between the side 33 and the insulator 4H, so as to prevent the package 1A from generating the gap G, but the thick circuit 35 cannot effectively reduce the thickness T of the insulator 4H, and increase the production cost, so that the circuit board 5A cannot meet the requirement of thinner electronic products; 2) as shown in fig. 11-2, in the process of removing the detachment layer 8C1 by the etching solution, a portion of the circuit 35 is also removed, so that the thickness T3 of the circuit 35 is changed to a thinner thickness T3K, thereby reducing the bonding area between the side 33 of the circuit 35 and the insulator 4H, and reducing the bonding strength between the circuit 35 and the insulator 4H, so that the circuit board 5A is more likely to be damaged by the external force F pulling the solder ball S after the circuit 35 is bonded to the solder ball S.

SUMMERY OF THE UTILITY MODEL

The utility model aims at solving the defects of the prior art and providing a structure and a packaging body which are formed by combining a circuit board and a carrier plate.

The invention relates to a circuit board and a carrier plate structure, wherein the circuit board is used for chip bonding, and the circuit board at least comprises: a circuit and a solder mask layer; and a carrier plate comprising at least one component; wherein:

the circuit at least comprises a terminal, the circuit is provided with an upper surface, a lower surface and a side edge, and the circuit is used for power transmission;

the solder mask layer is provided with a reserved opening, an upper surface, a lower surface and side edges, wherein the reserved opening is formed by one part of the solder mask layer, the reserved opening of the solder mask layer is arranged corresponding to the end point of the circuit, the lower surface of the solder mask layer is connected with the upper surface of the circuit, and the solder mask layer is formed by insulating substances; and

the carrier plate is provided with an upper surface, a lower surface and side edges, and the lower surface of the carrier plate is jointed with the upper surface of the solder mask layer, so that the upper surface of the carrier plate is exposed in the atmosphere.

In another aspect of the present invention, a circuit board and a carrier structure are provided, the circuit board for chip bonding, the circuit board including: a circuit and a solder mask layer; and a carrier plate comprising at least one component; wherein:

the solder mask layer is provided with an upper surface, a lower surface, side edges, a convex part and an opening, wherein the convex part is arranged on the upper surface of the solder mask layer, the opening penetrates through the solder mask layer, the solder mask layer is composed of insulating substances, the lower surface of the solder mask layer is connected with the upper surface of the circuit, and the end point of the circuit is arranged corresponding to the opening of the solder mask layer; and

the carrier plate is provided with an upper surface, a lower surface, an opening and side edges, the opening is provided with a side wall, the lower surface of the carrier plate is jointed with the upper surface of the solder mask layer, wherein, the convex part of the solder mask layer is contained in the opening of the carrier plate, the convex part of the solder mask layer is jointed with the side wall of the opening of the carrier plate, the opening of the solder mask layer is arranged corresponding to the line end point and the opening of the carrier plate, and the line end point is used for external electric connection.

The invention provides a package, comprising: the circuit board is provided with a circuit and a solder mask layer, the carrier plate is at least provided with a component, the circuit at least consists of a terminal, the circuit is provided with an upper surface, a lower surface and side edges, and the circuit is used for power transmission; the solder mask layer is provided with an upper surface, a lower surface, side edges, a convex part and an opening, wherein the convex part is arranged on the upper surface of the solder mask layer, the opening penetrates through the solder mask layer, the solder mask layer is composed of insulating substances, the lower surface of the solder mask layer is connected with the upper surface of the circuit, and the circuit end point and the opening of the solder mask layer are arranged correspondingly; the carrier plate is provided with an upper surface, a lower surface, an opening and side edges, wherein the opening is provided with a side wall, the lower surface of the carrier plate is jointed with the upper surface of the solder mask layer, the convex part of the solder mask layer is arranged between the opening of the solder mask layer and the side wall of the opening of the carrier plate, the convex part of the solder mask layer is accommodated in the opening of the carrier plate and is jointed with the convex part of the solder mask layer and the side wall of the opening of the carrier plate, and the opening of the solder mask layer is arranged corresponding to the line end point and the opening of the carrier plate so that;

the chip is engaged with the circuit board and the chip is in electrical communication with the circuit board; and

the plastic package chip and the circuit board surface.

The circuit board of the invention is at least composed of a circuit and a solder mask layer, the carrier plate is at least composed of a component, wherein, the solder mask layer is provided with a reserved open pore (or a through open pore) which is arranged corresponding to the circuit, the reserved open pore is converted into an open pore in the manufacturing process of the packaging body, so that the circuit can be used for external electric connection, the lower surface of the solder mask layer is jointed with the upper surface of the circuit, the upper surface is jointed with one surface of the carrier plate, and the characteristic of the solder mask layer coating one surface of the circuit is utilized, thus, in the manufacturing process of the packaging body, the circuit can be prevented from being attacked by the etching solution of the carrier plate which is removed to cause damage, simultaneously, as the lower surface of the carrier plate can be provided with the solder mask layer, the solder mask layer is arranged between the circuit and the carrier plate, and the solder mask layer can be provided with the reserved open pore according to requirements, the reserved open, in order to avoid causing the damage of bending and/or rupture, and the support plate also can be used to protect the solder mask and improve the crooked perk problem of circuit board, and makes the support plate can not contain the copper foil of the partition among the prior art support plate and reach reduce cost's efficiency, makes the utility model discloses the circuit board can accord with the electronic industry to the demand of "thin" and the purpose of promotion circuit board quality.

Drawings

Fig. 1-1 is a cross-sectional view of the circuit board and the carrier along a cutting line KK shown in fig. 1-2.

Fig. 1-2 are bottom views of the circuit board of the present invention.

Fig. 2, fig. 3A, fig. 4 to fig. 9: sectional views of the circuit board and the carrier.

Fig. 10 is a cross-sectional view of the package of the present invention.

Fig. 11-1 to 11-2 are sectional views illustrating a related art package manufacturing method.

Fig. 11-3 are bottom views of prior art packages.

Fig. 11-4 are cross-sectional views of a prior art package manufacturing method.

31. 3A1, 3B1, 41 upper surface, 6S, 71, 81, 91 upper surface, 32, 42, 72, 82, 92 lower surface, 33, 43, 53, 73, 83, 93 side, 18 conductive piece, 20 chip, 24, 3A terminal, 30, 35, 70 circuit, 324, 724 joint, 3A4 joint area, 3B extension, 40, 4H insulator, 44 through hole, 50, 51, 5A circuit board, 60 plastic, 65 film, 39, 79, 99 convex part, 80, 88, 8K carrier plate, 85 side wall, 86, 96 opening, 87 blind hole, 801 adjusting layer, 8C1 joint layer, 8A copper foil base plate, 8B curing glue, 8C detaching, 8A1 copper foil, 8A2 adhesive glue, 8C2 detaching layer, 90, 95 solder mask layer, 90F solder mask cut line, 9F solder mask, 10, 1A package, D depth, F external force, G gap, KK gap, s solder ball, T, T3, T3k, T4, T5, T30. thickness, T40, T8C1, T8, C2 thickness, L width.

Detailed Description

The above-described scheme is further illustrated below with reference to specific examples. It should be understood that these examples are for the purpose of illustrating the invention and are not intended to limit the scope of the invention. The conditions used in the examples may be further adjusted according to the conditions of the particular manufacturer, and the conditions not specified are generally the conditions in routine experiments.

As shown in fig. 1-2, which are basic structures of the circuit board and the carrier board structure of the present invention, wherein fig. 1-2 is a bottom view of the circuit board 51, and fig. 1-1 is a cross-sectional view of the carrier board 80 and a cross-sectional view of the circuit board 51 along a cutting line KK of fig. 1-2, a thickness T5 of the circuit board 51 is particularly suitable for requirements not greater than 30 micrometers (i.e. T5 ≦ 30 micrometers), such as: 25. 20, 10, 2 microns or other suitable thickness, which makes the circuit board 51 meet the electronic industry's requirement for "thinness", the circuit board 51 includes: the line 30, for electrical transmission, may be made of a suitable conductor such as copper or nickel, and has an upper surface 31, a lower surface 32, a side 33, and a thickness T30, the thickness T30 being particularly suitable for requirements not greater than 10 μm, such as: 10. 5, 3, 1 μm or other suitable thickness, so that the circuit board 51 can meet the requirement of electronic industry for "thin", the circuit 30 is composed of at least one terminal 3A, and the circuit 30 of the present embodiment is composed of the terminal 3A joined to the adjacent extension 3B, wherein the upper surface 31 is composed of the upper surface 3A1 of the terminal 3A and the upper surface 3B1 of the extension 3B, and the terminal 3A is used for external electrical connection, and the edge region of the upper surface 3A1 is implemented as a joining region 3A4, the upper and

lower surfaces

31, 32 of the circuit 30 can be implemented as a rectangle, a circle, a polygon and/or other suitable shape, so that the circuit 30 can be freely extended on the lower surface 92 of the solder mask 90; a solder mask 90, which is made of an insulating material, such as solder mask or epoxy or other suitable insulating materials, and has a reserved opening 9F, an upper surface 91, a lower surface 92 and a side 93, wherein the reserved opening 9F is made of a portion 90F of the solder mask 90, the reserved opening 9F is disposed corresponding to the end 3A of the circuit 30, the lower surface 92 of the solder mask 90 is joined to the upper surface 31 of the circuit 30, so that the upper surface 31 of the circuit 30 is completely encapsulated and not exposed outside the solder mask 90, and accordingly, during the manufacturing process of the package, the solder mask 90 can protect the circuit 30 from being attacked by the etching solution, and not remove a portion of the circuit 30 (see the illustration and description of fig. 11-2), so as to avoid the damage of the gap (see the reference numeral "G") caused by the etching solution, therefore, the thickness T30 of the circuit 30 can be made thinner, wherein, when the thickness T30 of the circuit 30 is made thinner, the thickness T5 of the circuit board 51 can also be made thinner, accordingly, the circuit board 51 can meet the requirement of the electronic industry for "thin", and a part 90F of the solder mask 90 can be removed in the manufacturing process of the package body to convert the reserved hole 9F into a hole (96_ see fig. 9), so that the end point 3A of the circuit 30 can be electrically connected to the outside, wherein, in the embodiment of fig. 1-1, the circuit board 51 is only formed by stacking the circuit 30 and the solder mask 90, and accordingly, the thickness T5 of the circuit board can be not more than 30 micrometers, or even not more than 2 micrometers, so that the circuit board 51 of the present invention can still meet the requirement of the electronic industry for "thin"; carrier plate 80, which may be made of copper, an alloy or other suitable metal and/or composed of a resin or other suitable non-metal, having an upper surface 81, a lower surface 82 and sides 83, is bonded to solder mask layer 90. in the embodiment of carrier plate 80 shown in fig. 1-1, lower surface 82 of carrier plate 80 is bonded to upper surface 91 of solder mask layer 90, such that upper surface 81 of carrier plate 80 is exposed to the atmosphere, carrier plate 80 is replaceable into

carrier plates

80, 88, 8K as shown in fig. 2-11-1, such that carrier plate 80 may be composed of a single component or multiple components, carrier plate 80 of the embodiment of fig. 1-1 is composed of a single component, and carrier plate 80 is embodied as a metal, wherein carrier plate 80 may be selected to remain (see fig. 10; reference numeral "80") or be removed, as desired, carrier plate 80 of the embodiment of fig. 1-1 is finally retained, accordingly, the circuit board 51 can further have a film 65 (dotted line) as required, the film 65 can be used for electromagnetic shielding, and the film 65 is bonded to the carrier side 83 and the solder mask layer 90 side 93, so that after the circuit board 51 and the chip are combined into a package, the package 10 can be bonded to a suitable place on the surface, such as the surface 6S of the plastic 60 and the side 53 of the circuit board 51, and another film 65 is further disposed, and the film 65 disposed on the circuit board 51 can be bonded to the other film 65 disposed on the surface of the package 10, so that the carrier 80 has electromagnetic shielding effect, and the package 10 can increase the electromagnetic shielding area by the carrier 80, thereby increasing the electromagnetic interference resistance of the package 10, and making the circuit board 51 more practical, while in this embodiment, the carrier 80 can have an opening (see 8; reference numeral 86, the opening 86 may and/or may not penetrate the carrier plate 80, and the opening 86 may and/or may not be disposed corresponding to the opening 9F reserved in the solder mask layer 90, so that the opening 86 of the carrier plate 80 may be used to change the thermal expansion degree of the carrier plate 80, thereby improving the warpage of the circuit board 51, and avoiding the damage of the circuit board 51 due to extrusion caused by too large warpage, and the opening 86 may be formed in a circular shape, a square shape, a polygonal shape and/or other suitable shapes; as can be seen from the above description, in the manufacturing process of the package 10 (see fig. 9), when the carrier 80 needs to be removed by the etching solution, the solder mask layer 90 completely covers the upper surface 31 of the circuit 30, so that the circuit 30 is not damaged by the etching solution, and the quality of the circuit board 51 can be improved, or the thickness and the cost of the circuit board 51 and the package can be reduced, meanwhile, in the structure of the circuit board 51 and the carrier 80 in the embodiment of fig. 1-1, because the solder mask layer 90 is disposed on the lower surface 82 of the carrier 80, and the solder mask layer 90 is disposed between the circuit 30 and the carrier 80, and the solder mask layer 90 has the reserved opening 9F according to the requirement, and the reserved opening 9F is composed of a portion 90F of the solder mask layer 90, accordingly, the reserved opening 9F does not penetrate through the solder mask layer 90, and the solder mask layer 90 does not have a penetrating opening, thereby improving the structural rigidity (reliability) of the circuit board 51 and the carrier 80, in addition, the circuit board 51 may further have an insulator (see fig. 3; reference numeral "40"), and accordingly, the solder mask 90 is interposed between the carrier 80 and the circuit 30 and the insulator 40, so as to further enhance the structural rigidity of the circuit board 51 and the carrier 80 and further avoid the bending and/or breaking damage, wherein the insulator 40 may have a through hole (see fig. 3; reference numeral "44"), and accordingly, the circuit board 51 may also have a second circuit (see fig. 4; reference numeral "70"), so as to make the circuit board 51 have a higher circuit density (reliability).

Fig. 2 is a cross-sectional view of the structure of the circuit board 50 and the carrier 80, the thickness T5 of the circuit board 50 and the thickness T30 of the circuit 30 are the same as those shown in fig. 1-1, and the features and symbols of the circuit board 50 and the carrier 80 are the same as those of the circuit board 51 and the carrier 80 shown in fig. 1-1, please refer to fig. 1-1 for explanation, which is different: the solder mask layer 90 further covers the side 33 of the circuit 30, so that the circuit 30 can increase the bonding area with the solder mask layer 90 and can be more firmly bonded with the solder mask layer 90, thereby preventing the circuit 30 from peeling off from the solder mask layer 90.

Referring to fig. 3, which is a cross-sectional view of a circuit board 50 and a carrier 88, the circuit board 50 is particularly suitable for the requirement that the thickness T40 of the insulator 40 is not more than 30 micrometers (i.e. T40 ≦ 30 micrometers), such as: 25. 20, 10, 2 microns or other suitable thickness to make the circuit board 50 meet the "thin" requirement of the electronics industry, the features and symbols of the circuit board 50 and the carrier 88 are the same as those of the circuit board 51 and the carrier 80 of fig. 1-1, as described with reference to fig. 1-1, wherein the circuit board 50 differs: the circuit board 50 further has an insulator 40, the insulator 40 has an upper surface 41, a lower surface 42, a side 43 and a through hole 44, the insulator 40 is made of an insulating material, such as epoxy resin, solder mask or other suitable insulating materials, the thickness T40 is made of the thickness T4 between the lower surface 32 and the upper surface 41 of the circuit 30 and the thickness T30 of the circuit 30, the insulator 40 is joined to the lower surface 92 of the solder mask 90, and the insulator 40 covers the lower surface 32 and the side 33 of the circuit 30, wherein, because the structure of the circuit board 50 and the carrier 88 has the insulator 40, not only the lower surface 92 of the solder mask 90 can be joined to the circuit 30, but also the lower surface 92 of the solder mask 90 can be joined to the insulator 40, so that the area of the lower surface 92 of the solder mask 90 can be further increased, and the upper surface 91 of the solder mask 90 is joined to the carrier 88, the solder mask 90 is disposed between the carrier 88 and the circuit 30 and the insulator 40, so that the lower surface 92 of the solder mask 90 can be completely enveloped by the circuit 30 and the insulator 40, and the solder mask 90 is firmly clamped by the carrier 88, the circuit 30 and the insulator 40 like a sandwich (sandwich), thereby further improving the structural rigidity of the circuit board 50 and the carrier 88, and further avoiding the damage of bending and/or breaking, and meanwhile, since the insulator 40 envelops the lower surface 32 of the circuit 30 and the side edges 33 thereof, the circuit 30 can be protected, the circuit 30 can not be damaged by the impact of external force, so as to improve the quality of the structure of the circuit board 50 and the carrier 88, and the through hole 44 of the insulator 40 is disposed corresponding to the lower surface 32 of the circuit 30, and the portion of the lower surface 32 of the circuit 30 exposed out of the through hole 44 of the insulator 40 is implemented as the contact 324, so that the contact 324 can be used for electrical connection, in the embodiment of FIG. 3, the contact 324 is exposed in the insulator via 44, such that when the circuit board 50 has the second trace (see FIG. 4; reference numeral 70) as required, the circuit board 50 has a higher trace density (density) for the electronic industry, since the circuit board 50 having the same area has more traces and is more practical when the circuit board 50 has a higher trace density; the carrier plate has the following different parts: the carrier plate 88 is composed of a plurality of components, the carrier plate 88 of the present embodiment is composed of an adjustment layer 801 and another carrier plate 80, and the adjustment layer 801 is bonded to the another carrier plate 80, the lower surface of the another carrier plate 80 is implemented as the lower surface 82 of the carrier plate 88, the lower surface of the another carrier plate 80 is bonded to the upper surface 91 of the solder mask 90 of the circuit board 50, and the surface of the adjustment layer 801 exposed in the atmosphere is implemented as the upper surface 81 of the carrier plate 88, wherein the material of the adjustment layer 801 is different from that of the carrier plate 80, the adjustment layer 801 can be implemented as an insulating material, a curing adhesive, a solder mask or other suitable material, the circuit board 50 can improve rigidity and reduce cost by the adjustment layer 801, because, if the carrier plate 80 is implemented as copper, when the thickness of the carrier plate 80 is greater than 36 μm, besides the material cost is high, in the manufacturing process of the circuit board 50, when the working plate (working plate) is to be divided into substrates (substrates) with a plurality, the milling cutter is damaged in an accelerated manner to increase the manufacturing cost, and because the Coefficient of Thermal Expansion (CTE) of copper is high, the base plate with a plurality of circuit boards 50 can be damaged by collision and extrusion due to the fact that the base plate is warped too much in the production or use process, accordingly, the thickness of the carrier plate 80 can be reduced to 3-18 microns by combining an adjusting layer 801 which is low in material cost and different in coefficient of thermal expansion from that of the carrier plate 80, the cost can be reduced, the rigidity of the circuit boards 50 is maintained, the warping degree according with mass production is met, the circuit boards 50 are better in use, meanwhile, because the carrier plate 88 can be only composed of the adjusting layer 801 and the carrier plate 80, the carrier plate 88 is not required to be provided with detachable copper foils 8C and curing adhesives 8B of the carrier plate 8K shown in the figure 11-1, and accordingly, the material cost and the production cost can be reduced, and; if the circuit board 50 is combined with the carrier 8K shown in fig. 11-1, the disadvantages caused by the circuit board 5A of the prior art can be avoided, as follows: 1) in the package manufacturing process, when the carrier 8K bonding layer 8C1 needs to be removed by the etching solution (see fig. 9 and the description), since the upper surface 31 of the circuit 30 is completely encapsulated by the solder mask 90, the circuit 30 can be prevented from being attacked by the etching solution to be thinned or damaged, and accordingly, the thickness T30 of the circuit 30 can be thinner than the thickness T3 of the circuit 35 in the prior art of fig. 11-1, such as: 11. 7, 4, 1 micron or other suitable thickness, so that the circuit board 50 and the package can achieve the requirement of making the product thinner by the thin circuit 30, and achieve the effect of reducing the material and production cost by the thin circuit 30; 2) after the circuit 30 is combined with the solder ball S (see fig. 11-4), since the bonding area 3a4 of the circuit 30 is covered by the solder mask 90, the circuit 30 can still be more firmly combined with the insulator 40, so that the solder ball S is pulled by an external force F, thereby preventing the lower surface 32 of the circuit 30 from being damaged by delamination with the insulator 40; in addition, when the carrier 88 shown in fig. 3 is replaced by the carrier 8K shown in fig. 11-1, the bonding layer 8C1 of the carrier 8K can also be regarded as being implemented as the carrier 80 (see fig. 1-1), so that the structure of the circuit board and the carrier can achieve better practical effect.

Fig. 3A is a cross-sectional view of a circuit board 51 and a carrier 80, where the features and symbols of the circuit board 51 are the same as those of the circuit board 50 in fig. 3, please refer to fig. 3 for description, where the different points of the circuit board 51 are: 1) the insulator 40 has no through hole 44, and the portion of the lower surface 32 of the circuit 30 exposed from the insulator 40 is implemented as a contact 324, so that the contact 324 can be electrically connected, in the embodiment of fig. 3A, the contact 324 is exposed outside the insulator 40, and the contact 324 is made as close as possible to the chip (dotted line) 20 disposed adjacent thereto, so that the distance D1 between the chip 20 and the contact 324 of the circuit 30 can be shortened, and the distance between the end 24 of the chip 20 and the contact 324 of the circuit 30 can be shortened, so that the length of the wire (dotted line) 18 can be reduced, and the material of the wire 18 can be saved, thereby saving the manufacturing cost of the package, wherein the wire 18 is made of gold, silver, copper or other suitable material, and the wire 18 electrically connects the chip 20 and the circuit board 51, and in addition, the surface of the contact 324 can be provided with a conductive layer (not shown), so as to be beneficial to external electric connection; and 2) the carrier plate 80 can be made of metal as required, and the carrier plate 80 can be used for electromagnetic shielding, therefore, the circuit board 51 can be provided with a film 65 (dotted line), the film 65 can be used for electromagnetic shielding, and the film 65 is jointed with the carrier plate side 83, the solder mask 90 side 93 and the insulator 40 side 43, wherein, because the film 65 can be jointed with the insulator 40 side 43, the jointing area and the strength of the film 65 and the circuit board 51 are further increased, so that the film 65 can be firmly combined with the circuit board 51, the peeling damage can be avoided, and simultaneously, the carrier plate 80 can be provided with an opening as required, and the opening 86 is arranged corresponding to the end 3A of the circuit 30.

Referring to fig. 4, which is a cross-sectional view of an embodiment of a circuit board 51 and a carrier 88, the characteristics and symbols of the circuit board 51 and the carrier 88 are the same as those of the circuit board 50 and the carrier 88 of fig. 3, please refer to fig. 3 for description, wherein the differences of the circuit board 51 are: the circuit board 51 has a higher circuit density due to the second circuit 70, because when the circuit board 51 has a higher circuit density, the circuit board 51 with the same area can have more circuits, which is more beneficial to the application of the electronic industry, and the second circuit 70 can be freely extended on the upper surface 41 of the insulator 40, so that the structure of the circuit board 51 and the carrier plate 80 has more practicability; the carrier plate 88 differs from: the adjustment layer 801 has a blind via (blindia) 87, the blind via 87 has a width L and a depth D, wherein the blind via 87 can penetrate or not penetrate the adjustment layer 801 by changing the depth D, in this embodiment, the blind via 87 penetrates the adjustment layer 801, a portion of the carrier 80 can be exposed in the blind via 87, and the blind via 87 does not penetrate the carrier 88, the carrier 88 can change the thermal expansion coefficient of the carrier 88 at least by changing the width L and/or the depth D of the blind via 87, so as to improve the warpage of the circuit board 51, and avoid the damage of the circuit board 51 due to the warpage and extrusion, and meanwhile, the blind via 87 can allow the etching solution to pass through the adjustment layer 801 and remove the carrier 80, thereby simplifying the structure of the circuit board 51 and the carrier 88 without using a carrier 8K composed of a plurality of components as shown in fig. 11-1, and thus saving the manufacturing cost and/or improving the production efficiency, in addition, a solder mask layer may be disposed on the upper surface 41 of the insulator 40 as required to protect the second circuit 70, and a conductive layer (not shown) may be disposed on the upper surface 71 of the second circuit 70 as required to facilitate external electrical connection.

Fig. 5 is a cross-sectional view of an embodiment of a circuit board 51 and a carrier 80, where the features and symbols of the circuit board 51 and the carrier 80 are the same as those of the circuit board 50 and the carrier 80 in fig. 2, and please refer to fig. 2 for description, where the differences are: the circuit board 51 has an insulator 40 having an upper surface 41, a lower surface 42, a side 43 and a through hole 44, the insulator 40 is joined to the lower surface 92 of the solder mask 90 and covers the lower surface 32 of the circuit 30, wherein the through hole 44 is disposed corresponding to the lower surface 32 of the circuit 30, so that the portion of the lower surface 32 of the circuit 30 exposed from the through hole 44 of the insulator 40 is implemented as a contact 324, and the contact 324 is used for power supply; in addition, the circuit board 51 may be provided with a second circuit 70 (dashed line) for electrical transmission, which has an upper surface 71, a lower surface 72, a side 73 and a protrusion 79, wherein the protrusion 79 is disposed on the lower surface 72, and the lower surface 72 is joined to the upper surface 41 of the insulator 40, so that the protrusion 79 is accommodated in the through hole 44 of the insulator 40 and is joined to the contact 324 of the circuit 70 for electrical communication, so that the circuit board 51 has a higher circuit density due to the second circuit 70.

Referring to fig. 6, which is a cross-sectional view of another embodiment of the circuit board 51 and the carrier 80, the characteristics and symbols of the circuit board 51 and the carrier 80 are the same as those of the circuit board 50 and the carrier 80 in fig. 2, and please refer to fig. 2 for explanation, two different points of the circuit board 51 are: 1) the circuit 30 further has a convex portion 39, the convex portion 39 is disposed on the lower surface 32 of the circuit 30; 2) the second circuit 70 has a side 73, an upper surface 71 and a lower surface 72, a portion of the lower surface 72 is implemented as a contact 724 for electrical connection, the insulator 40 has an upper surface 41, a lower surface 42 and a through hole 44, the insulator 40 is connected to the lower surface 92 of the solder mask 90 and the lower surface 32 of the circuit 30, the second circuit 70 is disposed on the upper surface 41 of the insulator 40, the insulator 40 covers the lower surface 72 and the side 73 of the second circuit 70, the upper surface 71 of the second circuit 70 is exposed from the upper surface 41 of the insulator 40, the contact 724 of the second circuit 70 is exposed from the through hole 44, the through hole 44 of the insulator 40 is disposed corresponding to the protrusion 39 of the circuit, the protrusion 39 of the circuit 30 is disposed in the through hole 44 and is connected to and electrically connected to the contact 724 of the second circuit 70, wherein the circuit 30 has the protrusion 39, accordingly, the method can comprise the following steps: 1) the circuit 30 can be not only covered by the solder mask 90 but also covered by the insulator 40, so that the circuit 30 can be more firmly fixed in the circuit board 51, and thus the circuit 30 can be prevented from peeling (peel-off) from the solder mask 90 and/or the insulator 40, because the circuit 30 is composed of a conductor, and the solder mask 90 and the insulator 40 are composed of an insulating material, and generally, the Coefficient of Thermal Expansion (CTE) of the conductor is larger than that of the insulating material, therefore, when the circuit board 51 receives heat (heat), thermal stress (stress) is generated, and the circuit 30 is pulled from the solder mask 90 and the insulator 40, and meanwhile, when the circuit board 51 is cooled, the circuit 30 is pulled from the solder mask 90 and the insulator 40, and if the pulling phenomenon occurs repeatedly, the circuit 30 is easily peeled, when the wiring 30 can be firmly fixed, the damage of peeling can be avoided; and 2) the circuit board 51 can have higher circuit density, making the circuit board 51 more practical.

Fig. 7 is a cross-sectional view of a circuit board 51 and a carrier 80, wherein the carrier 80 has the same features and symbols as the carrier 80 shown in fig. 1-1, and please refer to fig. 1-1 for explanation, the differences are: the carrier 80 further has an opening 86, the opening 86 is implemented as a through shape, and the opening 86 has a sidewall 85, the opening 86 is disposed corresponding to the end 3A of the circuit 30; the circuit board 51 has the same features and symbols as the circuit board 50 shown in fig. 3, and please refer to fig. 3 for explanation, where: the solder mask layer 90 of the circuit board 51 has a protrusion 99, the protrusion 99 is disposed on the upper surface 91 of the solder mask layer 90, the protrusion 99 is disposed between the opening 9F of the solder mask layer 90 and the sidewall 85 of the opening 86 of the carrier 80, the protrusion 99 is accommodated in the opening 86 of the carrier 80, the sidewall 85 of the opening 86 is connected to the protrusion 99 of the solder mask layer 90, meanwhile, a portion 90F of the solder mask layer 90 is accommodated in the opening 86 of the carrier 80, accordingly, the opening 9F of the solder mask layer 90 is also accommodated in the opening 86 of the carrier 80, wherein, because the sidewall 85 of the opening 86 is connected to the protrusion 99 of the solder mask layer 90, the solder mask layer 90 is connected to the lower surface 82 of the carrier 80 and the sidewall 85 of the opening 86 of the carrier 80, thereby, the bonding area between the carrier 80 and the solder mask layer 90 can be increased, the solder mask layer 80 can be more firmly connected to the solder mask layer 90, and the carrier 80 can be prevented from being damaged by peeling off (peel-off) from, in addition, in the process of combining the circuit board 51 with the package, the carrier 80 can be selected to be finally removed or retained (see fig. 10), so that the carrier 80 can be flexibly used to improve the practicability, and in the embodiment of fig. 7, the circuit board 51 is provided with the carrier 80 (i.e. the carrier 80 is finally retained), accordingly, 1) the structural rigidity of the circuit board 51 and the carrier 80 can be improved to avoid the damage of bending and/or breaking caused by insufficient rigidity of the structures of the circuit board 51 and the carrier 80; and 2) according to the requirement, the carrier plate 80 is made of a conductor, so that the heat dissipation effect of the package can be improved by the carrier plate 80, or a nickel or other suitable metal layer or film (see fig. 10) is added on the side 83 of the carrier plate 80 to improve the anti-electromagnetic interference area and effect of the package, so that the structure of the circuit board 51 and the carrier plate 80 has more practicability; in addition, the upper surface 81 of the carrier plate 80 can be bonded with a second solder mask layer (95) as required to protect the carrier plate 80, wherein the second solder mask layer (95) is bonded with the upper surface 81 of the carrier plate 80 and the solder mask layer 90, and the surface of the second solder mask layer (95) can be further bonded with another carrier plate, such as the carrier plate 8K shown in fig. 11-1, wherein if the second solder mask layer (95) is bonded with the carrier plate 8K shown in fig. 11-1, the other carrier plate (i.e. the carrier plate 8K shown in fig. 11-1) is bonded with the second solder mask layer (95) through the bonding layer 8C1 thereof, and the other carrier plate can also be implemented as the carrier plate 88 shown in fig. 3-4 to avoid the warpage phenomenon of the circuit board 51, and in the embodiment shown in fig. 7, the circuit board 51 can be free of the insulator 40 as required to expose the lower surface 32 of the circuit 30 and the side edge 33 thereof outside the solder mask layer 90, accordingly, the overall thickness of the circuit board 51 can be made thinner, so as to meet the requirement of the electronic industry for "thin"; in addition, when the circuit board 51 does not have the insulator 40, the solder mask layer 90 can further cover the side of the circuit 30 (see fig. 2; item 33) as required, so that the circuit 30 can increase the bonding area with the solder mask layer 90 and can avoid the damage of the circuit 30 peeling off from the solder mask layer 90, and accordingly, the circuit 30 can further have a convex portion (see fig. 6; item 39) as required, or the lower surface 32 of the circuit 30 is provided with an insulator (see fig. 5; item 40); furthermore, the solder mask layer 90 can further cover the side 83 of the carrier 80 as required, so that the bonding area between the carrier 80 and the solder mask layer 90 is increased, and the damage of the carrier 80 peeling off from the solder mask layer 90 can be avoided.

Fig. 8 is a cross-sectional view of the circuit board 50 and the carrier 80, where the features and symbols of the circuit board 50 and the carrier 80 are the same as those of the circuit board 51 and the carrier 80 shown in fig. 7, and please refer to fig. 7 for description, where the differences are: the reserved opening 9F of the solder mask layer 90 is converted into an opening 96, the solder mask layer 90 of the circuit board 50 has an opening 96, the opening 96 penetrates through the solder mask layer 90, and the opening 96 is disposed corresponding to the end point 3A of the circuit 30 and the opening 86 of the carrier board 80, so that the end point 3A of the circuit 30 can be used for external electrical connection, meanwhile, the protrusion 99 is disposed on the upper surface 91 of the solder mask layer 90, the protrusion 99 is disposed between the opening 96 of the solder mask layer 90 and the sidewall 85 of the opening 86 of the carrier board 80, the protrusion 99 is accommodated in the opening 86 of the carrier board 80, and the sidewall 85 of the opening 86 is connected to the protrusion 99 of the solder mask layer 90, so that the solder mask layer 90 is connected to the lower surface 82 and the sidewall 85 of the carrier board 80, thereby increasing the connection area and strength between the carrier board 80 and the solder mask layer 90, and preventing the carrier board 80 and the solder mask layer 90 from being damaged by peeling, and the protrusion 99 also preventing the end point 3A of the circuit 30 from being short-circuited 1 caused Because the convex part 99 can prevent the solder ball from touching the upper surface 81 of the carrier plate 80, the solder ball can not be bonded with the upper surface 81 of the carrier plate 80, thereby preventing the circuit board 50 from being damaged by short circuit, and the convex part 99 of the solder mask layer 90 can be protruded or flush with the upper surface 81 of the carrier plate 80, or at least a part of the convex part 99 of the solder mask layer 90 can not be bonded with the side wall 85 of the opening 86 of the carrier plate 80, accordingly, a part of the side wall 85 of the opening 86 of the carrier plate 80 can be exposed out of the convex part 99 of the solder mask layer 90, thereby the carrier plate 80 can be electrically communicated with the circuit 30 by the side wall 85 to be more practical, and the upper surface 81 of the carrier plate 80 can be bonded with a second solder mask layer (95) according to requirements to protect the carrier plate 80, wherein the second solder mask layer 95 can have a through opening, and the through opening of the second solder mask layer 95 is arranged corresponding to the opening 86 of the carrier plate, the opening 96, the terminal 3A of the circuit 30 is used for external electric connection; as can be seen from the

circuit boards

50 and 51 shown in fig. 1-1 to 8, the

circuit boards

50 and 51 can be made more practical by changing or replacing the

circuits

30 and 70 and/or the

carrier boards

80 and 88 or adding components under the characteristic that the upper surface 31 of the circuit 30 is covered by the solder mask 90; in the embodiment shown in fig. 8, the circuit board 50 may not have the insulator 40 as required, so that the lower surface 32 and the side 33 of the circuit 30 are exposed outside the solder mask 90, thereby making the overall thickness of the circuit board 50 thinner, which is beneficial to the application of the electronic industry; in addition, when the circuit board 50 does not have the insulator 40, the solder mask layer 90 can further cover the side of the circuit 30 (see fig. 2; item 33) as required, so that the circuit 30 can increase the bonding area with the solder mask layer 90 and can avoid the damage of the circuit 30 peeling off from the solder mask layer 90, and accordingly, the circuit 30 can further have a protrusion (see fig. 6; item 39) as required or the lower surface 32 of the circuit 30 can be provided with an insulator (see fig. 5; item 40).

Fig. 9 is a cross-sectional view of a circuit board 50 and a carrier board 8K, wherein the features and symbols of the insulator 40, the circuit 30 and the solder mask 90 of the circuit board 50 are the same as those of the circuit board 50 shown in fig. 3, and the same points are described with reference to fig. 3, except that: a carrier plate 8K, the carrier plate 8K consisting of a copper foil substrate 8A, a curing glue 8B and a detachable copper foil 8C, the copper foil substrate 8A consisting of two copper foils 8A1 and an adhesive glue 8A2, the adhesive glue 8A2 consisting of a curing glue or other suitable adhesive glue, wherein the adhesive glue 8A2 joins the two copper foils 8A1 together with the adhesive glue 8A2 between the two copper foils 8A1, and the detachable copper foil 8C consisting of two copper foils and a film layer (not shown) joining the two copper foils together with the film layer between the two copper foils, wherein one joining layer of the copper foils and the film layer is implemented as a joining layer 8C1, and the other copper foil joined to the film layer is implemented as a detachable layer 8C2, and the detachable layer 8C2 is joined to the copper foil substrate 8A by the curing glue 8B, the copper foil 8C1 and the detachable layer 8C2 may consist of other suitable metal layers and/or other suitable copper layers, the carrier 8K is disposed on the upper surface 91 of the solder mask 90 of the circuit board 50 and bonded to the upper surface 91 of the solder mask 90 of the circuit board 50 by the bonding layer 8C1, wherein the lower surface of the bonding layer 8C1 is implemented as the lower surface 82 of the carrier 8K, and the upper surface of the copper foil substrate 8A is implemented as the upper surface 81 of the carrier 8K; in addition, in the embodiment of the carrier 8K shown in fig. 9, the bonding layer 8C1 has a thickness T8C1, the bonding layer 8C1 may have a thickness T8C1 of about 18 microns (or other suitable thickness), the delamination layer 8C2 has a thickness T8C2, the delamination layer 8C2 has a thickness T8C2 of about 3-5 microns (or other suitable thickness), and the bonding layer 8C1 has a thickness T8C1 greater than the thickness T8C2 of the delamination layer 8C2 (i.e., T8C1> T8C2), so that damage to the circuit board 50 is avoided because the bonding layer 8C1 is thicker than the delamination layer 8C 5738C 2 by providing a removal process (not shown), so that the bonding layer 588C 1 can be bonded to the solder mask 90 more firmly, and accordingly, the delamination layer 598C 598 can be difficult to break when the delamination layer 8C 24 is separated from the delamination layer 598C 598, therefore, the solder mask 90 (or even the circuit board 50) is not easy to be damaged, and the circuit board 50 can be prevented from being damaged; in the process of providing the removal process, if the bonding layer 8C1 is not damaged by the detachment layer 8C2, the thickness T8C1 of the bonding layer 8C1 may be smaller than the thickness T8C2 of the detachment layer 8C2 (i.e., T8C1< T8C2) as required, and in the structural embodiment of the circuit board 50 and the carrier board 8K shown in fig. 9, since the carrier board 8K can be quickly removed by the detachable copper foil 8C detachment layer 8C2, the production efficiency of the package can be improved.

As shown in fig. 10, a cross-sectional view of the package 10 includes: the structure of the circuit board 51 and the carrier plate 80, the circuit board 51 has a circuit 30, a solder mask 90 and an insulator 40, the circuit 30 has an upper surface 31, a lower surface 32 and a side 33, the circuit 30 is used for power transmission, and the solder mask 90 has an upper surface 91, a lower surface 92, a protrusion 99 and an opening 96, wherein the protrusion 99 is disposed on the upper surface 91 of the solder mask 90, the opening 96 penetrates through the solder mask 90, the solder mask 90 is made of an insulating material, the lower surface 92 of the solder mask 90 is connected with the upper surface 31 of the circuit 30, and the end 3A of the circuit 30 is disposed corresponding to the opening 96 of the solder mask 90; a carrier plate 80 having an upper surface 81, a lower surface 82, a side 83 and an opening 86, the opening 86 having a side wall 85, the lower surface 82 of the carrier plate 80 being joined to an upper surface 91 of a solder mask layer 90, wherein a protrusion 99 of the solder mask layer 90 is interposed between the opening 96 of the solder mask layer 90 and the side wall 85 of the opening 86 of the carrier plate 80, the protrusion 99 being accommodated in the opening 86 of the carrier plate 80, and the side wall 85 of the opening 86 being joined to the protrusion 99 of the solder mask layer 90, whereby the solder mask layer 90 is joined to the lower surface 82 of the carrier plate 80 and the side wall 85, the opening 96 of the solder mask layer 90 being disposed corresponding to the terminal 3A of the circuit 30 and the opening 86 of the carrier plate 80, so that the terminal 3A of the circuit 30 is electrically connected to the outside, and an insulator 40 having an upper surface 41, a lower surface 42, a side 43 and a through hole 44, which is composed of an insulating material, the insulator 40 being joined to the, the through hole 44 is disposed corresponding to the lower surface 32 of the circuit 30, and a portion of the lower surface 32 of the circuit 30 exposed from the through hole 44 of the insulator 40 is implemented as a contact 324, so that the contact 324 can be used for electrical connection; a chip 20, the chip 20 is connected with the circuit board 51, the chip 20 shown in fig. 10 is arranged on the upper surface 41 of the insulator 40; a conductive member 18 implemented as a conductive wire of the conductive member 18, both ends of the conductive member 18 being respectively joined to the terminals 24 of the chip 20 and the circuit 30 of the circuit board 51, so that the chip 20 is electrically connected to the circuit board 51; and plastic 60, the plastic 60 envelops the chip 20, the conductive member 18 and the surface of the circuit board 51; wherein, because the bonding region 3A4 located at the edge of the terminal 3A is still bonded to the solder mask 90, the circuit 30 and the insulator 40 can be bonded together more firmly, therefore, the delamination or gap damage between the lower surface 32 of the circuit 30 and the insulator 40 as shown in fig. 11-4 is not easily or not generated, and at the same time, at least a portion of the sidewall 85 of the opening 86 of the carrier plate 80 is exposed to the protrusion 99 of the solder mask 90, so that the sidewall 85 of the opening 86 of the carrier plate 80 can be electrically connected to tin or other conductors, wherein the chip 20 can also be implemented as a flip chip (flip chip), and the conductive piece 18 can also be implemented as a conductive bump (bump), and when the chip 20 is implemented as a chip and the conductive piece 18 is implemented as a conductive bump, the chip 20 is bonded to the circuit board 51 by the conductive piece 18 and electrically connected to the circuit board 51 by the conductive piece 18, a conductive layer (not shown) may be disposed on the surface of the circuit 30 as required to facilitate external electrical connection; in addition, since the carrier 80 can be implemented as a conductor, the package 10 can have a thin film 65 made of copper or nickel or other materials with electromagnetic shielding effect as required, and the thin film 65 is disposed on the surface 6S of the plastic 60, the side 53 of the circuit board 51 and the side 83 of the carrier 80, wherein the package 10 can increase the electromagnetic shielding area by the carrier 80 to improve the electromagnetic interference resistance, and further, a second solder mask layer (see fig. 7; reference numeral 95) is bonded to the upper surface 81 of the carrier 80 as required, the second solder mask layer (95) is bonded to the upper surface 81 of the carrier 80 and the solder mask layer 90, and the second solder mask layer (95) can further have through-shaped openings as required, and the through-shaped openings are disposed corresponding to the carrier openings 86, the solder mask layer openings 96 and the circuit terminals 3A.

The above-mentioned fig. 1-1 to 10 are only examples of the present invention, and the present invention should not be limited thereto, for example: the

circuit boards

50, 51 of FIGS. 1-10 may also have a solder mask (90; not shown) on the top surface 41 of the insulator 40; the circuit board 51 of fig. 10 can be replaced by any one of the

circuit boards

50 and 51 shown in fig. 1-1 to 9, as required; in the embodiments of the

circuit boards

50 and 51 shown in fig. 1-1 to 10, a solder mask (90; not shown) may be disposed on the upper surface 81 of the carrier sheet 80 as required; therefore, all numerical changes, equivalent component replacements, or equivalent changes and modifications made according to the claims of the present invention should still fall within the scope covered by the present invention.

Claims

1. A circuit board and carrier board structure, the circuit board includes: a circuit and a solder mask layer; and a carrier plate comprising at least one component; it is characterized in that the preparation method is characterized in that,

the anti-welding layer is provided with a reserved opening, an upper surface, a lower surface and side edges, wherein the reserved opening is formed by one part of the anti-welding layer, the reserved opening of the anti-welding layer is arranged corresponding to the end point of the circuit, the lower surface of the anti-welding layer is connected with the upper surface of the circuit, and the anti-welding layer is formed by insulating substances; and

2. The board and carrier structure of claim 1, wherein the circuit board trace further comprises an extension portion disposed adjacent to the terminal, and the trace is composed of the terminal and the adjacent extension portion, wherein the upper surface of the terminal is for external electrical connection, and the edge area of the upper surface of the terminal is a bonding area.

3. The circuit board and carrier structure of claim 1, wherein the circuit board further comprises an insulator having an upper surface, a lower surface, side edges and through holes, the lower surface of the insulator is bonded to the solder mask layer and covers the lower surface of the circuit and the side edges of the circuit, the through holes of the insulator are disposed corresponding to the lower surface of the circuit, wherein the portions of the lower surface of the circuit corresponding to the through holes of the insulator are contacts exposed in the through holes of the insulator for external electrical connection.

4. The board and carrier structure of claim 3, wherein the board further comprises a second trace having a top surface, a bottom surface, sides, and protrusions, wherein the protrusions are disposed on the bottom surface, and the bottom surface of the second trace is bonded to the top surface of the insulator, and the protrusions are received in the through holes of the insulator such that the second trace is in electrical communication with the trace contacts via the protrusions.

5. The board and carrier structure of claim 1, wherein the carrier comprises a trim layer and another carrier, the carrier comprises a plurality of components, the trim layer is bonded to the another carrier such that the surface of the trim layer exposed to the atmosphere is the upper surface of the carrier.

6. The carrier structure of claim 5, wherein the adjustment layer of the carrier further comprises blind holes, the blind holes are disposed corresponding to the traces, and the blind holes have a width and a depth.

7. The board and carrier structure of claim 1 wherein the carrier is composed of a plurality of components, the carrier is composed of at least a copper foil substrate, a curing adhesive and a detachable copper foil stack, the copper foil substrate is composed of two copper foils and an adhesive, wherein the adhesive is between the two copper foils, the detachable copper foil is composed of two copper foils and a thin film layer, the thin film layer is formed by bonding the two copper foils together with the thin film layer between the two copper foils, wherein one copper foil bonded to the thin film layer is a bonding layer, the other copper foil bonded to the thin film layer is a detachable layer, and the detachable layer is bonded to the copper foil substrate by the curing adhesive, whereby the carrier is bonded to the solder mask layer by the bonding layer.

8. The board and carrier structure of claim 1, wherein the carrier further comprises an opening, the opening is through-shaped and has a sidewall, the carrier opening is disposed corresponding to the opening of the solder mask layer and the circuit terminal, and the solder mask layer further comprises a protrusion, the protrusion is disposed between the opening of the solder mask layer and the sidewall of the carrier opening, and the protrusion is received in the carrier opening and is bonded to the sidewall of the opening.

9. The substrate structure of claim 8, further comprising a second solder mask layer bonded to the upper surface of the substrate and the solder mask layer.

10. The circuit board and carrier structure of claim 9 further comprising another carrier, wherein the another carrier is at least composed of a copper foil substrate, a curing adhesive and a detachable copper foil stack, the copper foil substrate is composed of two layers of copper foils and an adhesive, wherein the adhesive is between the two copper foils, the detachable copper foil is composed of two copper foils and a thin film layer, the thin film layer is formed by bonding the two copper foils together with the thin film layer between the two copper foils, wherein one copper foil bonded to the thin film layer is a bonding layer and the other copper foil bonded to the thin film layer is a detachable layer, the detachable layer is bonded to the copper foil substrate by the curing adhesive, and the another carrier is bonded to the second solder mask layer by the bonding layer.

11. The board and carrier structure of claim 1, wherein the solder mask layer of the board further covers the sides of the circuit.

12. The board and carrier structure of claim 11, wherein the board further comprises an insulator and a second circuit, the insulator having an upper surface, a lower surface and a through hole, the insulator being bonded to the lower surface of the solder mask layer and covering the lower surface of the circuit, wherein the through hole of the insulator is disposed corresponding to the lower surface of the circuit, such that a portion of the lower surface of the circuit is exposed to the through hole of the insulator, and such that a portion of the lower surface of the circuit exposed to the through hole of the insulator is a contact, and such that the contact is electrically connected; the second circuit is provided with an upper surface, a lower surface, a side edge and a convex part, wherein the convex part is arranged on the lower surface of the second circuit, the lower surface of the second circuit is jointed with the upper surface of the insulator, the convex part of the second circuit is accommodated in the through hole of the insulator, the second circuit is jointed with the circuit joint to be electrically communicated, and the second circuit is used for electric transmission.

13. The circuit board and carrier structure of claim 11, wherein the circuit board further comprises an insulator and a second circuit, wherein the circuit further comprises a protrusion disposed on a lower surface of the circuit, the second circuit having an upper surface, a lower surface and sides, wherein a portion of the lower surface of the second circuit is a contact, the insulator has an upper surface, a lower surface and a through hole, and the insulator is bonded to the lower surface of the solder mask and the lower surface of the circuit, wherein the second circuit is disposed on the upper surface of the insulator, the insulator covers the lower surface and the sides of the second circuit, and the upper surface of the second circuit is exposed from the upper surface of the insulator, and the contact of the second circuit is exposed from the through hole of the insulator, and the protrusion of the circuit is disposed in the through hole, whereby the protrusion of the circuit is electrically connected to the contact of the second circuit.

14. The board and carrier structure of claim 1, further comprising a film, wherein the film is bonded to the carrier side and the solder mask side.

15. A circuit board and carrier plate structure, the circuit board is used for chip bonding, the circuit board includes: a circuit and a solder mask layer; and a carrier plate comprising at least one component; the method is characterized in that:

a circuit, which is composed of at least one terminal and has an upper surface, a lower surface and a side edge, and is used for power transmission;

the solder mask layer is provided with an upper surface, a lower surface, side edges, a convex part and an opening, wherein the convex part is arranged on the upper surface of the solder mask layer, the opening penetrates through the solder mask layer, the solder mask layer is composed of insulating substances, the lower surface of the solder mask layer is connected with the upper surface of the circuit, and the circuit end point and the opening of the solder mask layer are arranged correspondingly; and

the anti-welding layer comprises a carrier plate and a solder mask layer, wherein the carrier plate is provided with an upper surface, a lower surface, an opening and side edges, the opening is provided with a side wall, the lower surface of the carrier plate is jointed with the upper surface of the anti-welding layer, the convex part of the anti-welding layer is arranged between the opening of the anti-welding layer and the side wall of the opening of the carrier plate, the convex part of the anti-welding layer is accommodated in the opening of the carrier plate and is jointed with the side wall of the opening of the carrier plate, and the opening of the anti-welding layer is arranged corresponding to the line end.

16. The board and carrier structure of claim 15, wherein the circuit board trace further comprises an extension portion disposed adjacent to the terminal, such that the trace is composed of the terminal and the adjacent extension portion, wherein the upper surface of the terminal is for external electrical connection, and the edge region of the upper surface of the terminal is a bonding region.

17. The circuit board and carrier structure of claim 15, wherein the circuit board further comprises an insulator having an upper surface, a lower surface, side edges and through holes, the lower surface of the insulator being bonded to the solder mask and covering the lower surface of the circuit and the side edges of the circuit, the through holes of the insulator being disposed corresponding to the lower surface of the circuit, wherein the portions of the lower surface of the circuit corresponding to the through holes of the insulator are formed as contacts exposed in the through holes of the insulator for external electrical connection.

18. The circuit board and carrier structure of claim 17, wherein the circuit board further comprises a second circuit having a top surface, a bottom surface, sides, and protrusions, wherein the protrusions are disposed on the bottom surface and the bottom surface of the second circuit is bonded to the top surface of the insulator such that the protrusions are received in the through holes of the insulator such that the second circuit is in electrical communication with the circuit via the protrusions.

19. The board and carrier structure of claim 15 further comprising a membrane bonded to the carrier side and the solder mask side.

20. The board and carrier structure of claim 15, wherein the solder mask layer of the board covers the sides of the circuit.

21. The board and carrier structure of claim 20, wherein the board further comprises an insulator and a second circuit, the insulator having an upper surface, a lower surface and a through hole, the insulator being bonded to the lower surface of the solder mask layer and covering the lower surface of the circuit, wherein the through hole of the insulator is disposed corresponding to the lower surface of the circuit, such that a portion of the lower surface of the circuit is exposed to the through hole of the insulator, and such that a portion of the lower surface of the circuit exposed to the through hole of the insulator is a contact, and such that the contact is electrically connected; the second circuit is provided with an upper surface, a lower surface, a side edge and a convex part, wherein the convex part is arranged on the lower surface of the second circuit, the lower surface of the second circuit is jointed with the upper surface of the insulator, the convex part of the second circuit is accommodated in the through hole of the insulator, the second circuit is jointed with the circuit joint to be electrically communicated, and the second circuit is used for electric transmission.

22. The circuit board and carrier structure of claim 20, wherein the circuit board further comprises an insulator and a second circuit, wherein the circuit further comprises a protrusion disposed on a lower surface of the circuit, the second circuit having an upper surface, a lower surface and sides, wherein a portion of the lower surface of the second circuit is a contact, the insulator has an upper surface, a lower surface and a through hole, and the insulator is bonded to the lower surface of the solder mask and the lower surface of the circuit, wherein the second circuit is disposed on the upper surface of the insulator, and the insulator covers the lower surface and the sides of the second circuit, such that the upper surface of the second circuit is exposed to the upper surface of the insulator, and the contact of the second circuit is exposed to the through hole of the insulator, and the protrusion of the circuit is disposed in the through hole, whereby the protrusion of the circuit is electrically connected to the contact of the second circuit.

23. The substrate structure of claim 15, further comprising a second solder mask layer having openings formed therethrough, wherein the second solder mask layer is bonded to the upper surface of the substrate and the solder mask layer, and the openings of the second solder mask layer are disposed corresponding to the openings of the solder mask layer and the terminals of the circuit.

24. A package, comprising: the circuit board and the carrier plate structure are characterized in that the circuit board and the carrier plate structure are provided with a circuit and a solder mask layer, the carrier plate is provided with at least one assembly, the circuit at least comprises one end point, the circuit is provided with an upper surface, a lower surface and side edges, and the circuit is used for power transmission; the solder mask layer is provided with an upper surface, a lower surface, side edges, a convex part and an opening, wherein the convex part is arranged on the upper surface of the solder mask layer, the opening penetrates through the solder mask layer, the solder mask layer is composed of insulating substances, the lower surface of the solder mask layer is connected with the upper surface of the circuit, and the circuit end point and the opening of the solder mask layer are arranged correspondingly; the carrier plate is provided with an upper surface, a lower surface, an opening and side edges, wherein the opening is provided with a side wall, the lower surface of the carrier plate is jointed with the upper surface of the solder mask layer, the convex part of the solder mask layer is arranged between the opening of the solder mask layer and the side wall of the opening of the carrier plate, the convex part of the solder mask layer is accommodated in the opening of the carrier plate and is jointed with the convex part of the solder mask layer and the side wall of the opening of the carrier plate, and the opening of the solder mask layer is arranged corresponding to the line end point and the opening of the carrier plate so that;

the plastic package chip and the circuit board surface.

25. The package of claim 24, wherein the circuit board trace further comprises an extension portion disposed adjacent to the terminal, the trace comprising the terminal and the adjacent extension portion, wherein the upper surface of the terminal is for external electrical connection, and the edge region of the upper surface of the terminal is a bonding region.

26. The package of claim 24, wherein the circuit board further comprises an insulator having an upper surface, a lower surface, side edges and a through hole, the lower surface of the insulator is bonded to the solder mask and covers the lower surface of the circuit and the side edges of the circuit, the through hole of the insulator is disposed corresponding to the lower surface of the circuit, and the area of the lower surface of the circuit corresponding to the through hole of the insulator is a contact exposed in the through hole of the insulator for external electrical connection.

27. The package of claim 26, wherein the circuit board further comprises a second trace having a top surface, a bottom surface, sides, and bumps, wherein the bumps are disposed on the bottom surface and the bottom surface of the second trace is bonded to the top surface of the insulator such that the bumps are received in the through holes of the insulator such that the second trace is in electrical communication with the trace via the bumps.

28. The package of claim 24, further comprising a film bonded to the plastic surface, the side of the circuit board, and the side of the carrier, wherein the film is configured to act as an electromagnetic shield.

29. The package according to claim 24, further comprising a second solder mask layer having openings formed therethrough, wherein the second solder mask layer is bonded to the upper surface of the carrier and the solder mask layer, and the openings of the second solder mask layer are disposed corresponding to the openings of the solder mask layer and the terminals of the circuit.