CN210109500U - Display device - Google Patents

Display device Download PDF

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Publication number
CN210109500U
CN210109500U CN201921135769.9U CN201921135769U CN210109500U CN 210109500 U CN210109500 U CN 210109500U CN 201921135769 U CN201921135769 U CN 201921135769U CN 210109500 U CN210109500 U CN 210109500U
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insulating film
hole
transparent conductive
conductive layer
metal wiring
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CN201921135769.9U
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椎名秀树
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Japan Display Inc
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Japan Display Inc
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Abstract

The utility model provides a can restrain the display device who shows the reduction of quality. The display device includes: a metal wiring located outside the display unit; an organic insulating film located over the metal wiring; a first metal electrode on the organic insulating film outside the display section; a first insulating film on the organic insulating film and having a first through hole penetrating to the first metal electrode; a first transparent conductive layer on the first insulating film, electrically connected to the metal wiring, and in contact with the first metal electrode in the first through hole; a second insulating film which is located on the first insulating film and has a second through hole penetrating to the first transparent conductive layer; and a second transparent conductive layer on the second insulating film, in contact with the first transparent conductive layer in the second through hole, the second through hole overlapping with the first metal electrode and the first through hole.

Description

Display device
Cross Reference to Related Applications
This application is based on and claims the benefit of priority entitled japanese patent application No. 2018-136009, filed 2018, 7, 19, the entire contents of which are incorporated by reference.
Technical Field
The utility model discloses an embodiment relates to a display device.
Background
In recent years, various techniques for improving the display quality of a display device have been studied. In one example, a technique of covering a lead-out line electrically connected to a scan line with a shield electrode is disclosed. Such a shield electrode is electrically connected to the common wiring via the connection electrode. These shield electrodes and the connection electrodes are formed of Indium Tin Oxide (ITO).
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a can restrain the display device of the reduction of display quality.
According to one embodiment, a display device includes: a display unit including a plurality of pixels; a metal wiring located outside the display unit; an organic insulating film located over the metal wiring; a first metal electrode on the organic insulating film outside the display section; a first insulating film on the organic insulating film and having a first through hole penetrating to the first metal electrode; a first transparent conductive layer on the first insulating film, electrically connected to the metal wiring, and in contact with the first metal electrode in the first through hole; a second insulating film which is located on the first insulating film and has a second through hole penetrating to the first transparent conductive layer; and a second transparent conductive layer on the second insulating film, in contact with the first transparent conductive layer in the second through hole, the second through hole overlapping with the first metal electrode and the first through hole.
The first through hole and the second through hole may be provided at positions shifted from the metal wiring in a plan view.
The display device may further include a second metal electrode located between the organic insulating film and the first insulating film outside the display unit, wherein the organic insulating film has a third through hole penetrating through the metal wiring, the first insulating film has a fourth through hole penetrating through the second metal electrode, the second metal electrode is in contact with the metal wiring in the third through hole, and the first transparent conductive layer is in contact with the second metal electrode in the fourth through hole.
The third through-hole and the fourth through-hole may be provided at positions shifted from the second transparent conductive layer in a plan view.
According to one embodiment, a display device includes: a display unit including a plurality of pixels; a first metal wiring located outside the display section; a second metal wiring located outside the first metal wiring; an organic insulating film which is located over the first metal wiring and the second metal wiring, and has a first through hole penetrating to the second metal wiring; a metal electrode located on the organic insulating film outside the display unit and in contact with the second metal wiring in the first through hole; a first insulating film which is located on the organic insulating film and has a second through hole penetrating to the metal electrode; a first transparent conductive layer located on the first insulating film, and in the second through hole, in contact with the metal electrode; a second insulating film which is located on the first insulating film and has a third through hole penetrating to the first transparent conductive layer; and a second transparent conductive layer on the second insulating film, in contact with the first transparent conductive layer in the third through hole, the third through hole overlapping with the metal electrode and the second through hole.
The second metal wiring may have a different potential from the first metal wiring.
The metal electrode and the first transparent conductive layer may overlap the second metal wiring and the second transparent conductive layer in a plan view.
The first through-hole, the second through-hole, and the third through-hole may overlap the metal electrode in a plan view.
The second metal wiring may have the same potential as the first metal wiring.
The first transparent conductive layer may be disposed at a position shifted from the second metal wiring in a plan view.
In a plan view, the first through hole may overlap the second metal wiring and the second transparent conductive layer, and the second through hole and the third through hole may be provided at positions offset from the second metal wiring.
According to one embodiment, a display device includes: a display unit including a plurality of pixels; an organic insulating film; a first metal electrode on the organic insulating film outside the display section; a first transparent conductive layer in contact with the first metal electrode; an inorganic insulating film having a through hole overlapping with the first metal electrode; and a second transparent conductive layer located on the inorganic insulating film and in contact with the first metal electrode or the first transparent conductive layer in the through hole.
According to the utility model discloses, can provide the display device that can restrain the reduction of demonstration quality.
Drawings
Fig. 1 is a plan view showing an example of the configuration of a display device DSP according to the present embodiment.
Fig. 2 is a diagram showing a basic configuration and an equivalent circuit of the pixel PX.
Fig. 3 is an enlarged plan view of the area a3 of the display panel PNL shown in fig. 1.
Fig. 4 is a cross-sectional view of the display device DSP taken along line a-B shown in fig. 3.
Fig. 5 is a cross-sectional view of the display panel PNL taken along line C-D shown in fig. 3.
Fig. 6 is a cross-sectional view of the display panel PNL taken along line E-F shown in fig. 3.
Fig. 7 is a cross-sectional view of the display panel PNL along the line G-H shown in fig. 3.
Fig. 8 is an enlarged plan view of the area a3 of the display panel PNL shown in fig. 1.
Fig. 9 is a cross-sectional view of the display panel PNL along the line I-J shown in fig. 8.
Fig. 10 is another sectional view of the display panel PNL taken along the line I-J shown in fig. 8.
Fig. 11 is a cross-sectional view of the display panel PNL taken along the line K-L shown in fig. 8.
Fig. 12 is a cross-sectional view of another configuration example of the display panel PNL along the line C-D shown in fig. 3.
Fig. 13 is a cross-sectional view of another configuration example of the display panel PNL along the line C-D shown in fig. 3.
Detailed Description
The present embodiment will be described below with reference to the drawings. The present disclosure is merely an example, and appropriate modifications that can be easily conceived by those skilled in the art while keeping the gist of the present invention are naturally included in the scope of the present invention. In addition, although the drawings schematically show the width, thickness, shape, and the like of each part in comparison with the actual form in order to clarify the description, the drawings are merely examples and do not limit the explanation of the present invention. In the present specification and the drawings, the same reference numerals are given to components that exhibit the same or similar functions as those of the above-described components in some cases, and overlapping detailed descriptions may be omitted as appropriate.
In this embodiment, a liquid crystal display device will be described as an example of the display device DSP. The main configuration disclosed in this embodiment mode can also be applied to a self-luminous display device including an organic electroluminescent display element, a μ LED, or the like, an electronic paper type display device including an electrophoretic element, or the like, a display device using MEMS (Micro electro mechanical Systems), a display device using electrochromic, or the like.
Fig. 1 is a plan view showing an example of the configuration of a display device DSP according to the present embodiment. In one example, the first direction X, the second direction Y, and the third direction Z are orthogonal to each other, but may intersect at an angle other than 90 degrees. The first direction X and the second direction Y correspond to a direction parallel to a main surface of a substrate constituting the display device DSP, and the third direction Z corresponds to a thickness direction of the display device DSP. In the present specification, a position on the side of the tip of the arrow indicating the third direction Z is referred to as "up", and a position on the side opposite to the tip of the arrow is referred to as "down". Further, assuming that the observation position for observing the display device DSP is located on the tip side of the arrow indicating the third direction Z, the observation from the observation position to the X-Y plane defined by the first direction X and the second direction Y is referred to as a plan view.
The display device DSP includes a display panel PNL, a flexible printed circuit board 1, an IC chip 2, and a circuit board 3.
The display panel PNL is a liquid crystal display panel, and includes a first substrate SUB1, a second substrate SUB2, a liquid crystal layer LC, a seal SE, and a light-shielding layer LS. The display panel PNL includes a display portion DA for displaying an image and a frame-shaped non-display portion NDA surrounding the display portion DA. The second substrate SUB2 is opposed to the first substrate SUB 1. The first substrate SUB1 has a mounting portion MA extending in the second direction Y than the second substrate SUB 2.
The light-shielding layer LS is located in the non-display portion NDA and provided on the second substrate SUB 2. The seal body SE is located in the non-display portion NDA, bonds the first substrate SUB1 and the second substrate SUB2, and seals the liquid crystal layer LC. The seal SE is provided at a position overlapping the light-shielding layer LS in a plan view. The non-display portion NDA includes a region a1 where the light-shielding layer LS and the liquid crystal layer LC overlap, and a region a2 where the seal SE and the light-shielding layer LS overlap. The region a1 surrounds the display portion DA, and the region a2 surrounds the region a 1. In that
In fig. 1, the region a1, the region a2, and the display unit DA in which the liquid crystal layer LC is disposed are indicated by different oblique lines.
The display unit DA includes a plurality of pixels PX arranged in a matrix in a first direction (column direction) X and a second direction (row direction) Y.
The flexible printed circuit board 1 is mounted on the mounting portion MA and connected to the circuit board 3. The IC chip 2 is mounted on the flexible printed circuit board 1. The IC chip 2 may be mounted on the mounting portion MA. The IC chip 2 incorporates a display driver DD. The display driver DD outputs signals necessary for image display in an image display mode for displaying an image. In the illustrated example, the IC chip 2 incorporates a touch controller TC. The touch controller TC controls a touch sensing mode that detects approach or contact of an object to the display device DSP.
Although the detailed configuration of the display panel PNL is omitted here, the display panel PNL may have any configuration corresponding to the following mode: a display mode using a lateral electric field along the main surface of the substrate, a display mode using a longitudinal electric field along the normal to the main surface of the substrate, a display mode using an oblique electric field inclined in an oblique direction with respect to the main surface of the substrate, and a display mode using an appropriate combination of the lateral electric field, the longitudinal electric field, and the oblique electric field. The substrate main surface herein is a surface parallel to an X-Y plane defined by the first direction X and the second direction Y.
Fig. 2 is a diagram showing a basic configuration and an equivalent circuit of the pixel PX. The plurality of scanning lines G are connected to the scanning line driving circuit GD. The plurality of signal lines S are connected to the signal line driving circuit SD. The scanning line G and the signal line S do not necessarily have to extend linearly, and a part of them may be bent. For example, the signal line S is a signal line extending in the second direction Y even if a part thereof is bent.
The common electrode CE is disposed over the plurality of pixels PX. The common electrode CE is connected to the voltage supply unit CD and the touch controller TC shown in fig. 1. In the image display mode, the voltage supply section CD supplies a common voltage (Vcom) to the common electrode CE. In the touch sensing mode, the touch controller TC supplies a touch driving voltage different from the common voltage to the common electrode CE.
Each pixel PX includes a switching element SW, a pixel electrode PE, a common electrode CE, a liquid crystal layer LC, and the like. The switching element SW is formed of, for example, a Thin Film Transistor (TFT), and is electrically connected to the scanning line G and the signal line S. The scanning line G is electrically connected to the switching element SW in each of the pixels PX arranged in the first direction X. The signal line S is electrically connected to the switching element SW in each of the pixels PX arranged in the second direction Y. The pixel electrode PE is electrically connected to the switching element SW. The pixel electrodes PE face the common electrode CE, respectively, and the liquid crystal layer LC is driven by an electric field generated between the pixel electrodes PE and the common electrode CE. The capacitance CS is formed between an electrode having the same potential as the common electrode CE and an electrode having the same potential as the pixel electrode PE, for example.
Fig. 3 is an enlarged plan view of the area a3 of the display panel PNL shown in fig. 1. Here, a main part of the first substrate SUB1 will be described. The display unit DA shown in the figure corresponds to an example to which an FFS (Fringe Field Switching) mode, which is one of display modes using a lateral electric Field, is applied.
The scanning lines G1 to G3 extend linearly in the first direction X and are arranged at intervals in the second direction Y. The signal lines S1 to S3 extend substantially in the second direction Y and are arranged at intervals in the first direction X. The scan lines G1 to G3 and the signal lines S1 to S3 cross each other. The metal wirings M1 to M3 are overlapped on the signal lines S1 to S3, respectively. The common electrode CE is disposed on the display portion DA and overlaps the signal lines S1 to S3 and the metal wirings M1 to M3.
The pixel electrodes PE are arranged in the display portion DA in a matrix in the first direction X and the second direction Y. For example, the pixel electrode PE1 of the odd-numbered row located between the scan lines G1 and G2 has a plurality of strip electrodes Pa1 extending in the direction D1. In addition, the pixel electrode PE2 of the even-numbered row located between the scanning lines G2 and G3 has a plurality of strip electrodes Pa2 extending in the direction D2. In the illustrated example, three charged electrodes Pa1 and Pa2 are provided, but the number of charged electrodes Pa1 and Pa2 is not limited to the illustrated example.
Next, attention is focused on the region a1 outside the display section DA. The metal wiring 30 and the transparent conductive layers 31 and 32 are disposed so as to surround the display portion DA. The metal electrode 41 is formed in an island shape at a position overlapping with the transparent conductive layers 31 and 32. The metal electrode 42 is formed in an island shape at a position overlapping with the metal wiring 30 and the transparent conductive layer 31.
The metal wiring 30 is a wiring located in the same layer as the signal line S1 or the like and formed of the same material as the signal line S1. The metal electrodes 41 and 42 are electrodes located in the same layer as the metal wiring M1 or the like and formed of the same material as the metal wiring M1. The transparent conductive layer 31 is a wiring which is located in the same layer as the common electrode CE and is formed of the same material as the common electrode CE. The transparent conductive layer 32 is a wiring which is located in the same layer as the pixel electrode PE and is formed of the same material as the pixel electrode PE.
The metal electrode 41 is disposed at a position offset from the metal wiring 30. The transparent conductive layer 31 and the metal electrode 41 are electrically connected to each other in the through hole CH 1. The transparent conductive layers 31 and 32 are electrically connected to each other in the through hole CH 2. The through holes CH1 and CH2 overlap the metal electrode 41 and are provided at positions offset from the metal wiring 30. The edge of the through hole CH2 does not intersect the edge of the through hole CH1 over the entire circumference, but is located inside the through hole CH 1. The same metal electrodes 41 are arranged at intervals in the first direction X.
The metal electrode 42 is disposed at a position offset from the transparent conductive layer 32. The metal wiring 30 and the metal electrode 42 are electrically connected to each other in the through hole CH 3. The metal electrode 42 and the transparent conductive layer 31 are electrically connected to each other in the through hole CH 4. The through holes CH3 and CH4 are arranged at intervals in the second direction Y. The through holes CH3 and CH4 overlap the metal electrode 42 and are provided at positions offset from the transparent conductive layer 32. The same metal electrodes 42 are arranged with a space in the second direction Y between the display portion DA and the scanning line driving circuit GD, although not shown.
Thus, all of the metal wiring 30 and the transparent conductive layers 31 and 32 are electrically connected to each other and have the same potential. The metal wiring 30 supplies a common voltage (Vcom) in, for example, an image display mode and a touch sensing mode. That is, the transparent conductive layers 31 and 32 have a different potential from the common electrode CE to which the touch driving voltage is applied in the touch sensing mode.
The line electrode EL is positioned in the non-display area NDA and overlaps the transparent conductive layer 31. The linear electrode EL intersects the scanning line G2 and is adjacent to the signal line S3 and the metal interconnection M3. The linear electrode EL has an electrode portion EL1 extending in the direction D1, an electrode portion EL2 extending in the direction D2, and a base portion EL 3.
The metal electrode 43 is formed in an island shape at a position overlapping with the transparent conductive layer 31 and the base portion EL 3. The transparent conductive layer 31 and the metal electrode 43 are electrically connected to each other in the through hole CH 5. The transparent conductive layer 31 and the base portion EL3 are electrically connected to each other in the through hole CH 6. The through holes CH5 and CH6 overlap the metal electrode 43. The edge of the through hole CH6 does not intersect the edge of the through hole CH5 over the entire circumference, but is located inside the through hole CH 5.
The metal electrode 43 is an electrode located in the same layer as the metal wiring M1 or the like and formed of the same material as the metal wiring M1. The line electrode EL is a transparent electrode located on the same layer as the pixel electrode PE and formed of the same material as the pixel electrode PE.
Fig. 4 is a cross-sectional view of the display device DSP taken along line a-B shown in fig. 3.
The first substrate SUB1 includes an insulating substrate 10, insulating films 11 to 16, a semiconductor layer SC, signal lines S1 and S2, metal wirings M1 and M2, a common electrode CE, a pixel electrode PE1, an alignment film AL1, and the like. The insulating substrate 10 is a transparent substrate such as a glass substrate or a flexible resin substrate. The semiconductor layer SC is located above the insulating film 11, and is covered with an insulating film 12. The semiconductor layer SC is formed of, for example, polysilicon, but may be formed of amorphous silicon or an oxide semiconductor. The scanning line G1 shown in fig. 3 and the like are located between the insulating films 12 and 13.
The signal lines S1 and S2 are located above the insulating film 13 and covered with the insulating film 14. The metal wirings M1 and M2 are located above the insulating film 14 and covered with the insulating film 15. In one example, the signal line S1 and the metal wiring M1 are a first laminate in which a layer containing titanium (Ti), a layer containing aluminum (Al), and a layer containing titanium (Ti) are sequentially laminated, or a second laminate in which a layer containing molybdenum (Mo), a layer containing aluminum (Al), and a layer containing molybdenum (Mo) are sequentially laminated.
The common electrode CE is located above the insulating film 15, covered with an insulating film 16. The pixel electrode PE1 is located on the insulating film 16 and covered with an alignment film AL 1. The pixel electrode PE1 and the common electrode CE are formed of a transparent conductive material such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO).
The insulating films 11 to 13 and the insulating film 16 are inorganic insulating films formed of silicon oxide, silicon nitride, silicon oxynitride, or the like, and may have a single-layer structure or a multi-layer structure. The insulating films 14 and 15 are, for example, organic insulating films formed of acrylic resin or the like. The insulating film 15 may be an inorganic insulating film.
The second substrate SUB2 includes an insulating substrate 20, a light-shielding layer BM, a color filter layer CF, an overcoat layer OC, an alignment film AL2, and the like. The insulating substrate 20 is a transparent substrate such as a glass substrate or a flexible resin substrate. The light-shielding layer BM is formed integrally with the light-shielding layer LS shown in fig. 1. The color filter layer CF includes a red color filter CFR, a green color filter CFG, and a blue color filter CFB. The color filter CFB is opposed to the pixel electrode PE 1. The other color filters CFR and CFG are also opposed to the other pixel electrodes PE, respectively. The overcoat layer OC covers the color filter layer CF. The overcoat layer OC is a transparent organic insulating film. The alignment film AL2 covers the overcoat layer OC.
The liquid crystal layer LC is located between the first substrate SUB1 and the second substrate SUB2, and is held between the alignment films AL1 and AL 2.
An optical element OD1 including a polarizing plate PL1 was bonded to the insulating substrate 10. An optical element OD2 including a polarizing plate PL2 was bonded to the insulating substrate 20. The optical elements OD1 and OD2 may also include a retardation plate, a scattering layer, an antireflection layer, and the like as necessary.
In such a display panel PNL, in an off state where no electric field is formed between the pixel electrode PE1 and the common electrode CE, the liquid crystal molecules LM are initially aligned in a predetermined direction between the alignment films AL1 and AL 2. In such an off state, illumination light emitted from the illumination device IL toward the display panel PNL is absorbed by the optical elements OD1 and OD2, and dark display is performed. On the other hand, in the on state where an electric field is formed between the pixel electrode PE1 and the common electrode CE, the liquid crystal molecules LM are aligned in a direction different from the initial alignment direction by the electric field, and the alignment direction thereof is controlled by the electric field. In such an on state, part of the illumination light passes through the optical elements OD1 and OD2, and becomes a bright display.
Fig. 5 is a cross-sectional view of the display panel PNL taken along line C-D shown in fig. 3. In the first substrate SUB1, the metal electrode 41 is located above the insulating film 14. The insulating film 15 is located on the insulating film 14 and the metal electrode 41, and has a through hole CH1 penetrating through to the metal electrode 41. The transparent conductive layer 31 is located on the insulating film 15 and is in contact with the metal electrode 41 in the through hole CH 1.
The insulating film 16 is located above the insulating film 15 and the transparent conductive layer 31, and has a through hole CH2 penetrating through the transparent conductive layer 31. In particular, the insulating film 16 extends to the inside of the through hole CH1, and covers a portion near the edge of the through hole CH1, of the portions where the metal electrode 41 contacts the transparent conductive layer 31. The through hole CH2 is provided in the center of the portion where the metal electrode 41 contacts the transparent conductive layer 31. That is, the through hole CH2 is provided at a position where the entire through hole CH2 overlaps the metal electrode 41 and the through hole CH 1.
The transparent conductive layer 32 is located above the insulating film 16, and is in contact with the transparent conductive layer 31 in the through hole CH 2. The entire portions of the transparent conductive layers 31 and 32 in contact with each other overlap the metal electrodes 41. That is, the insulating film 15 is not interposed between the metal electrode 41 and the portion where the transparent conductive layers 31 and 32 are in contact. The alignment film AL1 covers the transparent conductive layer 32.
Fig. 6 is a cross-sectional view of the display panel PNL taken along line E-F shown in fig. 3. In the first substrate SUB1, the metal wiring 30 is located above the insulating film 13. The insulating film 14 is located above the insulating film 13 and the metal wiring 30, and has a through hole CH3 penetrating through to the metal wiring 30. The metal electrode 42 is located on the insulating film 14 and is in contact with the metal wiring 30 in the through hole CH 3.
The insulating film 15 is located on the insulating film 14 and the metal electrode 42, and has a through hole CH4 penetrating through to the metal electrode 42. The insulating film 15 is also disposed in the through hole CH 3. The through hole CH4 is provided at a position offset from the through hole CH 3. The transparent conductive layer 31 is located on the insulating film 15 and is in contact with the metal electrode 42 in the through hole CH 4. The insulating film 16 is located on the insulating film 15 and the transparent conductive layer 31, and is also disposed in the through hole CH 4.
In the configuration examples shown in fig. 3 to 6, the metal electrode 41 corresponds to a first metal electrode, the metal electrode 42 corresponds to a second metal electrode, the transparent conductive layer 31 corresponds to a first transparent conductive layer, the transparent conductive layer 32 corresponds to a second transparent conductive layer, the through-hole CH1 corresponds to a first through-hole, the through-hole CH2 corresponds to a second through-hole, the through-hole CH3 corresponds to a third through-hole, the through-hole CH4 corresponds to a fourth through-hole, the insulating film 14 corresponds to an organic insulating film or a first organic insulating film, the insulating film 15 corresponds to a first insulating film or a second organic insulating film, and the insulating film 16 corresponds to a second insulating film or an inorganic insulating film.
For example, the organic insulating film is more likely to allow moisture to enter from the outside than the inorganic insulating film, and moisture is more likely to penetrate through a portion where two electrodes made of ITO are in contact, which is not covered with the inorganic insulating film. Such moisture intrusion has a risk of deteriorating the display quality.
According to this embodiment, in the through hole CH2, the portion where the transparent conductive layers 31 and 32 are in contact with each other overlaps the metal electrode 41 on the insulating film 14 as the organic insulating film, and is not in contact with the insulating film 14. Therefore, even when the transparent conductive layers 31 and 32 are more permeable to moisture than the metal electrode 41 and the insulating film 16, moisture entering through the insulating film 14 is blocked by the metal electrode 41. Therefore, the penetration of moisture into the liquid crystal layer LC can be suppressed, and the degradation of the display quality can be suppressed.
In addition, a transparent conductive film such as ITO has a higher resistance than a metal wiring, and when ITO is used for a wiring, a bridge, an electrode, or the like, a low resistance is preferable. According to the present embodiment, by laminating the metal electrode 41 on the portion where two pieces of ITO are in contact, the resistance can be reduced, and as a result, the reduction in display quality can also be suppressed.
Fig. 7 is a cross-sectional view of the display panel PNL along the line G-H shown in fig. 3. In the first substrate SUB1, the metal electrode 43 is located above the insulating film 14. The insulating film 15 is located on the insulating film 14 and the metal electrode 43, and has a through hole CH5 penetrating through to the metal electrode 43. The transparent conductive layer 31 is located on the insulating film 15 and is in contact with the metal electrode 43 in the through hole CH 5. The insulating film 16 is located above the insulating film 15 and the transparent conductive layer 31, and has a through hole CH6 penetrating through the transparent conductive layer 31. The through hole CH6 is provided at a position where the entire through hole overlaps the metal electrode 43. The base portion EL3 of the line electrode EL is located above the insulating film 16 and is in contact with the transparent conductive layer 31 in the through hole CH 6. The entire portion of the transparent conductive layer 31 and the base portion EL3 in contact with each other overlaps the metal electrode 43.
The linear electrode EL overlaps the metal electrode 43 on the insulating film 14 at a portion in contact with the transparent conductive layer 31, and does not contact the insulating film 14. Therefore, the metal electrode 43 cuts off the moisture entering through the insulating film 14, and the entry of the moisture into the liquid crystal layer LC can be suppressed. At the same time, the portion of the linear electrode EL in contact with the transparent conductive layer 31 has low resistance.
Fig. 8 is an enlarged plan view of the area a3 of the display panel PNL shown in fig. 1. Here, a region farther from the display portion DA than the region shown in fig. 3 is shown. The display unit DA is not shown, and the metal wiring 30 and the transparent conductive layers 31 and 32 are not described in detail. The metal electrodes 60 and 80 are shown by a one-dot chain line in the figure, and the transparent conductive layers 51 and 71 are shown by a two-dot chain line in the figure.
The metal wiring 50 is located outside the metal wiring 30. The transparent conductive layer 52 overlaps the metal wiring 50. The metal electrode 60 and the transparent conductive layer 51 are formed in an island shape at positions overlapping with the metal wiring 50 and the transparent conductive layer 52.
The metal wiring 50 and the metal electrode 60 are electrically connected to each other in the through hole CH 11. The transparent conductive layer 51 and the metal electrode 60 are electrically connected to each other in the through hole CH 12. The transparent conductive layers 51 and 52 are electrically connected to each other in the through hole CH 13. The through holes CH11 to CH13 overlap the metal electrode 60. The edge of the through hole CH13 does not intersect the edge of the through hole CH12 over the entire circumference, but is located inside the through hole CH 12. The same metal electrodes 60 are arranged at intervals in the first direction X.
Thus, the metal wiring 50 and the transparent conductive layer 52 are electrically connected to each other and have the same potential. In one example, the metal wiring 50 is set to have a different potential from the metal wiring 30. For example, the metal wiring 50 is a wiring having a fixed potential, and may have a relatively low potential or a high potential with respect to the potential of the metal wiring 30. The metal wiring 50 may be set to have the same potential as the metal wiring 30.
The metal wiring 70 is located outside the metal wiring 50. The transparent conductive layer 72 overlaps the metal wiring 70. A part of the metal electrode 80 is formed in an island shape at a position overlapping with the metal wiring 70 and the transparent conductive layer 72. The transparent conductive layer 71 is disposed at a position offset from the metal wiring 70 and overlaps the metal electrode 80.
The metal wiring 70 and the metal electrode 80 are electrically connected to each other in the through hole CH 21. The transparent conductive layer 71 and the metal electrode 80 are electrically connected to each other in the through hole CH 22. The transparent conductive layers 71 and 72 are electrically connected to each other in the through hole CH 23. The through holes CH21 to CH23 overlap the metal electrode 80. The through hole CH21 overlaps the metal wiring 70 and the transparent conductive layer 72. The through holes CH22 and CH23 are provided at positions offset from the metal wiring 70. The edge of the through hole CH23 does not intersect the edge of the through hole CH22 over the entire circumference, but is located inside the through hole CH 22. The same metal electrodes 80 are arranged at intervals in the first direction X. Although not shown, a plurality of other metal wirings are disposed outside (on a side away from the display unit DA) the metal wirings 70. The transparent conductive layer 72 overlaps these other metal wirings and shields electric fields from the metal wirings.
Thus, the metal wiring 70 and the transparent conductive layer 72 are electrically connected to each other and have the same potential. In one example, the metal wiring 70 is set to have the same potential as the metal wiring 30.
The metal wirings 50 and 70 are wirings which are formed of the same material as the signal line S1 and are located in the same layer as the signal line S1 and the like shown in fig. 4. The metal electrodes 60 and 80 are electrodes formed of the same material as the metal wiring M1 and located in the same layer as the metal wiring M1 and the like shown in fig. 4. The transparent conductive layers 51 and 71 are transparent electrodes that are formed of the same material as the common electrode CE shown in fig. 4 and are located in the same layer as the common electrode CE. The transparent conductive layers 52 and 72 are wirings formed of the same material as the pixel electrode PE shown in fig. 4 and located in the same layer as the pixel electrode PE.
Fig. 9 is a cross-sectional view of the display panel PNL along the line I-J shown in fig. 8. In the first substrate SUB1, the metal wiring 50 is located above the insulating film 13. The insulating film 14 is located above the insulating film 13 and the metal wiring 50, and has a through hole CH11 penetrating through to the metal wiring 50. The metal electrode 60 is located on the insulating film 14 and is in contact with the metal wiring 50 in the through hole CH 11.
The insulating film 15 is located above the insulating film 14 and the metal electrode 60, and has a through hole CH12 penetrating through the metal electrode 60. The insulating film 15 is also disposed in the through hole CH 11. The through hole CH12 is provided at a position offset from the through hole CH 11. The transparent conductive layer 51 is located on the insulating film 15 and is in contact with the metal electrode 60 in the through hole CH 12. The insulating film 16 is located above the insulating film 15 and the transparent conductive layer 51, and has a through hole CH13 penetrating through the transparent conductive layer 51. In the illustrated example, the two through holes CH13 are aligned in the first direction X. The through hole CH13 is provided at a position where the entire through hole CH13 overlaps the metal electrode 60 and the through hole CH 12.
The transparent conductive layer 52 is located above the insulating film 16, and is in contact with the transparent conductive layer 51 in the through hole CH 13. The entire portions of the transparent conductive layers 51 and 52 in contact with each other overlap the metal electrode 60. That is, the insulating film 15 is not interposed between the metal electrode 60 and the portion where the transparent conductive layers 51 and 52 are in contact.
Fig. 10 is another sectional view of the display panel PNL taken along the line I-J shown in fig. 8. The example shown in fig. 10 differs from the example shown in fig. 9 in that the through-holes CH13 are singulated, and the contact areas of the transparent conductive layers 51 and 52 are enlarged.
Fig. 11 is a cross-sectional view of the display panel PNL taken along the line K-L shown in fig. 8. In the first substrate SUB1, the metal wiring 70 is located above the insulating film 13. The insulating film 14 is located above the insulating film 13 and the metal wiring 70, and has a through hole CH21 penetrating through to the metal wiring 70. The metal electrode 80 is located on the insulating film 14 and is in contact with the metal wiring 70 in the through hole CH 21.
The insulating film 15 is located above the insulating film 14 and the metal electrode 80, and has a through hole CH22 penetrating through to the metal electrode 80. The insulating film 15 is also disposed in the through hole CH 21. The through hole CH22 is provided at a position offset from the through hole CH 21. The transparent conductive layer 71 is located on the insulating film 15 and is in contact with the metal electrode 80 in the through hole CH 22. The insulating film 16 is located above the insulating film 15 and the transparent conductive layer 71, and has a through hole CH23 penetrating through the transparent conductive layer 71. The through hole CH23 is provided at a position where the entire through hole overlaps the metal electrode 80.
The transparent conductive layer 72 is located above the insulating film 16, and is in contact with the transparent conductive layer 71 in the through hole CH 23. The entire portions of the transparent conductive layers 71 and 72 in contact with each other overlap the metal electrodes 80. That is, the insulating film 15 is not interposed between the metal electrode 80 and the portion where the transparent conductive layers 71 and 72 are in contact.
In the configuration examples shown in fig. 8 to 11, the metal wiring 30 corresponds to a first metal wiring, the metal wirings 50 and 70 correspond to a second metal wiring, the metal electrodes 60 and 80 correspond to metal electrodes, the transparent conductive layers 51 and 71 correspond to first transparent conductive layers, the transparent conductive layers 52 and 72 correspond to second transparent conductive layers, the through holes CH11 and CH21 correspond to first through holes, the through holes CH12 and CH22 correspond to second through holes, the through holes CH13 and CH23 correspond to third through holes, the insulating film 14 corresponds to an organic insulating film or a first organic insulating film, the insulating film 15 corresponds to a first insulating film or a second organic insulating film, and the insulating film 16 corresponds to a second insulating film or an inorganic insulating film.
The portions of the transparent conductive layers 51 and 52 located outside the display unit DA that are in contact with each other overlap the metal electrode 60, and the portions of the transparent conductive layers 71 and 72 that are in contact with each other overlap the metal electrode 80. That is, the portions where the transparent conductive layers 51 and 52 are in contact and the portions where the transparent conductive layers 71 and 72 are in contact are not in contact with the insulating film 14 which is an organic insulating film. Therefore, in these portions as well, the penetration of moisture into the liquid crystal layer LC through the insulating film 14 can be suppressed. At the same time, the resistance of the portion where the transparent conductive layers 51 and 52 are in contact can be reduced.
Next, another configuration example will be described with reference to fig. 12 and 13. Here, the description will be given focusing on the portions where the transparent conductive layers 31 and 32 are in contact with each other. The configuration examples shown in fig. 12 and 13 are different from the above configuration examples in that the first substrate SUB1 does not include the insulating film 15 between the insulating film 14 and the insulating film 16.
In the configuration example shown in fig. 12, the metal electrode 41 is formed in an island shape on the insulating film 14. The transparent conductive layer 31 is located on the insulating film 14, overlaps the metal electrode 41, and is in contact with the metal electrode 41. The insulating film 16 is located above the insulating film 14 and the transparent conductive layer 31, and has a through hole CH2 penetrating through the transparent conductive layer 31. The through hole CH2 is provided at a position where the entire through hole overlaps the metal electrode 41. The transparent conductive layer 32 is located above the insulating film 16, and is in contact with the transparent conductive layer 31 in the through hole CH 2. The entire portions of the transparent conductive layers 31 and 32 in contact with each other overlap the metal electrodes 41 and do not contact the insulating film 14.
In the configuration example shown in fig. 13, the transparent conductive layer 31 is located above the insulating film 14. The metal electrode 41 is located on the transparent conductive layer 31, is formed in an island shape, and is in contact with the transparent conductive layer 31. The insulating film 16 is located on the insulating film 14, the transparent conductive layer 31, and the metal electrode 41, and has a through hole CH2 penetrating through to the metal electrode 41. The through hole CH2 is provided at a position where the entire through hole overlaps the metal electrode 41. The transparent conductive layer 32 is located on the insulating film 16 and is in contact with the metal electrode 41 in the through hole CH 2. The entire portions of the transparent conductive layers 31 and 32 in contact with each other overlap the metal electrodes 41 and do not contact the insulating film 14.
In these configuration examples, the same effects as those in the above configuration examples can be obtained. The configuration examples shown in fig. 12 and 13 are also applicable to the portion where the transparent conductive layer 31 and the line electrode EL are in contact with each other shown in fig. 7, the portion where the transparent conductive layers 51 and 52 are in contact with each other shown in fig. 9 and 10, and the portion where the transparent conductive layers 71 and 72 are in contact with each other shown in fig. 11.
In the above-described embodiment, the edges of the through holes are shown by rectangles in a plan view, but there are cases where the corners have rounded corners, and there may be cases where the edges of the through holes have other shapes such as circles and ellipses. The edge of the through hole may be defined as an outer peripheral edge of a portion where the two conductive layers are in contact with each other through the through hole in a plan view.
As described above, according to the present embodiment, a display device in which deterioration in display quality can be suppressed can be provided.
In addition, the embodiments of the present invention have been described, and the embodiments are presented as examples, and are not intended to limit the scope of the present invention. These new embodiments can be implemented in other various ways, and various omissions, substitutions, and changes can be made without departing from the spirit of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalent scope thereof.

Claims (12)

1. A display device is characterized by comprising:
a display unit including a plurality of pixels;
a metal wiring located outside the display unit;
an organic insulating film located over the metal wiring;
a first metal electrode on the organic insulating film outside the display section;
a first insulating film on the organic insulating film and having a first through hole penetrating to the first metal electrode;
a first transparent conductive layer on the first insulating film, electrically connected to the metal wiring, and in contact with the first metal electrode in the first through hole;
a second insulating film which is located on the first insulating film and has a second through hole penetrating to the first transparent conductive layer; and
a second transparent conductive layer on the second insulating film, in contact with the first transparent conductive layer in the second through hole,
the second through hole overlaps with the first metal electrode and the first through hole.
2. The display device of claim 1,
the first through hole and the second through hole are provided at positions deviated from the metal wiring in a plan view.
3. The display device of claim 1,
a second metal electrode located between the organic insulating film and the first insulating film on the outer side of the display unit,
the organic insulating film has a third through hole penetrating to the metal wiring,
the first insulating film has a fourth through hole penetrating to the second metal electrode,
the second metal electrode is in contact with the metal wiring in the third through hole,
the first transparent conductive layer is in contact with the second metal electrode in the fourth through hole.
4. The display device of claim 3,
the third through-hole and the fourth through-hole are provided at positions shifted from the second transparent conductive layer in a plan view.
5. A display device is characterized by comprising:
a display unit including a plurality of pixels;
a first metal wiring located outside the display section;
a second metal wiring located outside the first metal wiring;
an organic insulating film which is located over the first metal wiring and the second metal wiring, and has a first through hole penetrating to the second metal wiring;
a metal electrode located on the organic insulating film outside the display unit and in contact with the second metal wiring in the first through hole;
a first insulating film which is located on the organic insulating film and has a second through hole penetrating to the metal electrode;
a first transparent conductive layer located on the first insulating film, and in the second through hole, in contact with the metal electrode;
a second insulating film which is located on the first insulating film and has a third through hole penetrating to the first transparent conductive layer; and
a second transparent conductive layer on the second insulating film, in contact with the first transparent conductive layer in the third through hole,
the third through hole overlaps with the metal electrode and the second through hole.
6. The display device of claim 5,
the second metal wiring has a different potential from the first metal wiring.
7. The display device of claim 6,
the metal electrode and the first transparent conductive layer overlap with the second metal wiring and the second transparent conductive layer in a plan view.
8. The display device of claim 6,
the first through-hole, the second through-hole, and the third through-hole overlap with the metal electrode in a plan view.
9. The display device of claim 5,
the second metal wiring has the same potential as the first metal wiring.
10. The display device of claim 9,
the first transparent conductive layer is disposed at a position deviated from the second metal wiring in a plan view.
11. The display device of claim 9,
the first through hole overlaps with the second metal wiring and the second transparent conductive layer in a plan view, and the second through hole and the third through hole are provided at positions offset from the second metal wiring.
12. A display device is characterized by comprising:
a display unit including a plurality of pixels;
an organic insulating film;
a first metal electrode on the organic insulating film outside the display section;
a first transparent conductive layer in contact with the first metal electrode;
an inorganic insulating film having a through hole overlapping with the first metal electrode; and
and a second transparent conductive layer located on the inorganic insulating film and in contact with the first metal electrode or the first transparent conductive layer in the through hole.
CN201921135769.9U 2018-07-19 2019-07-19 Display device Active CN210109500U (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-136009 2018-07-19
JP2018136009A JP2020013027A (en) 2018-07-19 2018-07-19 Display

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CN210109500U true CN210109500U (en) 2020-02-21

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Application Number Title Priority Date Filing Date
CN201921135769.9U Active CN210109500U (en) 2018-07-19 2019-07-19 Display device

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CN (1) CN210109500U (en)

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