CN209980998U - Multi-core ceramic capacitor - Google Patents
Multi-core ceramic capacitor Download PDFInfo
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- CN209980998U CN209980998U CN201920804280.XU CN201920804280U CN209980998U CN 209980998 U CN209980998 U CN 209980998U CN 201920804280 U CN201920804280 U CN 201920804280U CN 209980998 U CN209980998 U CN 209980998U
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Abstract
The utility model provides a multicore ceramic capacitor, including first pin, the second pin, a plurality of electric capacity chips and packaging body, first pin is formed with first polar plate, the second pin is formed with the second polar plate, first polar plate and second polar plate parallel interval are arranged, still include the series polar plate, the series polar plate sets up between first polar plate and second polar plate, between series polar plate and the first polar plate, all be connected with electric capacity chip between series polar plate and the second polar plate, electric capacity chip establishes ties earlier into electric capacity chipset through the series polar plate, then electric capacity chipset connects in parallel into electric capacity chip unit again, finally electric connection is between first polar plate and second polar plate, realize the series-parallel combination of electric capacity chip, partial electric capacity chip and partial electric capacity chip establish ties and have improved ceramic capacitor's withstand voltage value.
Description
Technical Field
The utility model belongs to the electronic component field, concretely relates to multicore ceramic capacitor.
Background
A multilayer chip ceramic capacitor, i.e., MLCC, is one of the most commonly used components in circuits, electrical appliances, and electronic equipment. The method is widely applied to electronic products, communication, computers and other electric products and electronic equipment. Regarding the number of MLCCs used by a single machine, with the largest usage amount of the notebook computer, the digital television, the IPAD and the mobile phone, the MLCC amount of each notebook computer is about 500-.
The capacitor is driven by technology to be miniaturized, miniaturized and large-capacity. The single MLCC is difficult to make great progress on large capacity, high voltage resistance and low equivalent series resistance only by changing the production process and the materials for manufacturing the product, if a plurality of MLCCs are directly connected in series or in parallel in a circuit, the complexity of the circuit design is increased, the space occupied by the MLCCs on a circuit board is also increased, and the improvement is needed.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming prior art's shortcoming, provide a multicore ceramic capacitor that can improve the withstand voltage value of condenser.
The utility model adopts the following technical scheme:
the utility model provides a multicore ceramic capacitor, includes first pin, second pin, a plurality of electric capacity chip and packaging body, and first pin is formed with first polar plate, and the second pin is formed with the second polar plate, and first polar plate is arranged with second polar plate parallel interval, still includes the series polar plate, and the series polar plate sets up between first polar plate and second polar plate, and the series polar plate is connected with electric capacity chip between first polar plate, all between series polar plate and the second polar plate.
Furthermore, the number of the capacitor chips between the series polar plate and the first polar plate is the same as that of the capacitor chips between the series polar plate and the second polar plate, and the capacitor chips are arranged oppositely.
Furthermore, the first pins are provided with two first polar plates arranged in parallel at intervals, the second pins are provided with two second polar plates arranged in parallel at intervals, the first polar plates and the second polar plates are arranged in a staggered mode, and the series polar plates are arranged between every two adjacent first polar plates and every two adjacent second polar plates.
Further, the capacitor chips are arranged between the serial pole plate and the front surface and the back surface of the first pole plate, and between the serial pole plate and the front surface and the back surface of the second pole plate, and the number of the capacitor chips on the front surface is the same as that of the capacitor chips on the back surface, and the capacitor chips are arranged oppositely.
Furthermore, the first pin and the second pin are provided with easy-to-fold holes.
Further, the easy-to-fold hole is arranged in the transverse middle position of the first pin or the second pin.
Furthermore, both ends of the series connection clamping plate are provided with positioning holes.
Furthermore, the packaging body is used for packaging the first polar plate, the second polar plate, the series polar plate and the capacitor chip, and the packaging body is approximately a cuboid.
It can be known from the above description of the present invention, compared with the prior art, the beneficial effects of the present invention are: the capacitor chip is firstly connected in series to form a capacitor chip group through the series-connection polar plates, then the capacitor chip group is connected in parallel to form a capacitor chip unit, and finally the capacitor chip is electrically connected between the first polar plate and the second polar plate, so that series-parallel connection combination of the capacitor chip is realized, partial capacitor chips are connected in series with partial capacitor chips, the withstand voltage value of the ceramic capacitor is improved, the bearing voltage of each capacitor chip is reduced, each capacitor chip unit formed by connecting the capacitor chip groups in parallel is the same voltage and capacitance, a voltage-sharing circuit is realized, the reliability of the product is improved, and the capacitor chip unit can be flexibly applied to.
Drawings
Fig. 1 is a partial structural diagram of the present invention;
FIG. 2 is a schematic view of a partial structure of the present invention;
fig. 3 is a schematic view of a partial structure of the present invention;
fig. 4 is a schematic view of a partial structure of the present invention;
fig. 5 is a schematic view of a partial structure of the present invention;
fig. 6 is a schematic view of a partial structure of the present invention;
in the figure, 1-a first pin, 2-a second pin, 3-a series electrode plate, 4-a capacitor chip, 5-a packaging body, 6-an easy-to-fold hole, 11-a first electrode plate, 21-a second electrode plate and 31-a positioning hole.
Detailed Description
The present invention will be further described with reference to the following detailed description.
Referring to fig. 1 to 6, a multi-core ceramic capacitor includes a first lead 1, a second lead 2, a series plate 3, a plurality of capacitor chips 4, and a package 5.
The first pins 1 and the second pins 2 are arranged oppositely, the first pins 1 are provided with first polar plates 11, the second pins 2 are provided with second polar plates 21, the first polar plates 11 and the second polar plates 21 are arranged in parallel at intervals, specifically, the first pins 1 are provided with two first polar plates 11 arranged in parallel at intervals, the second polar plates 2 are provided with two second polar plates 21 arranged in parallel at intervals, the first polar plates 11 and the second polar plates 21 are arranged in a staggered mode, further, the width of the first polar plate 11 positioned on the left side of the first pins 1 is smaller than that of the other first polar plate 11, and the width of the second polar plate 21 positioned on the right side of the second pins 2 is smaller than that of the other second polar plate 21.
The series polar plate 3 is arranged between the first polar plate 11 and the second polar plate 21, the series polar plate 3 is arranged between the adjacent first polar plate 11 and the second polar plate 21, the two ends of the series polar plate 3 are provided with the positioning holes 31, when the capacitor chip 4 is welded, the series polar plate 3 is positioned between the first polar plate 11 and the second polar plate 21 through the positioning holes 31, specifically, the first pin 1 and the second pin 2 are provided with the easy-to-fold holes 6, the easy-to-fold holes 6 are arranged at the transverse middle positions of the first pin 1 or the second pin 2, the easy-to-fold holes 6 can reduce the rigidity of the first pin 1 or the second pin 2, and are convenient for subsequent downward bending to form a leading-out end, and further, the manufacturing material of the series polar plate 3 is the same as the materials of the first pin 1 and the second pin 2.
The capacitor chip 4 is electrically connected between the series electrode plate 3 and the first electrode plate 11 and between the series electrode plate 3 and the second electrode plate 21, the number of the capacitor chips 4 arranged between the series electrode plate 3 and the first electrode plate 11 is the same as the number of the capacitor chips 4 arranged between the series electrode plate 3 and the second electrode plate 21, and the capacitor chips 4 are arranged oppositely, specifically, the capacitor chips 4 are arranged between the series electrode plate 3 and the front and back surfaces of the first electrode plate 11, the capacitor chips 4 are arranged between the series electrode plate 3 and the front and back surfaces of the second electrode plate 21, the number of the capacitor chips 4 on the front surface is the same as the number of the capacitor chips 4 on the back surface, and the capacitor chips 4 are arranged oppositely, further, the front surface of the multi-core ceramic capacitor of the present application comprises three groups of capacitor chip units connected in parallel between the first electrode plate 11 and the second electrode plate 21, each capacitor chip unit comprises four capacitor chip, four capacitor chip groups of every capacitor chip unit share a series connection polar plate 3, capacitor chip 4 establishes ties into capacitor chip group through series connection polar plate 3, improves ceramic capacitor's withstand voltage value, reduces the voltage that every capacitor chip 4 bore, strengthens product reliability, capacitor chip group connects in parallel into capacitor chip unit, and the electricity is connected between first polar plate 11 and second polar plate 21, makes every capacitor chip unit be same voltage and electric capacity, realizes voltage-sharing circuit, improves the reliability of product.
The package body 5 is used for packaging the first electrode plate 11, the second electrode plate 21, the series electrode plate 3 and the capacitor chip 4, the package body 5 is approximately a cuboid, and specifically, the package body 5 is made of epoxy resin.
The capacitor chip 4 among the multicore ceramic capacitor of this application realizes establishing ties and then parallelly connected through series connection polar plate 3 earlier, realizes the series-parallel combination of capacitor chip, has improved ceramic capacitor's withstand voltage value, reduces every capacitor chip 4's bearing voltage, makes each capacitor chip unit that is become by a plurality of series connection capacitor chip parallels be same voltage and electric capacity, realizes equalizer circuit, improves the reliability of product, can apply to each field in a flexible way.
The above description is only a preferred embodiment of the present invention, and therefore the scope of the present invention should not be limited thereby, and all equivalent changes and modifications made within the scope of the claims and the specification should be considered within the scope of the present invention.
Claims (8)
1. The utility model provides a multicore ceramic capacitor, includes first pin, second pin, a plurality of electric capacity chip and packaging body, and first pin is formed with first polar plate, and the second pin is formed with the second polar plate, and first polar plate and second polar plate parallel interval arrange its characterized in that: the capacitor comprises a first pole plate, a second pole plate and a capacitor chip, and is characterized by further comprising a series pole plate, wherein the series pole plate is arranged between the first pole plate and the second pole plate, and the capacitor chip is electrically connected between the series pole plate and the first pole plate and between the series pole plate and the second pole plate.
2. The multi-core ceramic capacitor as claimed in claim 1, wherein: the number of the capacitor chips between the series polar plate and the first polar plate is the same as that between the series polar plate and the second polar plate, and the capacitor chips are oppositely arranged.
3. The multi-core ceramic capacitor as claimed in claim 1, wherein: the first pins are provided with two first polar plates which are arranged in parallel at intervals, the second pins are provided with two second polar plates which are arranged in parallel at intervals, the first polar plates and the second polar plates are arranged in a staggered mode, and the series polar plates are arranged between every two adjacent first polar plates and every two adjacent second polar plates.
4. The multi-core ceramic capacitor as claimed in claim 1, wherein: the capacitor chips are arranged between the serial polar plate and the front surface and the back surface of the first polar plate as well as between the serial polar plate and the front surface and the back surface of the second polar plate, and the number of the capacitor chips on the front surface is the same as that of the capacitor chips on the back surface and the capacitor chips on the back surface are oppositely arranged.
5. The multi-core ceramic capacitor as claimed in claim 1, wherein: the first pin and the second pin are provided with easy-to-fold holes.
6. The multi-core ceramic capacitor as claimed in claim 5, wherein: the easy-folding hole is arranged in the transverse middle position of the first pin or the second pin.
7. The multi-core ceramic capacitor as claimed in claim 1, wherein: and positioning holes are formed in the two ends of the series polar plates.
8. The multi-core ceramic capacitor as claimed in claim 1, wherein: the packaging body is used for packaging the first polar plate, the second polar plate, the series polar plate and the capacitor chip and is approximately cuboid.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201920804280.XU CN209980998U (en) | 2019-05-30 | 2019-05-30 | Multi-core ceramic capacitor |
Applications Claiming Priority (1)
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CN201920804280.XU CN209980998U (en) | 2019-05-30 | 2019-05-30 | Multi-core ceramic capacitor |
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CN209980998U true CN209980998U (en) | 2020-01-21 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110098055A (en) * | 2019-05-30 | 2019-08-06 | 福建火炬电子科技股份有限公司 | A kind of multicore ceramic capacitor |
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2019
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110098055A (en) * | 2019-05-30 | 2019-08-06 | 福建火炬电子科技股份有限公司 | A kind of multicore ceramic capacitor |
CN110098055B (en) * | 2019-05-30 | 2024-02-06 | 福建火炬电子科技股份有限公司 | Multicore ceramic capacitor |
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