CN209980233U - Simulation debugging device for debugging security check state of equipment - Google Patents

Abstract

The utility model discloses a emulation debugging device for debugging equipment safety inspection state, include: the system comprises a simulation chip, a management module and a user computer; a reset module, a security check module and a PC pointer register are arranged in the simulation chip, a security check state register is arranged in the security check module, and a security check information memory is arranged in the management module; the management module is connected with a PC pointer register in the simulation chip through a first register reading bus, connected with a security check state register in the security check module through a second register reading bus, connected with the security check module in the simulation chip through a reset trigger signal wire, and connected with a reset module in the simulation chip through a reset control signal wire; the management module is connected with a user computer through a debugging channel. The utility model discloses can effectively improve the debugging efficiency of user program code to and the whole debugging efficiency under the equipment site environment.

Description

Simulation debugging device for debugging security check state of equipment

Technical Field

The utility model relates to a treater chip emulation field especially relates to a emulation debugging device for debugging equipment safety inspection state.

Background

The processor chip has user program developed by user, the tool used in writing and debugging the user program is usually simulation debugging device, and after the user program code is basically completed, it also uses unit test, software test and system test, and the debugging and testing of the consistency, compatibility, matching and loading of the equipment in the field environment. The simulation debugging device is internally provided with a simulation chip containing various functions of a product processor chip and used for simulating the working behavior of the product processor chip, and the simulation chip is matched with other parts (a program memory for storing a user program, a data memory for storing data, a debugging module, a management module, an integrated development environment module on a user computer and the like) of the simulation debugging device to realize the simulation operation and various debugging functions of the user program.

In consideration of safety in use, attack resistance, stability, code design leakage prevention and the like, processor chips of many devices are provided with automatic safety detection modules and safety detection mechanisms, so that whether abnormal or artificial safety attacks exist in the aspects of ambient temperature, power supply voltage, current, clock frequency, illumination (ultraviolet) intensity and the like can be automatically detected in real time. In the user program debugging process and the field debugging process, the security check abnormity occurs in the user program code execution process, the simulation chip is triggered to enter a security check state, and the simulation chip enters a state that the security check reset can not work or the simulation chip is electrified again. At this time, because the emulation chip cannot work in cooperation with the emulation debugging device in the reset state, or power is re-supplied to destroy state information such as a PC pointer value and a security check register when security check is triggered, a user cannot acquire important state information such as the PC pointer value and the security check register when security check is triggered through the emulation debugging device, and when user program code debugging and device field debugging are performed, particularly during field debugging, various influencing factors are extremely large, a security check abnormal state is easily triggered, the triggering factors are constantly changed, and it is very difficult to stably and consistently repeatedly trigger occurring security check abnormality.

After the security check exception occurs, no matter the processor chip (emulation chip) of the device is in a reset state or a power-on state again, the user can accurately, real-timely and effectively inquire important state information such as a PC pointer value (Program Counter) and data of a security check register when the security check is triggered, timely and conveniently know which security check is triggered and information such as the security check triggered when the user Program code executes the code (PC pointer value), so that the user can timely judge and eliminate an exception trigger factor, locate a trigger reason, stably reproduce exception triggering processes and states, and further analyze and debug the user Program code.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model is to provide a emulation debugging device for debugging equipment safety inspection state, can effectively improve the debugging efficiency of user program code to and the whole debugging efficiency under the equipment site environment.

In order to solve the technical problem, the utility model discloses a emulation debugging device for debugging equipment safety inspection state, include:

the system comprises a simulation chip, a management module and a user computer; a reset module, a security check module and a PC pointer register are arranged in the simulation chip, a security check state register is arranged in the security check module, and a security check information memory is arranged in the management module;

the management module is connected with a PC pointer register in the simulation chip through a first register reading bus, connected with a security check state register in the security check module through a second register reading bus, connected with the security check module in the simulation chip through a reset trigger signal wire, and connected with a reset module in the simulation chip through a reset control signal wire; the management module is connected with a user computer through a debugging channel.

The user computer is provided with an integrated development environment module, and the management module is connected with the integrated development environment module through a debugging channel.

Because adopt the utility model discloses a simulation debugging device, after taking place the safety inspection unusual, no matter emulation chip is in the reset state or goes up the electrical status again, can both be accurate, in real time and acquire the PC pointer value when triggering the safety inspection effectively, important status information such as data of safety inspection register, and show through the debugging interface and look over for the user, convenience of customers in time judges and gets rid of unusual trigger factor, the location causes of triggering, the unusual process and state of initiating and steadily reappear, and further user program code analysis and debugging, the debugging efficiency of user program code has been improved, and the whole efficiency of debugging under the equipment site environment.

Drawings

The invention will be described in further detail with reference to the following drawings and detailed description:

fig. 1 is a schematic structural diagram of a simulation debugging apparatus for debugging the security check state of a device.

Detailed Description

As shown in fig. 1, the simulation debugging apparatus 1 for debugging the security check state of a device includes, in the following embodiments: the system comprises a simulation chip 2, a management module 3 and an integrated development environment module 4 installed on a user computer. The simulation chip 2 is internally provided with a reset module 5, a security check module 6 and a PC pointer register 8, and the security check module 6 is internally provided with a security check state register 7. A security check information memory 13 is arranged in the management module 3. The management module 3 is connected with a PC pointer register 8 in the simulation chip 2 through a first register reading bus 12, is connected with a security check state register 7 in a security check module 6 of the simulation chip 2 through a second register reading bus 11, is connected with the security check module 6 in the simulation chip 2 through a reset trigger signal line 10, and is connected with a reset module 5 in the simulation chip 2 through a reset control signal line 9. The management module 3 is connected with the integrated development environment module 4 through a debugging channel 14.

The security information storage 13 in the management module 3 is implemented as a nonvolatile memory.

The management module 3 can write data into the security check information storage 13, read data from the security check information storage 13, and send data to the integrated development environment module 4 through the debug channel 14.

When the security check reset occurs, the security check module 6 informs the management module 3 of the security check reset through the security check trigger signal line 10, the management module 3 immediately reads the data in the PC pointer register 8 through the first register reading bus 12, and reads the data in the security check status register 7 in the security check module 6 through the second register reading bus 11. After the reading is completed, the management module 3 writes the read PC pointer value and the data of the security check status register into the security check information memory 13 for storage. Since the emulation chip 2 is not yet reset at this time, the above operations can be completed normally.

Then, the management module 3 controls the reset module 5 to perform security check reset or power-on operation on the whole emulation chip 2 through the reset control signal line 9, and at this time, various registers in the emulation chip 2 are in a reset state and cannot be read, or register data are changed into power-on reset values after power-on is performed again. However, since the PC pointer value at the time of security check is generated, the security check status register data is already stored in the security check information memory 13, and the security check information memory 13 in the management module 3 is implemented as a nonvolatile memory, so that even if the debug tool system 1 is powered off, the data is not lost, the management module 3 can read out the data from the security check information memory 13 at any time, send the data to the integrated development environment module 4 through the debug channel 14, and display the PC pointer value at the time of security check and the data of the security check status register to the user on the integrated development environment module 4.

Therefore, the realized simulation debugging device tool not only truly simulates the safety check working state of a product processor chip in equipment, but also provides a relevant debugging means of the safety check state for a user, and improves the efficiency of debugging and testing work.

The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Numerous variations and modifications can be made by those skilled in the art without departing from the principles of the invention, which should also be considered as within the scope of the invention.

Claims (3)

1. A simulation debugging device for debugging the security check state of equipment is characterized by comprising:

the system comprises a simulation chip, a management module and a user computer; a reset module, a security check module and a PC pointer register are arranged in the simulation chip, a security check state register is arranged in the security check module, and a security check information memory is arranged in the management module;

the management module is connected with a PC pointer register in the simulation chip through a first register reading bus, connected with a security check state register in the security check module through a second register reading bus, connected with the security check module in the simulation chip through a reset trigger signal wire, and connected with a reset module in the simulation chip through a reset control signal wire; the management module is connected with a user computer through a debugging channel.

2. The apparatus of claim 1, wherein: the user computer is provided with an integrated development environment module, and the management module is connected with the integrated development environment module through a debugging channel.

3. The apparatus of claim 1 or 2, wherein: the security inspection information memory is a nonvolatile memory.

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