CN209929312U - Field effect transistor array based on platinum diselenide semiconductor - Google Patents
Field effect transistor array based on platinum diselenide semiconductor Download PDFInfo
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Abstract
The patent discloses a field effect transistor array based on a platinum diselenide semiconductor, which comprises the steps of firstly utilizing ion beam sputtering and plating a patterned ultra-thin platinum metal layer on a silicon substrate with an oxide layer by combining a metal mask; then placing the metal platinum layer in a high-temperature tube furnace for selenization to generate patterned platinum diselenide; and then, a metal source electrode and a metal drain electrode are prepared on the patterned platinum diselenide by utilizing a photoetching technology and combining a stripping process, so that a field effect transistor array based on the platinum diselenide semiconductor is formed, wherein a single field effect transistor can show a P-type or bipolar output characteristic along with the difference of the thickness of the platinum diselenide semiconductor film. The method can be used for developing large-scale integrated devices based on large-area two-dimensional semiconductor films, has simple process and small environmental influence, can effectively improve the electrical property and reliability of the devices, and provides an effective way for the functional application of two-dimensional material devices.
Description
Technical Field
The patent relates to an array type device based on platinum diselenide, belonging to the technical field of nano materials.
Background
Since the discovery of graphene in 2004, two-dimensional atomic crystal materials have come into the field of vision of people, and due to the exceptional characteristics of the two-dimensional atomic crystal materials in the aspects of electricity, force, heat, magnetism and the like, the research of the two-dimensional atomic crystal materials is rapidly hot. Graphene, as a first two-dimensional atomic crystal material, has ultrahigh electron mobility, high mechanical strength and high light transmittance, but due to the zero band gap characteristic, the development of the graphene in the semiconductor industry is limited; the appearance of transition metal sulfide brings a chance to the semiconductor industry, compared with graphene, the mobility of the two-dimensional material is reduced, but the two-dimensional material has a forbidden bandwidth of about 1eV, and the forbidden bandwidth of the two-dimensional material changes along with factors such as thickness, pressure and atom doping, so that the two-dimensional material has wide application in the semiconductor industry, such as a photoelectric detector, a light emitting device, a biosensor and the like.
Two-dimensional platinum diselenide materials were first prepared in 2015 [ Nano letters,15,6(2015)]. According to theoretical calculations, a single layer of 1T phase of platinum diselenide has a height of up to 4000cm2V-1s-1And its electron band can be gradually changed from semiconductor to semi-metal with increasing thickness [ Nature communication, 9,919(2018)]. Current research on platinum diselenide material growth and device preparationThe method mainly comprises two types, wherein the first type is that few layers of platinum diselenide are stripped from a blocky platinum diselenide material by a mechanical stripping method, the material prepared by the method has high quality and excellent electrical property, and the mobility can reach 200cm2V-1s-1The above [ Advanced Materials,29,5(2017)]But is limited to size and is only suitable for basic research; the second type is to prepare a large-area platinum diselenide film by using a chemical vapor deposition method, but the quality of the currently prepared platinum diselenide film is poor, and an electrical device prepared based on the platinum diselenide film is lack of regulation and control and needs to act together with other materials, so that the electrical characteristics of the platinum diselenide film are covered to a certain extent. Based on the above analysis, in view of the excellent electrical capability of the platinum diselenide material and the application requirement thereof in the semiconductor industry, there is an urgent need for a method for preparing large-area platinum diselenide with excellent electrical properties and preparing a corresponding electrical device for application.
Disclosure of Invention
In order to solve the problems, the patent provides a field effect tube array based on a platinum diselenide semiconductor, and the method comprehensively utilizes a dual ion beam sputtering technology, a chemical vapor deposition technology and a field effect tube device preparation process, and can prepare a high-quality platinum diselenide film and an array type device based on the film.
The method comprises the steps of firstly preparing a patterned platinum layer by using a metal mask, and then reacting platinum and selenium at a high temperature to generate platinum diselenide, wherein the thickness of the platinum diselenide can be accurately controlled by the thickness of the platinum layer. In the preparation process, the defects of the platinum diselenide are greatly reduced in the processes of high-temperature crystallization, recrystallization and annealing, the crystal domain of the platinum diselenide is enlarged, and the quality of the platinum diselenide film is improved, so that the platinum diselenide semiconductor film with large area and excellent electrical properties is prepared. Moreover, the device preparation process of the method can be directly carried out on the patterned platinum diselenide film, processes such as etching and transferring materials are not needed, the influence of external environmental factors on the materials and the device performance is avoided, and the yield and the performance of the device are guaranteed. The field effect tube prepared by the method can also show a P-type or bipolar output characteristic according to different thicknesses of the platinum diselenide, wherein the field effect tube shows the P-type output characteristic when the platinum diselenide thin film is thicker, and the field effect tube shows the bipolar output characteristic when the thin film is thinner.
The patent relates to a field effect transistor array based on a platinum diselenide semiconductor and a preparation method thereof, and is characterized in that the device sequentially comprises the following components from top to bottom:
a gold layer 1, a titanium layer 2, platinum diselenide 3, an oxide layer 4 and a substrate 5,
wherein the gold layer 1 is a gold electrode with the thickness of 45 nanometers;
wherein the titanium layer 2 is a contact metal with a thickness of 15 nm;
wherein the platinum diselenide 3 is a patterned platinum diselenide semiconductor thin film, and the thickness of the platinum diselenide semiconductor thin film is 1.6-4.7 nanometers;
wherein the oxide layer 4 is silicon dioxide with the thickness of 285 nanometers;
wherein the substrate 5 is a heavily doped silicon substrate.
The patent relates to a field effect transistor array based on a platinum diselenide semiconductor and a preparation method thereof, and is characterized in that the preparation of an array type device comprises the following steps:
1) the source electrode and the drain electrode of the field effect device are prepared by utilizing an ultraviolet lithography technology and combining a thermal evaporation and stripping process, and the contact metal of the electrode is titanium, so that the platinum diselenide semiconductor thin film field effect tube array with a back gate structure is formed.
2) The channel length of a single field effect device is 5-12 microns and the width is 100-180 microns.
The patent relates to a field effect transistor array based on a platinum diselenide semiconductor and a preparation method thereof, and is characterized in that the preparation of the platinum diselenide semiconductor film comprises the following steps:
1) sputtering a patterned metal platinum layer on the oxide layer by using a metal mask plate and combining an ion beam sputtering method, wherein the thickness of the patterned metal platinum layer is 1.1-2.5 nanometers;
2) the substrate sputtered with platinum is reversely buckled on the selenium powder in the ceramic boat, and a certain distance is reserved between the platinum and the selenium powder;
3) the ceramic boat is heated along with the tube furnace, the tube furnace is heated to 650 ℃ within 60 minutes and is kept for 10 minutes;
4) rapidly pulling the ceramic boat out of the heating area and cooling to normal temperature;
5) heating the ceramic boat to 250 ℃ again and keeping the temperature for 20 minutes;
6) and after finishing, rapidly pulling the ceramic boat out of the heating area again and cooling to normal temperature to obtain the patterned platinum diselenide semiconductor film with the thickness of 1.6-4.6 nanometers.
The advantage of this patent lies in: the patent discloses a technology for preparing a patterned platinum diselenide semiconductor film by using a metal mask, and a field effect tube array of a platinum diselenide semiconductor is prepared on the basis of the technology, so that the transfer and etching processes in the device preparation process are reduced, and the integration of material growth and device preparation is realized. Meanwhile, the field effect tube prepared by the method can also show a P-type or bipolar output characteristic according to the difference of the thicknesses of the platinum diselenide films, and an effective way is provided for the functional application of a two-dimensional platinum diselenide material.
Drawings
Fig. 1 is a schematic cross-sectional view of a prepared field effect tube array based on a platinum diselenide semiconductor thin film. In the figure: 1 gold layer, 2 titanium layer, 3 platinum diselenide, 4 oxide layer and 5 substrates.
Fig. 2 is a graph of the output characteristics of a platinum diselenide semiconductor fet based on a 1.6 nm thickness.
Fig. 3 is a graph of the output characteristics of a platinum diselenide semiconductor fet based on a thickness of 4.1 nm.
Fig. 4 is a graph of the output characteristics of a platinum diselenide field semiconductor effect tube based on a thickness of 4.7 nanometers.
Detailed Description
The technical scheme of the patent is explained in detail by combining specific embodiments.
Example 1
1) Plating a patterned platinum metal layer with the thickness of 1.1 nm on the oxide layer by using a metal mask plate and combining an ion beam sputtering method;
2) weighing 500 mg of selenium powder, placing the selenium powder in a ceramic boat, and reversely covering the platinum metal layer in the step 1 on the selenium powder in the ceramic boat, wherein a certain distance is kept between platinum and the selenium powder;
3) placing the ceramic boat in a quartz tube, vacuumizing the quartz tube to below 25 mTorr, introducing nitrogen to one atmosphere, repeatedly vacuumizing and introducing nitrogen for three times, removing air in the quartz tube, adjusting a needle valve to maintain the pressure in the tube at 750 Torr, and keeping the nitrogen flow rate at 50 standard milliliters per minute;
4) heating the ceramic boat and the tube furnace simultaneously, heating from normal temperature to 100 ℃ within 10 minutes, keeping for 10 minutes, heating the tube furnace to 650 ℃ within 60 minutes, and keeping for 10 minutes;
5) after finishing, rapidly pulling the ceramic boat in the step 4 out of the heating area, cooling to normal temperature for 20 minutes, and simultaneously cooling the temperature of the tube furnace to 250 ℃;
6) and (3) feeding the ceramic boat in the step (5) into a heating area to heat for 20 minutes, quickly pulling the ceramic boat out of the heating area after the heating is finished, naturally cooling to normal temperature, and taking out a sample to obtain patterned platinum diselenide with the thickness of 1.6 nanometers.
7) And (3) preparing a metal electrode on the platinum diselenide in the step (6) by utilizing an ultraviolet lithography technology and combining a dual ion beam sputtering technology and a stripping technology, wherein the lower layer contact electrode is 15 nanometers of titanium, and the upper layer electrode is 45 nanometers of gold, so that a platinum diselenide semiconductor field effect device array with a back gate structure is formed, the length of a single channel is 5 micrometers, and the width of the single channel is 100 micrometers.
8) An electrical test shows that the platinum diselenide field effect device prepared in the step 7 has bipolar output characteristics, and the performance test result is shown in fig. 2.
Example 2
1) Plating a patterned platinum metal layer with the thickness of 2 nanometers on the oxide layer by utilizing a metal mask plate and combining an ion beam sputtering method;
2) weighing 500 mg of selenium powder, placing the selenium powder in a ceramic boat, and reversely covering the platinum metal layer in the step 1 on the selenium powder in the ceramic boat, wherein a certain distance is kept between platinum and the selenium powder;
3) placing the ceramic boat in a quartz tube, vacuumizing the quartz tube to below 25 mTorr, introducing nitrogen to one atmosphere, repeatedly vacuumizing and introducing nitrogen for three times, removing air in the quartz tube, adjusting a needle valve to maintain the pressure in the tube at 750 Torr, and keeping the nitrogen flow rate at 50 standard milliliters per minute;
4) heating the ceramic boat and the tube furnace simultaneously, heating from normal temperature to 100 ℃ within 10 minutes, keeping for 10 minutes, heating the tube furnace to 650 ℃ within 60 minutes, and keeping for 10 minutes;
5) after finishing, rapidly pulling the ceramic boat in the step 4 out of the heating area, cooling to normal temperature for 20 minutes, and simultaneously cooling the temperature of the tube furnace to 250 ℃;
6) and (3) feeding the ceramic boat in the step (5) into a heating area to heat for 20 minutes, quickly pulling the ceramic boat out of the heating area after the heating is finished, naturally cooling to normal temperature, and taking out a sample to obtain patterned platinum diselenide with the thickness of 4.1 nanometers.
7) And (3) preparing a metal electrode on the platinum diselenide in the step (6) by utilizing an ultraviolet lithography technology and combining a dual ion beam sputtering technology and a stripping technology, wherein the lower layer contact electrode is 15 nanometers of titanium, and the upper layer electrode is 45 nanometers of gold, so that a platinum diselenide semiconductor field effect device array with a back gate structure is formed, the length of a single channel is 8 micrometers, and the width of the single channel is 150 micrometers.
8) The electrical test shows that the platinum diselenide field effect device prepared in the step 7 has a P-type output characteristic, and the performance test result is shown in fig. 3.
Example 3
1) Plating a patterned platinum metal layer with the thickness of 2.5 nanometers on the oxide layer by utilizing a metal mask and combining an ion beam sputtering method;
2) weighing 500 mg of selenium powder, placing the selenium powder in a ceramic boat, and reversely covering the platinum metal layer in the step 1 on the selenium powder in the ceramic boat, wherein a certain distance is kept between platinum and the selenium powder;
3) placing the ceramic boat in a quartz tube, vacuumizing the quartz tube to below 25 mTorr, introducing nitrogen to one atmosphere, repeatedly vacuumizing and introducing nitrogen for three times, removing air in the quartz tube, adjusting a needle valve to maintain the pressure in the tube at 750 Torr, and keeping the nitrogen flow rate at 50 standard milliliters per minute;
4) heating the ceramic boat and the tube furnace simultaneously, heating from normal temperature to 100 ℃ within 10 minutes, keeping for 10 minutes, heating the tube furnace to 650 ℃ within 60 minutes, and keeping for 10 minutes;
5) after finishing, rapidly pulling the ceramic boat in the step 4 out of the heating area, cooling to normal temperature for 20 minutes, and simultaneously cooling the temperature of the tube furnace to 250 ℃;
6) and (3) feeding the ceramic boat in the step (5) into a heating area to heat for 20 minutes, quickly pulling the ceramic boat out of the heating area after the heating is finished, naturally cooling to normal temperature, and taking out a sample to obtain patterned platinum diselenide with the thickness of 4.7 nanometers.
7) And (3) preparing a metal electrode on the platinum diselenide in the step (6) by utilizing an ultraviolet lithography technology and combining a dual ion beam sputtering technology and a stripping technology, wherein the lower layer contact electrode is 15 nanometers of titanium, and the upper layer electrode is 45 nanometers of gold, so that a platinum diselenide semiconductor field effect device array with a back gate structure is formed, the length of a single channel is 12 micrometers, and the width of the single channel is 180 micrometers.
8) The electrical test shows that the platinum diselenide field effect device prepared in the step 7 has a P-type output characteristic, and the performance test result is shown in fig. 4.
Claims (1)
1. A field effect transistor array based on platinum diselenide semiconductor comprises a gold layer (1), a titanium layer (2), platinum diselenide (3), an oxide layer (4) and a substrate (5), and is characterized in that,
the field effect tube sequentially comprises the following structures from top to bottom: gold layer (1), titanium layer (2), platinum diselenide (3), oxide layer (4), substrate (5), wherein:
the gold layer (1) is a gold electrode with the thickness of 45 nanometers;
the titanium layer (2) is contact metal with the thickness of 15 nanometers;
the platinum diselenide (3) is a patterned platinum diselenide semiconductor thin film, and the thickness of the platinum diselenide semiconductor thin film is 1.6-4.7 nanometers;
the oxide layer (4) is silicon dioxide and is 285 nanometers thick;
the substrate (5) is a heavily doped silicon substrate.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110212025A (en) * | 2019-05-17 | 2019-09-06 | 中国科学院上海技术物理研究所 | A kind of field-effect tube array and preparation method based on two selenizing platinum semiconductors |
| CN111048621A (en) * | 2020-01-13 | 2020-04-21 | 重庆理工大学 | Photoelectric detector based on graphene/platinum diselenide/silicon composite heterojunction and preparation method thereof |
| CN114672767A (en) * | 2022-04-14 | 2022-06-28 | 南京大学 | Chemical vapor deposition preparation method of large-size platinum ditelluride |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110212025A (en) * | 2019-05-17 | 2019-09-06 | 中国科学院上海技术物理研究所 | A kind of field-effect tube array and preparation method based on two selenizing platinum semiconductors |
| CN111048621A (en) * | 2020-01-13 | 2020-04-21 | 重庆理工大学 | Photoelectric detector based on graphene/platinum diselenide/silicon composite heterojunction and preparation method thereof |
| CN114672767A (en) * | 2022-04-14 | 2022-06-28 | 南京大学 | Chemical vapor deposition preparation method of large-size platinum ditelluride |
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