CN209929312U - Field effect transistor array based on platinum diselenide semiconductor - Google Patents

Abstract

The patent discloses a field effect transistor array based on a platinum diselenide semiconductor, which comprises the steps of firstly utilizing ion beam sputtering and plating a patterned ultra-thin platinum metal layer on a silicon substrate with an oxide layer by combining a metal mask; then placing the metal platinum layer in a high-temperature tube furnace for selenization to generate patterned platinum diselenide; and then, a metal source electrode and a metal drain electrode are prepared on the patterned platinum diselenide by utilizing a photoetching technology and combining a stripping process, so that a field effect transistor array based on the platinum diselenide semiconductor is formed, wherein a single field effect transistor can show a P-type or bipolar output characteristic along with the difference of the thickness of the platinum diselenide semiconductor film. The method can be used for developing large-scale integrated devices based on large-area two-dimensional semiconductor films, has simple process and small environmental influence, can effectively improve the electrical property and reliability of the devices, and provides an effective way for the functional application of two-dimensional material devices.

Description

A field effect transistor array based on platinum diselenide semiconductor

technical field

The patent relates to an array type device based on platinum diselenide, which belongs to the technical field of nanomaterials.

Background technique

Since the discovery of graphene in 2004, two-dimensional atomic crystal materials have begun to enter people's field of vision, and because of their exotic properties in electricity, force, heat, and magnetism, it has quickly caused a research boom in two-dimensional atomic crystal materials. As the first two-dimensional atomic crystal material, graphene has ultra-high electron mobility, high mechanical strength, and high light transmittance, but due to its zero band gap feature, its development in the semiconductor industry is limited; Then the emergence of transition metal sulfides brought an opportunity to the semiconductor industry. Compared with graphene, the mobility of such materials is reduced, but they have a band gap of about 1eV, and the band gap varies with thickness, Factors such as pressure and atomic doping have changed, so these two-dimensional materials have a wide range of applications in the semiconductor industry, such as photodetectors, light-emitting devices, and biosensors.

Two-dimensional platinum diselenide materials were first prepared in 2015 [Nano letters, 15, 6 (2015)]. According to theoretical calculations, the monolayer 1T phase of platinum diselenide has a mobility as high as 4000 cm ² V ^-1 s ^-1 , and its electronic energy band can gradually change from semiconductor to semimetal with increasing thickness [Nature Communicatio, 9,919 (2018)]. At present, the research on the growth of platinum diselenide materials and device preparation is mainly divided into two categories. The first type is to use mechanical peeling method to peel off a few layers of platinum diselenide from bulk platinum diselenide materials. This method The prepared materials are of high quality and have excellent electrical properties, and the mobility can reach more than 200 cm ² V ^-1 s ^-1 [Advanced Materials, 29, 5 (2017)], but it is limited in size and only suitable for basic research; the second category Large-area platinum diselenide thin films are prepared by chemical vapor deposition, but the quality of platinum diselenide thin films prepared at present is poor, and the electrical devices prepared based on such platinum diselenide lack control and must be combined with other materials. To a certain extent, the electrical properties of platinum diselenide are masked. Based on the above analysis, in view of the excellent electrical ability of platinum diselenide material and its application requirements in the semiconductor industry, there is an urgent need for a method to prepare large-area platinum diselenide with excellent electrical properties, and to prepare the corresponding electrical device for the application.

SUMMARY OF THE INVENTION

In order to solve the above problems, this patent proposes a field effect transistor array based on platinum diselenide semiconductor. Quality platinum diselenide thin films and array devices based on the thin films.

The method first uses a metal mask to prepare a patterned platinum layer, and then reacts platinum and selenium at a high temperature to generate platinum diselenide, and the thickness of the platinum diselenide can be precisely controlled by the thickness of the platinum layer. In the preparation process, the high-temperature crystallization, recrystallization and annealing process greatly reduces the defects of platinum diselenide, increases the crystal domain of platinum diselenide, and improves the quality of platinum diselenide thin films, thereby preparing large-area and Platinum diselenide semiconductor thin film with excellent electrical properties. Moreover, the device preparation process of the method can be directly performed on the patterned platinum diselenide film, without the need for etching, transfer and other processes of the material, avoiding the influence of external environmental factors on the performance of the material and the device, and ensuring the device yield and performance. The FET prepared by this patent can also show P-type or bipolar output characteristics according to the thickness of platinum diselenide. When the platinum diselenide film is thicker, the FET shows P-type output characteristics, and the film is thicker. Thin-time FETs exhibit bipolar output characteristics.

The present patent relates to a field effect transistor array based on platinum diselenide semiconductor and a preparation method, characterized in that the devices sequentially include:

Gold layer 1, titanium layer 2, platinum diselenide 3, oxide layer 4, substrate 5,

The gold layer 1 is a gold electrode with a thickness of 45 nanometers;

Wherein the titanium layer 2 is a contact metal with a thickness of 15 nanometers;

Wherein platinum diselenide 3 is a patterned platinum diselenide semiconductor thin film, and its thickness is 1.6-4.7 nanometers;

Wherein the oxide layer 4 is silicon dioxide with a thickness of 285 nanometers;

The substrate 5 is a heavily doped silicon substrate.

This patent is a field effect transistor array based on platinum diselenide semiconductor and a preparation method, characterized in that the preparation of the array type device includes:

1) Using ultraviolet lithography technology, combined with thermal evaporation and stripping process to prepare the source and drain of the field effect device, the contact metal of the electrode is titanium, so as to form a platinum diselenide semiconductor thin film field effect transistor array with a back gate structure.

2) The channel length of a single field effect device is 5-12 microns and the width is 100-180 microns.

The present patent relates to a field effect transistor array based on platinum diselenide semiconductor and a preparation method, characterized in that the preparation of the platinum diselenide semiconductor thin film comprises the following steps:

1) Using a metal mask, combined with the method of ion beam sputtering, sputter a patterned metal platinum layer on the oxide layer with a thickness of 1.1-2.5 nanometers;

2) Upside down the substrate sputtered with platinum on the selenium powder in the ceramic boat, leaving a certain distance between the platinum and the selenium powder;

3) The ceramic boat heats up with the tube furnace, heats the tube furnace to 650 degrees within 60 minutes, and keeps it for 10 minutes;

4) Quickly pull the ceramic boat out of the heating area and lower it to normal temperature;

5) Heat the ceramic boat to 250 degrees again and keep it for 20 minutes;

6) After the end, the ceramic boat is quickly pulled out of the heating area again and lowered to normal temperature to obtain a patterned platinum diselenide semiconductor thin film with a thickness of 1.6 to 4.6 nanometers.

The advantages of this patent are: the technology of preparing patterned platinum diselenide semiconductor thin film by using metal mask is patented, and based on this, the field effect transistor array of platinum diselenide semiconductor is prepared, which reduces the transfer and etching in the device preparation process. The etching process realizes the integration of material growth and device preparation. At the same time, the FET prepared by this patent can also exhibit P-type or bipolar output characteristics according to the thickness of the platinum diselenide film, which provides an effective way for the functional application of the two-dimensional platinum diselenide material.

Description of drawings

FIG. 1 is a schematic cross-sectional view of the prepared FET array based on a platinum diselenide semiconductor thin film. In the figure: 1 gold layer, 2 titanium layer, 3 platinum diselenide, 4 oxide layer, 5 substrate.

Figure 2 shows the output characteristics of a platinum diselenide semiconductor field effect transistor based on a thickness of 1.6 nanometers.

Figure 3 shows the output characteristics of a platinum diselenide semiconductor field effect transistor based on a thickness of 4.1 nanometers.

Figure 4 shows the output characteristics of a platinum diselenide field effect transistor based on a thickness of 4.7 nanometers.

Detailed ways

The technical solution of the patent will be described in detail below with reference to specific embodiments.

Example 1

1) A 1.1-nanometer-thick patterned platinum metal layer is coated on the oxide layer by using a metal mask and combined with ion beam sputtering;

2) Weigh 500 mg of selenium powder, place it in a ceramic boat, and buckle the platinum metal layer in step 1 upside down on the selenium powder in the ceramic boat, keeping a certain distance between the platinum and the selenium powder;

3) The ceramic boat is placed in the quartz tube, the quartz tube is evacuated to below 25 mtorr, the nitrogen gas is introduced to an atmospheric pressure, the vacuuming and nitrogen filling are repeated three times, the air in the quartz tube is removed, and the needle valve is adjusted to keep the pressure in the tube at 750 Torr, keeping the nitrogen flow rate at 50 standard milliliters per minute;

4) The ceramic boat and the tube furnace are heated at the same time, from normal temperature to 100 degrees within 10 minutes, and kept for 10 minutes, and then the tube furnace is heated to 650 degrees within 60 minutes, and kept for 10 minutes;

5) After finishing, the ceramic boat in step 4 was pulled out of the heating area quickly, and it was lowered to normal temperature in 20 minutes, and the temperature of the tube furnace was lowered to 250 degrees simultaneously;

6) The ceramic boat in step 5 is sent into the heating area for heating for 20 minutes. After the end, the ceramic boat is quickly pulled out of the heating area and naturally cooled to room temperature, and the sample is taken out to obtain a patterned platinum diselenide with a thickness of 1.6 nanometers.

7) Using ultraviolet lithography technology, combined with double ion beam sputtering and lift-off technology to prepare metal electrodes on platinum diselenide in step 6, wherein the lower contact electrode is 15nm titanium, and the upper layer electrode is 45nm gold, thereby forming An array of platinum diselenide semiconductor field effect devices with a back-gate structure has a single channel with a length of 5 microns and a width of 100 microns.

8) The electrical test shows that the platinum diselenide field effect device prepared in step 7 has bipolar output characteristics, and the performance test result is shown in FIG. 2 .

Example 2

1) Using a metal mask, combined with the method of ion beam sputtering, a 2-nanometer-thick patterned platinum metal layer is coated on the oxide layer;

2) Weigh 500 mg of selenium powder, place it in a ceramic boat, and buckle the platinum metal layer in step 1 upside down on the selenium powder in the ceramic boat, keeping a certain distance between the platinum and the selenium powder;

3) The ceramic boat is placed in the quartz tube, the quartz tube is evacuated to below 25 mtorr, the nitrogen gas is introduced to an atmospheric pressure, the vacuuming and nitrogen filling are repeated three times, the air in the quartz tube is removed, and the needle valve is adjusted to keep the pressure in the tube at 750 Torr, keeping the nitrogen flow rate at 50 standard milliliters per minute;

4) The ceramic boat and the tube furnace are heated at the same time, from normal temperature to 100 degrees within 10 minutes, and kept for 10 minutes, and then the tube furnace is heated to 650 degrees within 60 minutes, and kept for 10 minutes;

5) After finishing, the ceramic boat in step 4 was pulled out of the heating area quickly, and it was lowered to normal temperature in 20 minutes, and the temperature of the tube furnace was lowered to 250 degrees simultaneously;

6) The ceramic boat in step 5 is sent to the heating area for heating for 20 minutes. After the end, the ceramic boat is quickly pulled out of the heating area and naturally lowered to normal temperature, and the sample is taken out to obtain a patterned platinum diselenide with a thickness of 4.1 nanometers.

7) Using ultraviolet lithography technology, combined with double ion beam sputtering and lift-off technology to prepare metal electrodes on platinum diselenide in step 6, wherein the lower contact electrode is 15nm titanium, and the upper layer electrode is 45nm gold, thereby forming An array of platinum diselenide semiconductor field effect devices with a back-gate structure has a single channel with a length of 8 microns and a width of 150 microns.

8) The electrical test shows that the platinum diselenide field effect device prepared in step 7 has a P-type output characteristic, and the performance test result is shown in FIG. 3 .

Example 3

1) A 2.5-nanometer-thick patterned platinum metal layer is coated on the oxide layer by using a metal mask and combined with ion beam sputtering;

2) Weigh 500 mg of selenium powder, place it in a ceramic boat, and buckle the platinum metal layer in step 1 upside down on the selenium powder in the ceramic boat, keeping a certain distance between the platinum and the selenium powder;

3) The ceramic boat is placed in the quartz tube, the quartz tube is evacuated to below 25 mtorr, the nitrogen gas is introduced to an atmospheric pressure, the vacuuming and nitrogen filling are repeated three times, the air in the quartz tube is removed, and the needle valve is adjusted to keep the pressure in the tube at 750 Torr, keeping the nitrogen flow rate at 50 standard milliliters per minute;

4) The ceramic boat and the tube furnace are heated at the same time, from normal temperature to 100 degrees within 10 minutes, and kept for 10 minutes, and then the tube furnace is heated to 650 degrees within 60 minutes, and kept for 10 minutes;

5) After finishing, the ceramic boat in step 4 was pulled out of the heating area quickly, and it was lowered to normal temperature in 20 minutes, and the temperature of the tube furnace was lowered to 250 degrees simultaneously;

6) The ceramic boat in step 5 is sent to the heating area for heating for 20 minutes. After the end, the ceramic boat is quickly pulled out of the heating area and naturally lowered to normal temperature, and the sample is taken out to obtain a patterned platinum diselenide with a thickness of 4.7 nanometers.

7) Using ultraviolet lithography technology, combined with double ion beam sputtering and lift-off technology to prepare metal electrodes on platinum diselenide in step 6, wherein the lower contact electrode is 15nm titanium, and the upper layer electrode is 45nm gold, thereby forming An array of platinum diselenide semiconductor field effect devices with a back-gate structure has a single channel with a length of 12 microns and a width of 180 microns.

8) The electrical test shows that the platinum diselenide field effect device prepared in step 7 has a P-type output characteristic, and the performance test result is shown in FIG. 4 .

Claims (1)

1. A field effect transistor array based on platinum diselenide semiconductor comprises a gold layer (1), a titanium layer (2), platinum diselenide (3), an oxide layer (4) and a substrate (5), and is characterized in that,

the field effect tube sequentially comprises the following structures from top to bottom: gold layer (1), titanium layer (2), platinum diselenide (3), oxide layer (4), substrate (5), wherein:

the gold layer (1) is a gold electrode with the thickness of 45 nanometers;

the titanium layer (2) is contact metal with the thickness of 15 nanometers;

the platinum diselenide (3) is a patterned platinum diselenide semiconductor thin film, and the thickness of the platinum diselenide semiconductor thin film is 1.6-4.7 nanometers;

the oxide layer (4) is silicon dioxide and is 285 nanometers thick;

the substrate (5) is a heavily doped silicon substrate.

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