CN209913787U - Addition circuit for reducing absolute value difference of positive and negative output voltages - Google Patents
Addition circuit for reducing absolute value difference of positive and negative output voltages Download PDFInfo
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- CN209913787U CN209913787U CN201920621321.1U CN201920621321U CN209913787U CN 209913787 U CN209913787 U CN 209913787U CN 201920621321 U CN201920621321 U CN 201920621321U CN 209913787 U CN209913787 U CN 209913787U
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Abstract
The utility model provides a reduce addition circuit that positive and negative output voltage absolute value is poor, the addition circuit that reduces positive and negative output voltage absolute value is poor includes amplifier circuit, positive output power supply feedback circuit and negative output power supply feedback circuit, amplifier circuit includes sampling resistance R3, resistance R6 and operational amplifier U3, resistance R3 samples the positive output power supply voltage that positive output power supply feedback circuit feedbacks back, resistance R6 samples the negative output power supply voltage that negative output power supply feedback circuit feedbacks back, when positive and negative output power supply absolute value is equal, thereby operational amplifier U3 is out of work and makes positive and negative power supply output voltage absolute value keep equal, when positive output voltage absolute value is higher than negative output voltage absolute value or positive output voltage absolute value is lower than negative output voltage absolute value, operational amplifier U3 works, the operational amplifier U3 works to keep the absolute values of the positive and negative power supply output voltages equal.
Description
Technical Field
The utility model relates to a circuit field especially relates to a reduce addition circuit of positive negative output voltage absolute value difference.
Background
In the circuit field, because two positive and negative output power supplies are sometimes needed, and some fields require that the absolute value difference of the positive and negative output power supplies is very small, and the output currents of the two positive and negative power supplies are different, a balanced load power supply scheme cannot be used, and only two independent power supplies can be used. The two independent power supplies need two independent feedback loops, each feedback loop needs an independent reference, each reference always has a certain difference, and the temperature drift of each reference has a certain difference, so that the absolute values of the output voltages of the two independent power supplies have some differences, the absolute values of the output voltages of the two independent power supplies can be kept equal at normal temperature by trimming the sampling resistor, but the absolute values of the two independent power supplies can not be guaranteed to be equal at high and low temperatures due to the difference of the temperature drifts.
SUMMERY OF THE UTILITY MODEL
In order to solve the problem, the utility model provides a reduce addition circuit of positive negative output voltage absolute value difference.
The utility model discloses a following technical scheme realizes:
the utility model provides a reduce addition circuit that positive and negative output voltage absolute value is poor, the addition circuit that reduces positive and negative output voltage absolute value is poor includes amplifier circuit, positive output power supply feedback circuit and negative output power supply feedback circuit, amplifier circuit includes sampling resistance R3, resistance R6 and operational amplifier U3, resistance R3 samples the positive output power supply voltage that positive output power supply feedback circuit feedbacks back, resistance R6 samples the negative output power supply voltage that negative output power supply feedback circuit feedbacks back, when positive and negative output power supply absolute value is equal, thereby operational amplifier U3 is out of work and makes positive and negative power supply output voltage absolute value keep equal, when positive output voltage absolute value is higher than negative output voltage absolute value or positive output voltage absolute value is lower than negative output voltage absolute value, operational amplifier U3 works, the operational amplifier U3 works to keep the absolute values of the positive and negative power supply output voltages equal.
Further, the amplifying circuit further includes a resistor R10, a capacitor C3, a capacitor C4, and a capacitor C7, where the resistor R10 is a matching resistor, the capacitor C3 is a power supply decoupling capacitor for the operational amplifier U3, the capacitor C4 is an input positive decoupling capacitor for the operational amplifier U3, the capacitor C7 is a feedback capacitor for the operational amplifier U3, one end of the resistor R3 is connected to the positive output power supply feedback circuit, the other end of the resistor R3 is connected to the pin 3 of the operational amplifier U3, one end of the resistor R6 is connected to the negative output power supply feedback circuit, the other end of the resistor R6 is connected to the pin 3 of the operational amplifier U3, one end of the capacitor C3 is connected to the resistor R3, and the other end of the capacitor C3 is connected to the resistor R6.
Further, the positive output power supply feedback circuit comprises a resistor R1, a resistor R2, a resistor R4, a resistor R5, a capacitor C1, a capacitor C2, an optical coupler U1 and a reference chip U2, wherein the capacitor C2 is an output capacitor of the positive output power supply, a pin 1 of the reference chip U2 is connected with the optical coupler U1, a pin 3 of the reference chip U2 is connected with the resistor R5, and the resistor R4 and the resistor R2 are both connected with a pin 2 of the reference chip U2.
Further, the negative output power feedback circuit comprises a resistor R7, a resistor R8, a resistor R9, a capacitor C5, a capacitor C6, an optical coupler U4 and a reference chip U5, the capacitor C5 is an output capacitor of the positive output power, a pin 1 of the reference chip U5 is connected with the optical coupler U4, a pin 3 of the reference chip U5 is connected with one end of the resistor R9, and the other end of the resistor R9 and the resistor R8 are both connected with a pin 2 of the reference chip U2.
The utility model has the advantages that:
the utility model provides a reduce addition circuit of positive negative output voltage absolute value difference uses a simple addition circuit just can reduce the difference of positive negative output voltage's absolute value, and is with low costs, and the effect is good.
Drawings
Fig. 1 is a circuit diagram of the adder circuit for reducing the absolute value difference between the positive and negative output voltages according to the present invention.
Detailed Description
For a more clear and complete description of the technical solution of the present invention, the following description is made with reference to the accompanying drawings.
Referring to fig. 1, the present invention provides an adding circuit for reducing the absolute value difference of positive and negative output voltages, the adding circuit for reducing the absolute value difference of positive and negative output voltages includes an amplifying circuit 1, a positive output power feedback circuit 3 and a negative output power feedback circuit 2, the amplifying circuit 1 includes a sampling resistor R3, a resistor R6 and an operational amplifier U3, the resistor R3 samples the positive output power voltage fed back by the positive output power feedback circuit 3, the resistor R6 samples the negative output power voltage fed back by the negative output power feedback circuit 2, when the absolute values of the positive and negative output power are equal, the operational amplifier U3 does not work to keep the absolute values of the positive and negative output voltages equal, when the absolute value of the positive output voltage is higher than the absolute value of the negative output voltage or the absolute value of the positive output voltage is lower than the absolute value of the negative output voltage, the operational amplifier U3 operates, and the operational amplifier U3 operates to keep the absolute values of the positive and negative power supply output voltages equal. The amplifying circuit 1 further includes a resistor R10, a capacitor C3, a capacitor C4, and a capacitor C7, wherein the resistor R10 is a matching resistor, the capacitor C3 is a power supply decoupling capacitor of the operational amplifier U3, the capacitor C4 is an input positive decoupling capacitor of the operational amplifier U3, the capacitor C7 is a feedback capacitor of the operational amplifier U3, one end of the resistor R3 is connected to the positive output power supply feedback circuit 3, the other end of the resistor R3 is connected to the pin 3 of the operational amplifier U3, one end of the resistor R6 is connected to the negative output power supply feedback circuit 2, the other end of the resistor R6 is connected to the pin 3 of the operational amplifier U3, one end of the capacitor C3 is connected to the resistor R3, and the other end of the capacitor C3 is connected to the resistor R6. The positive output power supply feedback circuit 3 comprises a resistor R1, a resistor R2, a resistor R4, a resistor R5, a capacitor C1, a capacitor C2, an optical coupler U1 and a reference chip U2, wherein the capacitor C2 is an output capacitor of a positive output power supply, a pin 1 of the reference chip U2 is connected with the optical coupler U1, a pin 3 of the reference chip U2 is connected with the resistor R5, and the resistor R4 and the resistor R2 are connected with a pin 2 of the reference chip U2. Negative output power supply feedback circuit 2 includes resistance R7, resistance R8, resistance R9, electric capacity C5, electric capacity C6, opto-coupler U4, benchmark chip U5, electric capacity C5 is the output capacitance of positive output power supply, benchmark chip U5's 1 foot with opto-coupler U4 is connected, benchmark chip U5's 3 foot with the one end of resistance R9 is connected, the other end of resistance R9 with resistance R8 all with 2 feet of benchmark chip U2 are connected.
In this embodiment, the positive and negative output voltages are added and compared to ground, and the positive output power is adjusted so that its output voltage is closer to the negative output power voltage, thereby reducing the difference between the absolute values of the two output power sources. Because the negative input terminal of the operational amplifier U3 is grounded through the matching resistor R10, the operational amplifier U3 is connected to the positive input terminal of the operational amplifier U3 through the sampling resistors R3 and R6, when the absolute values of the positive and negative power supply output voltages are equal, the voltage sampled by the positive input terminal of the operational amplifier U3 is 0V, and because the negative input terminal of the operational amplifier U3 is also 0V, the operational amplifier U3 does not act at this time, and the absolute values of the positive and negative power supply output voltages are kept equal.
When the absolute value of the positive output voltage is higher than that of the negative output voltage, the voltage divided to the positive input end of the operational amplifier U3 by the sampling resistors R3 and R6 is more than 0V, since the negative terminal voltage of the operational amplifier U3 is 0V, the operational amplifier U3 outputs a high voltage and adds the high voltage to the resistor R5, since the voltage of the resistor R5 and the resistor R4 form the reference voltage of the positive output power supply, and since the voltage of the resistor R5 is high, the feedback circuit adjusts and reduces the voltage of the positive output power supply in order to maintain the stability of the reference voltage, since the resistors R2, R4 and R5 are sampling resistors of the positive output power supply, the voltage drop of the resistor R4 is reduced due to the reduction of the output voltage of the positive output power supply, thereby maintaining the stability of the reference voltage, and therefore when the absolute value of the positive output voltage is higher than that of the negative output voltage, the op-amp ensures that the absolute values of the positive and negative power supply output voltages remain equal by boosting the R5 voltage.
When the absolute value of the positive output voltage is lower than that of the negative output voltage, the voltage divided to the positive input end of the operational amplifier U3 by the sampling resistors R3 and R6 is less than 0V, since the negative terminal voltage of the operational amplifier U3 is 0V, the operational amplifier U3 outputs a low level and adds to the resistor R5, since the voltage of the resistors R5 and R4 form the reference voltage of the positive output power supply, and since the voltage of the resistor R5 is low, the feedback circuit adjusts and raises the voltage of the positive output power supply in order to maintain the reference voltage stable, since the resistors R2, R4 and R5 are sampling resistors of the positive output power supply, the voltage drop divided by the resistor R4 is increased due to the increase of the output voltage of the positive output power supply, thereby maintaining the stability of the reference voltage, and therefore when the absolute value of the positive output voltage is lower than that of the negative output voltage, the operational amplifier U3 ensures that the absolute values of the positive and negative power supply output voltages remain equal by dropping the resistor R5.
Of course, the present invention can also have other various embodiments, and based on the embodiments, those skilled in the art can obtain other embodiments without any creative work, and all of them belong to the protection scope of the present invention.
Claims (4)
1. An adding circuit for reducing the absolute value difference of positive and negative output voltages is characterized by comprising an amplifying circuit, a positive output power supply feedback circuit and a negative output power supply feedback circuit, wherein the amplifying circuit comprises a sampling resistor R3, a resistor R6 and an operational amplifier U3, the resistor R3 samples the positive output power supply voltage fed back by the positive output power supply feedback circuit, the resistor R6 samples the negative output power supply voltage fed back by the negative output power supply feedback circuit, when the absolute values of the positive and negative output power supply output voltages are equal, the operational amplifier U3 does not work so as to keep the absolute values of the positive and negative output voltage equal, when the absolute value of the positive output voltage is higher than that of the negative output voltage or the absolute value of the positive output voltage is lower than that of the negative output voltage, the operational amplifier U3 works, the operational amplifier U3 works to keep the absolute values of the positive and negative power supply output voltages equal.
2. The addition circuit for reducing absolute value difference of positive and negative output voltages according to claim 1, the amplifying circuit further comprises a resistor R10, a capacitor C3, a capacitor C4 and a capacitor C7, wherein the resistor R10 is a matching resistor, the capacitor C3 is the supply decoupling capacitor for the operational amplifier U3, the capacitor C4 is the input positive decoupling capacitor for the operational amplifier U3, the capacitor C7 is the feedback capacitor of the operational amplifier U3, one end of the resistor R3 is connected with the positive output power supply feedback circuit, the other end of the resistor R3 is connected with the pin 3 of the operational amplifier U3, one end of the resistor R6 is connected with the negative output power supply feedback circuit, the other end of the resistor R6 is connected with the pin 3 of the operational amplifier U3, one end of the capacitor C3 is connected with the resistor R3, and the other end of the capacitor C3 is connected with the resistor R6.
3. The addition circuit for reducing the absolute value difference of positive and negative output voltages as claimed in claim 1, wherein said positive output power feedback circuit comprises a resistor R1, a resistor R2, a resistor R4, a resistor R5, a capacitor C1, a capacitor C2, an optocoupler U1, and a reference chip U2, said capacitor C2 is an output capacitor of a positive output power, a pin 1 of said reference chip U2 is connected to said optocoupler U1, a pin 3 of said reference chip U2 is connected to said resistor R5, and said resistor R4 and said resistor R2 are both connected to a pin 2 of said reference chip U2.
4. The addition circuit for reducing the absolute value difference of positive and negative output voltages as claimed in claim 1, wherein said negative output power feedback circuit comprises a resistor R7, a resistor R8, a resistor R9, a capacitor C5, a capacitor C6, an optical coupler U4, and a reference chip U5, said capacitor C5 is an output capacitor of a positive output power, a pin 1 of said reference chip U5 is connected to said optical coupler U4, a pin 3 of said reference chip U5 is connected to one end of said resistor R9, and the other end of said resistor R9 and said resistor R8 are both connected to a pin 2 of said reference chip U2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920621321.1U CN209913787U (en) | 2019-04-30 | 2019-04-30 | Addition circuit for reducing absolute value difference of positive and negative output voltages |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920621321.1U CN209913787U (en) | 2019-04-30 | 2019-04-30 | Addition circuit for reducing absolute value difference of positive and negative output voltages |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209913787U true CN209913787U (en) | 2020-01-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920621321.1U Active CN209913787U (en) | 2019-04-30 | 2019-04-30 | Addition circuit for reducing absolute value difference of positive and negative output voltages |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209913787U (en) |
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2019
- 2019-04-30 CN CN201920621321.1U patent/CN209913787U/en active Active
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