CN209843739U - Infrared LED chip of six alligatoring - Google Patents
Infrared LED chip of six alligatoring Download PDFInfo
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- CN209843739U CN209843739U CN201920511124.4U CN201920511124U CN209843739U CN 209843739 U CN209843739 U CN 209843739U CN 201920511124 U CN201920511124 U CN 201920511124U CN 209843739 U CN209843739 U CN 209843739U
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- 238000007788 roughening Methods 0.000 abstract description 20
- 238000000605 extraction Methods 0.000 abstract description 8
- 238000002347 injection Methods 0.000 abstract description 7
- 239000007924 injection Substances 0.000 abstract description 7
- 239000002184 metal Substances 0.000 abstract description 7
- 230000007480 spreading Effects 0.000 abstract description 7
- 238000003892 spreading Methods 0.000 abstract description 7
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- 230000031700 light absorption Effects 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 77
- 238000000034 method Methods 0.000 description 27
- 230000008569 process Effects 0.000 description 19
- 238000010586 diagram Methods 0.000 description 14
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- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 6
- 235000012431 wafers Nutrition 0.000 description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 5
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
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Abstract
The utility model provides an infrared LED chip of six alligatoring, it adopts ITO finger electrode rather than metal finger electrode to carry out the electric current extension, can effectively avoid the shading absorption problem of metal finger electrode, and can obtain good electric current extension equally. In addition, compared with the ITO current spreading layer on the front surface, the ITO finger electrode can be subjected to surface roughening treatment in the area except the ITO finger electrode, and further the light extraction efficiency is improved. The Schottky barrier region is arranged below the ITO finger electrodes, so that current can be preferentially expanded to the periphery of the chip along the ITO finger electrodes, the current directly injected to the lower parts of the electrodes is reduced, and the effective injection of the current is improved. By adopting the grid type N electrode structure, the problem of uneven current distribution of the dot matrix type back electrode can be avoided, and the problem of light absorption of the whole back electrode can also be avoided.
Description
Technical Field
The utility model relates to a semiconductor emitting diode technical field, more specifically say, relate to an infrared LED chip of six alligatoring.
Background
GaAs is a direct band gap semiconductor with the forbidden band width of 1.42eV, and is widely applied to the growth of AlGaAs-based infrared LED epitaxial wafers as a substrate material. According to the forbidden band width, infrared light with the wavelength of more than 870nm can penetrate through the GaAs substrate.
However, current infrared LED chips on GaAs substrates LED light extraction is not maximized and still have more energy loss.
SUMMERY OF THE UTILITY MODEL
In view of this, for solving above-mentioned problem, the utility model provides an infrared LED chip of six alligatoring, technical scheme is as follows:
an infrared LED chip of six-sided alligatoring, infrared LED chip includes:
a substrate;
the epitaxial layer is arranged on the front surface of the substrate and comprises an N-type limiting layer, an MQW active layer, a P-type limiting layer and a P-type window layer which are sequentially arranged in the first direction, and the first direction is perpendicular to the substrate and points to the epitaxial layer from the substrate;
a groove disposed on a side of the P-type window layer facing away from the P-type confinement layer, the groove forming a schottky barrier region;
the ITO finger electrode is arranged on the groove, wherein the central area of the ITO finger electrode is larger than the opening area of the groove, and the finger part of the ITO finger electrode extends to the periphery;
a P electrode disposed on a central region of the ITO finger electrode, wherein a coverage area of the P electrode is smaller than an opening area of the groove;
a grid type N electrode arranged on the back of the substrate;
the surface and the side wall of the epitaxial layer exposed outside and the back surface and the side wall of the substrate exposed outside are roughened surfaces.
Preferably, the P-type window layer has a thickness of 1 μm to 10 μm, inclusive.
Preferably, the P-type window layer comprises a high-doped region and a low-doped region;
the low-doped region is adjacent to the P-type confinement layer, and the high-doped region is away from the P-type confinement layer.
Preferably, the doping concentration of the high-doping area is 1E19/cm3-9.9E19/cm3。
Preferably, the doping concentration of the low-doped region is 1E18/cm3-9.9E18/cm3。
Preferably, the thickness of the ITO finger electrode is 50nm to 500nm, inclusive.
Compared with the prior art, the utility model discloses the beneficial effect who realizes does:
the six-surface coarsened infrared LED chip adopts the ITO finger-shaped electrode to carry out current expansion instead of the metal finger-shaped electrode, so that the problem of shading and absorption of the metal finger-shaped electrode can be effectively avoided, and good current expansion can be obtained. In addition, compared with the ITO current spreading layer on the front surface, the ITO finger electrode can be subjected to surface roughening treatment in the area except the ITO finger electrode, and further the light extraction efficiency is improved.
And, set up the schottky barrier region below the ITO finger electrode, can make the electric current take precedence to expand around the chip along the ITO finger electrode, reduced the electric current of direct injection to electrode below, and then improved the effective injection of electric current, can make the chip light efficiency improve.
Meanwhile, the ITO finger electrode and the Schottky barrier region are arranged below the P electrode, and the lower surface of the P electrode is in contact with the upper surface of the ITO finger electrode, so that the borne routing strength can be improved, and the service life of a chip is prolonged; meanwhile, the chip resistance can be reduced.
Moreover, by adopting a grid type N electrode structure, the problem of uneven current distribution of the dot matrix type back electrode can be avoided, and the problem of light absorption of the whole back electrode can also be avoided. The dot matrix type back electrode may have some back electrode dots without current injection due to uneven back surface, and the grid type N electrode electrically interconnects all the back electrode dots, thereby effectively solving the problem.
Moreover, the blank area of the grid type N electrode structure is a roughened surface, so that the light extraction efficiency can be effectively improved;
finally, the lateral surfaces of the six-surface roughened infrared LED chip are all roughened surfaces, so that a structure that the front surface, the back surface and the peripheral side walls are all roughened surfaces is formed, and the light extraction efficiency is greatly improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a six-sided roughened infrared LED chip provided in an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating a schottky barrier region according to an embodiment of the present invention in a circular shape;
fig. 3 is a schematic structural diagram of a schottky barrier region and an ITO finger electrode according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a schottky barrier region, an ITO finger electrode and a P electrode according to an embodiment of the present invention;
fig. 5 is a schematic view of a surface roughening area according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a grid-type N electrode according to an embodiment of the present invention;
fig. 7 is a schematic flow chart of a manufacturing method of a six-sided roughened infrared LED chip according to an embodiment of the present invention;
fig. 8 is a schematic flowchart illustrating a process of performing a roughening process on the exposed back surface of the substrate according to an embodiment of the present invention;
fig. 9-13 are schematic views of a back roughening process structure provided in an embodiment of the present invention;
fig. 14 is a schematic flow chart illustrating a roughening process performed on the surface of the epitaxial layer exposed outside according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention is described in detail with reference to the accompanying drawings and the detailed description.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an infrared LED chip of six-sided coarsening provided by the embodiment of the utility model, the infrared LED chip includes:
a substrate 11;
the epitaxial layer is arranged on the front surface of the substrate 11 and comprises an N-type limiting layer 14, an MQW active layer 15, a P-type limiting layer 16 and a P-type window layer 17 which are sequentially arranged in the first direction, the first direction is perpendicular to the substrate 11, and the epitaxial layer is pointed by the substrate 11;
a recess disposed on a side of the P-type window layer 17 facing away from the P-type confinement layer 16, the recess forming a schottky barrier region 18;
an ITO finger electrode 19 disposed on the groove, wherein a central area of the ITO finger electrode 19 is larger than an opening area of the groove, and a finger portion of the ITO finger electrode 19 extends all around;
a P electrode 20 disposed on the ITO finger electrode 19 in a central region, wherein the coverage area of the P electrode 20 is smaller than the opening area of the groove;
a mesh type N electrode 21 provided on the back surface of the substrate 11;
wherein, the exposed surface and sidewall of the epitaxial layer and the exposed back surface and sidewall of the substrate are roughened surfaces 22.
Further, the infrared LED chip further includes: an N-type buffer layer 12 and an N-type current spreading layer 13, both disposed between the substrate 11 and the N-type confinement layer 14, the N-type buffer layer 12 being adjacent to the substrate 11, the N-type current spreading layer being adjacent to the N-type confinement layer.
According to the description, the six-surface coarsened infrared LED chip adopts the ITO finger-shaped electrode instead of the metal finger-shaped electrode for current expansion, so that the problem of shading and absorption of the metal finger-shaped electrode can be effectively avoided, and good current expansion can be obtained. In addition, compared with the ITO current spreading layer on the front surface, the ITO finger electrode can be subjected to surface roughening treatment in the area except the ITO finger electrode, and further the light extraction efficiency is improved.
And, set up the schottky barrier region in ITO finger electrode below, can make the electric current take precedence to expand around the chip along ITO finger electrode, reduced the electric current of direct injection to electrode below, and then improved the effective injection of electric current, can make the chip light efficiency improve, the life-span increases.
Moreover, by adopting a grid type N electrode structure, the problem of uneven current distribution of the dot matrix type back electrode can be avoided, and the problem of light absorption of the whole back electrode can also be avoided. The dot matrix type back electrode may have some back electrode dots without current injection due to uneven back surface, and the grid type N electrode electrically interconnects all the back electrode dots, thereby effectively solving the problem.
Moreover, the blank area of the grid type N electrode structure is a roughened surface, so that the light extraction efficiency can be effectively improved;
finally, the lateral surfaces of the six-surface roughened infrared LED chip are all roughened surfaces, so that a structure that the front surface, the back surface and the peripheral side walls are all roughened surfaces is formed, and the light extraction efficiency is greatly improved.
Further, based on the above-mentioned embodiment of the present invention, refer to fig. 2, fig. 2 is that the embodiment of the present invention provides a schottky barrier shape is a circular schematic diagram, wherein, the groove is a circular groove, that is, the radius of schottky barrier 18 is R2.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a schottky barrier region and an ITO finger electrode according to an embodiment of the present invention, a central region of the ITO finger electrode 19 is a circular region with a radius R3.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a schottky barrier region, an ITO finger electrode and a P electrode according to an embodiment of the present invention, a coverage area of the P electrode 20 is a circular area, and a radius thereof is R1.
Referring to fig. 5, fig. 5 is a schematic diagram of a surface roughened region according to an embodiment of the present invention, wherein a shaded region 51 represents the surface roughened region, i.e. the region outside the ITO finger electrode.
Wherein a dimensional relationship of the groove, the central region of the ITO finger electrode and the P electrode satisfies R1 < R2 < R3.
It should be noted that the above embodiments are only described by way of example, and the circular areas illustrated by the three embodiments may be replaced by polygons, which is not limited in the embodiments of the present invention.
Further, referring to fig. 6, fig. 6 is a schematic structural diagram of a grid-type N electrode according to an embodiment of the present invention, a grid-type N electrode 21 is disposed on the back surface of the substrate, and a blank region of the grid-type N electrode is also subjected to a roughening process, as shown in fig. 6, wherein a shadow portion is a metal electrode, and the blank region 61 is a roughening region. When the proportion of the grid type N electrode to the back area of the chip needs to be adjusted, the circular radius R or the grid distance a at the grid point is changed. Also, such adjustments may change the operating voltage and brightness of the LED chip.
Further, based on the above embodiments of the present invention, the thickness of the P-type window layer is 1 μm to 10 μm, inclusive.
In this embodiment, for example, the thickness of the P-type window layer is 2 μm or 5 μm or 6 μm or 8 μm, which may be determined according to a specific process, and is not limited in the embodiment of the present invention.
Further, according to the above embodiments of the present invention, the P-type window layer includes a high doping region and a low doping region; the low-doped region is adjacent to the P-type confinement layer, and the high-doped region is away from the P-type confinement layer.
Optionally, the doping concentration of the highly doped region is 1E19/cm3-9.9E19/cm3The doping concentration of the low-doped region is 1E18/cm3-9.9E18/cm3。
Further, according to the above embodiment of the present invention, the thickness of the ITO finger electrode is 50nm to 500nm, inclusive.
In this embodiment, the thickness of the ITO finger electrode is, for example, 80nm or 120nm or 230nm, which may be determined according to a specific process, and is not limited in the embodiment of the present invention.
Based on the above-mentioned all embodiments of the utility model discloses the manufacturing method of six coarsened infrared LED chips is still provided in another embodiment of the utility model, refer to fig. 7, and fig. 7 is the embodiment of the utility model provides a flow schematic diagram of the manufacturing method of six coarsened infrared LED chips, the manufacturing method includes:
s101: a substrate is provided.
In this step, the substrate includes, but is not limited to, a GaAs substrate.
S102: the front surface of the substrate is provided with an epitaxial layer, the epitaxial layer comprises an N-type limiting layer, an MQW active layer, a P-type limiting layer and a P-type window layer which are sequentially arranged in a first direction, and the first direction is perpendicular to the substrate and points to the epitaxial layer from the substrate.
Further, the method also comprises the following steps: an N-type buffer layer 12 and an N-type current spreading layer 13 disposed between the substrate 11 and the N-type confinement layer 14, the N-type buffer layer 12 being adjacent to the substrate 11, the N-type current spreading layer being adjacent to the N-type confinement layer.
In this step, including but not limited to, the growth of epitaxial layers on the substrate using a MOCVD (Metal-Organic Chemical Vapor Deposition) process.
Optionally, the N-type buffer layer is a GaAs buffer layer, the N-type current expansion layer is an N-type AlGaAs current expansion layer, the N-type confinement layer is an N-type AlGaAs confinement layer, the P-type confinement layer is a P-type AlGaAs confinement layer, and the P-type window layer is a P-type AlGaAs window layer.
Incidentally, AlGaAs means AlxGa(1-x)As material, each AlxGa(1-x)The components of the As functional layer can be respectively adjusted according to actual requirements so As to realize corresponding functions.
S103: and etching the P-type window layer to form a groove, wherein the groove forms a Schottky barrier region.
In the step, a positive photoresist is coated on the surface of the epitaxial layer in a spinning mode, a Schottky barrier region is defined after exposure and development, the P-type window layer is etched in a wet etching mode to etch and remove the surface high-doping layer to form the groove, then the photoresist is removed, the surface high-doping P-type window layer is removed, and the surface high-doping P-type window layer cannot form ohmic contact with the ITO finger electrode, so that the Schottky barrier region is formed.
S104: and forming an ITO finger electrode on the groove, wherein the central area of the ITO finger electrode is larger than the opening area of the groove, and the finger part of the ITO finger electrode extends to the periphery.
In the step, an ITO current expansion layer is deposited on the surface of the epitaxial wafer with the manufactured Schottky barrier region pattern, ITO finger electrodes are formed through the processes of photoetching, etching and the like, and then photoresist is removed. The central area of the ITO finger electrode is slightly larger than the Schottky barrier area, and the Schottky barrier area can be completely covered.
S105: and forming a P electrode in a central area on the ITO finger electrode, wherein the covering area of the P electrode is smaller than the opening area of the groove.
In the step, negative photoresist is coated on the surface of the epitaxial wafer with the manufactured ITO finger electrode in a spinning mode, a P electrode metal material is evaporated after exposure and development, and then the manufacturing of the P electrode is completed through a stripping process, wherein the area of the P electrode is slightly smaller than that of a Schottky barrier region.
S106: and roughening the exposed surface of the epitaxial layer.
S107: and growing a front protection layer.
In this step, the protective layer includes, but is not limited to, a silicon nitride protective layer or a silicon dioxide protective layer.
S108: and forming a grid type N electrode on the back surface of the substrate.
In the step, after the substrate is ground and thinned to the required thickness, the grid type N electrode is manufactured through the processes of photoetching, evaporation, stripping, annealing and the like.
S109: and roughening the back surface of the substrate exposed outside.
S110: and growing a back protective layer.
In this step, the protective layer includes, but is not limited to, a silicon nitride protective layer or a silicon dioxide protective layer.
S111: a dicing process is performed to form individual LED core particles.
In this step, the back surface of the wafer prepared as described above is attached to a blue film, and the wafer is cut through and separated from the front surface to form separated LED chips.
S112: and roughening the side wall of the epitaxial layer exposed outside and the side wall of the substrate exposed outside, and removing the front protection layer.
In the step, the front surface of the wafer is cut through and divided to carry out film expansion, so that the distance between the separated LED chips is increased to carry out roughening treatment on the side wall, and the distance between the adjacent LED chips after the film expansion is 1.1-2.0 times of the chip size.
And immersing the LED chips which are orderly arranged after the film expansion into the roughening solution, forming a roughened surface on the side wall of the LED chip, and then immersing the LED chips into the BOE etching solution to remove the front protective layer.
S113: and removing the back protection layer.
In the step, the front surface of the LED chip is attached to the blue film by turning the film once, the blue film on the back surface of the LED chip is uncovered, the back surface of the LED chip is exposed, and the LED chip is immersed in BOE etching liquid to remove the back surface protection layer.
And the back of the LED chip is attached to the blue film by turning the film for the second time, the blue film on the front of the LED chip is removed, and the front of the LED chip faces upwards, so that the LED chip is convenient to use in a die bonding process in a packaging stage, and the manufacturing process of the LED chip is completed.
Based on the above embodiment of the present invention, in another embodiment of the present invention, referring to fig. 8, fig. 8 is the embodiment of the present invention provides a right the substrate exposes outside the back and carries out the flow diagram of alligatoring treatment, include:
s201: and etching the back exposed out of the substrate by taking the grid type N electrode as a mask to form a step.
In this step, as shown in fig. 9 and 10, including but not limited to etching the exposed back surface of the substrate by means of ICP dry etching, the height of the step is 0.1 μm to 1 μm, inclusive.
S202: and spin-coating photoresist to cover the grid type N electrode.
In this step, as shown in fig. 11, the photoresist is used to completely protect the grid-type N electrode and expose the blank area of the grid-type N electrode.
S203: and roughening the back surface of the substrate exposed outside.
In this step, as shown in fig. 12, the device is immersed in a roughening solution to perform back surface roughening treatment.
S204: and removing the photoresist.
In this step, as shown in fig. 13, the photoresist is removed, and the back surface roughening process is completed.
Based on the above embodiment of the present invention, in another embodiment of the present invention, referring to fig. 14, fig. 14 is the embodiment of the present invention provides a right the epitaxial layer exposes outside the surface and carries out the process schematic diagram of alligatoring treatment, include:
s301: and etching the exposed surface of the epitaxial layer by taking the ITO finger electrode as a mask to form a step.
S302: spin-coating photoresist to cover the ITO finger electrodes and the P electrodes;
s303: roughening the exposed surface of the epitaxial layer;
s304: and removing the photoresist.
In this embodiment, the principle is the same as that of the above embodiment, and is not described herein again.
According to the above description, the present invention adopts the step protection method, and the interface between the ITO finger electrode and the P-type window layer and the roughening area are not in the same plane, so that the step height difference is formed; the interface between the grid N electrode and the substrate and the coarsening area are not on the same plane, so that the step height difference is formed, and the problem that the grid N electrode and the ITO finger electrode are easy to fall off due to lateral erosion in the coarsening process is solved.
The infrared LED chip with six roughened surfaces and the manufacturing method thereof provided by the present invention are described in detail above, and specific examples are applied herein to explain the principles and embodiments of the present invention, and the description of the above embodiments is only used to help understand the method and core ideas of the present invention; meanwhile, for the general technical personnel in the field, according to the idea of the present invention, there are changes in the specific implementation and application scope, to sum up, the content of the present specification should not be understood as the limitation of the present invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include or include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (4)
1. The utility model provides an infrared LED chip of six alligatoring which characterized in that, infrared LED chip includes:
a substrate;
the epitaxial layer is arranged on the front surface of the substrate and comprises an N-type limiting layer, an MQW active layer, a P-type limiting layer and a P-type window layer which are sequentially arranged in a first direction, and the first direction is perpendicular to the substrate and points to the epitaxial layer from the substrate;
a groove disposed on a side of the P-type window layer facing away from the P-type confinement layer, the groove forming a schottky barrier region;
the ITO finger electrode is arranged on the groove, wherein the central area of the ITO finger electrode is larger than the opening area of the groove, and the finger part of the ITO finger electrode extends to the periphery;
a P electrode disposed on a central region of the ITO finger electrode, wherein a coverage area of the P electrode is smaller than an opening area of the groove;
a grid type N electrode arranged on the back of the substrate;
the surface and the side wall of the epitaxial layer exposed outside and the back surface and the side wall of the substrate exposed outside are roughened surfaces.
2. The infrared LED chip of claim 1, wherein the P-type window layer has a thickness of 1-10 μ ι η, inclusive.
3. The infrared LED chip of claim 1, wherein said P-type window layer comprises highly doped regions and lowly doped regions;
the low-doped region is adjacent to the P-type confinement layer, and the high-doped region is away from the P-type confinement layer.
4. The infrared LED chip of claim 1, wherein said ITO finger electrodes have a thickness of 50nm to 500nm, inclusive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920511124.4U CN209843739U (en) | 2019-04-15 | 2019-04-15 | Infrared LED chip of six alligatoring |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920511124.4U CN209843739U (en) | 2019-04-15 | 2019-04-15 | Infrared LED chip of six alligatoring |
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| Publication Number | Publication Date |
|---|---|
| CN209843739U true CN209843739U (en) | 2019-12-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920511124.4U Withdrawn - After Issue CN209843739U (en) | 2019-04-15 | 2019-04-15 | Infrared LED chip of six alligatoring |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109962130A (en) * | 2019-04-15 | 2019-07-02 | 扬州乾照光电有限公司 | A kind of the infrared LED chip and production method of the roughening of six faces |
-
2019
- 2019-04-15 CN CN201920511124.4U patent/CN209843739U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109962130A (en) * | 2019-04-15 | 2019-07-02 | 扬州乾照光电有限公司 | A kind of the infrared LED chip and production method of the roughening of six faces |
| CN109962130B (en) * | 2019-04-15 | 2024-08-20 | 扬州乾照光电有限公司 | Six-surface roughened infrared LED chip and manufacturing method |
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