CN209842621U

CN209842621U - High-density E1 interface signaling acquisition mainboard

Info

Publication number: CN209842621U
Application number: CN201921075880.3U
Authority: CN
Inventors: 王向东; 李叶; 唐波; 胡静献; 高克泳
Original assignee: Beijing Ruiyuan Core Technology Co Ltd
Current assignee: Beijing Ruiyuan Core Technology Co Ltd
Priority date: 2019-07-11
Filing date: 2019-07-11
Publication date: 2019-12-24
Anticipated expiration: 2029-07-11

Abstract

The utility model discloses a mainboard is gathered in high density E1 interface signaling, its characterized in that: the system comprises a main control module, a frame decoding module, a signaling processing module, a data output module, an input interface, an output interface, a power supply interface, a fan interface, a management interface and an indicator light; the main control module is connected with the management interface; the frame decoding module, the signaling processing module and the data output module are connected with the main control module through a parallel bus; the input interface is connected with the deframing module; the signaling processing module is connected with the frame decoding module; the output interface is connected with the data output module. The integrated level of the board card is high, and the quantity and the density of the access E1 are large; the output interface can support optical interface or electric interface Ethernet, and is convenient and flexible. The method can be widely applied to the fields of signaling monitoring, internetwork charging, mobile network security, other value-added services based on signaling monitoring and the like.

Description

High-density E1 interface signaling acquisition mainboard

The technical field is as follows:

the utility model relates to a collection equipment. In particular to a high-density E1 interface signaling acquisition mainboard.

(II) background technology:

the E1 interface is a common data transmission interface, which is widely used between network elements of a communication system. The frame structure is divided into 32 time slots, of which a single or a plurality is used for transmitting signaling according to the different protocols. With the continuous development of communication technology, communication networks are increasingly complex, and signaling is the nerve of the communication networks and supports and controls the normal operation of the communication networks. The applications of acquisition, monitoring and the like related to signaling have very wide market prospects.

The high-density E1 interface signaling acquisition mainboard of the utility model has high integrated level of board cards and large access E1 quantity and density; the output interface can support optical interface or electric interface Ethernet, and is convenient and flexible. The method can be widely applied to the fields of signaling monitoring, internetwork charging, mobile network security, other value-added services based on signaling monitoring and the like.

(III) the invention content:

the high-density E1 interface signaling acquisition main board comprises a main control module, a frame decoding module, a signaling processing module, a data output module, an input interface, an output interface, a power interface, a fan interface, a management interface and an indicator light; the main control module is connected with the management interface; the frame decoding module, the signaling processing module and the data output module are connected with the main control module through a parallel bus; the input interface is connected with the deframing module; the signaling processing module is connected with the frame decoding module; the output interface is connected with the data output module.

The main control module adopts a processor with PowerPC model P1014, a UART interface of the main control module is connected with an RJ 45-shaped RS232 serial port outside a PHY chip of RS232, an SGMII1 interface is connected with an RJ 45-shaped network port outside an Ethernet PHY chip, an SGMII2 interface is connected with an RJ 45-shaped network port outside an Ethernet PHY chip, and an IFC bus (parallel bus interface supporting motorola or intel mode) of the main control module is externally connected with a CPLD, a CFG (configuration) interface of a deframing module and a configuration interface of a signaling processing module and a data output module.

The deframing module adopts 8 Maxim DS26518 chips, the line interface of the deframing module is connected with the input interface formed by 4 DB44, the deframing module is connected with the signaling processing module through 8 IBO buses, and the configuration interface CFG of the deframing module is connected with the IFC interface of the main control module CPU.

The signaling processing module is connected with the frame decoding module through 8 IBO buses.

The data output module is connected with the SFI interface output interface.

The input interface comprises 4 DB44 interfaces, and each DB44 interface is accessed with 16 paths of E1 signals.

The output interface is 4 SFP interfaces, and can support optical interface or electric interface Ethernet by inserting an optical interface module or an electric interface module.

The power interfaces are two mutually-active power interfaces which can be connected with a redundant power supply.

The fan interface can be connected with two direct current fans.

The management interface comprises two Ethernet interfaces and an RS232 serial port, and the physical forms of the three interfaces are RJ 45.

The indicator lamp comprises two parts, wherein 4 LEDs in the first part are connected with a GPIO of a CPU of the main control module to indicate the running state of the board card; the second portion 64 has only the LED connected to the CPLD IO indicating the relative status of the incoming 64-way E1 signal.

(IV) description of the drawings:

FIG. 1 is a schematic diagram of a collection motherboard;

(V) specific embodiment:

in order to make the technical problem, technical solution and advantageous effects to be solved by the present invention more clearly understood, the following description is made in conjunction with the accompanying drawings and embodiments. It should be noted that the specific embodiments described herein are only for explaining the present invention, and are not used to limit the present invention

The high-density E1 interface signaling acquisition main board of the present invention has an internal structure as shown in fig. 1, and includes a main control module, a deframing module, a signaling processing module, a data output module, an input interface, an output interface, a power interface, a fan interface, a management interface, and an indicator light; the main control module is connected with the management interface; the frame decoding module, the signaling processing module and the data output module are connected with the main control module through a parallel bus; the input interface is connected with the deframing module; the signaling processing module is connected with the frame decoding module; the output interface is connected with the data output module.

The main control module adopts a processor with a PowerPC model number P1014, and the external Nand Flash and DDR are used for supporting the operation of the system per se; the UART interface is connected with an RJ45 RS232 serial port outside a PHY chip of RS232, an SGMII1 interface is connected with an RJ45 network port outside an Ethernet PHY chip, an SGMII2 interface is connected with an RJ45 network port outside an Ethernet PHY chip, and an IFC bus (parallel bus interface supporting motorola or intel mode) is externally connected with a CPLD, a deframing module and a Configuration (CFG) interface of a signaling processing module and a data output module. The main control module is used for the relevant management of the board card.

The deframing module adopts 8 Maxim DS26518 chips, the line interface of the deframing module is connected with the input interface formed by 4 DB44, the deframing module is connected with the signaling processing module through 8 IBO buses (1 chip of each DS 26518), and the configuration interface CFG of the deframing module is connected with the IFC interface of the CPU. The function of the deframing module is to resolve 32 time slots in the E1 link and transmit back to the signaling processing module through 8 IBO buses. Each DS26518 chip has 8 accesses of E1 data and feeds back via its own IBO bus, thus feeding back 8x8 — 64 channels.

The DS26518 chip supports a longhaul mode, gain can be adjusted according to the strength of an acquired signal, the DS26518 chip is suitable for acquisition equipment, an IBO bus is a special bus form of the chip, and all accessed E1 signals can be returned through a unified TDM bus, so that the number of wiring is reduced, and the DS26518 chip is suitable for connection of high-density equipment.

The data output module is connected with the SFI interface output interface.

The signaling processing module and the data output module are realized in the same FPGA.

The input interface comprises 4 DB44 interfaces, and each DB44 interface is accessed with 16 paths of E1 signals. The total 4x16 is 64 paths of E1 signal inputs.

The output interface is 4 SFP interfaces, and can support optical interface or electric interface Ethernet by inserting an optical interface module or an electric interface module, thereby being convenient to use in various application scenes.

The fan interface can be connected with two direct current fans and is used for heat dissipation of the board.

The length of the whole board card does not exceed 430mm, and the whole board card can be installed in a 19-inch shelf chassis.

The indicator light and the management interface are arranged on the same side of the board card, and the input interface and the output interface are arranged on the other side of the board card. Construction wiring and management display are carried out on two sides, and operation is convenient.

The above-mentioned preferred embodiments of the present invention are not intended to limit the present invention, and all modifications, equivalent replacements, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high density E1 interface signaling collection mainboard, its characterized in that: the system comprises a main control module, a frame decoding module, a signaling processing module, a data output module, an input interface, an output interface, a power supply interface, a fan interface, a management interface and an indicator light; the main control module is connected with the management interface; the frame decoding module, the signaling processing module and the data output module are connected with the main control module through a parallel bus; the input interface is connected with the deframing module; the signaling processing module is connected with the frame decoding module; the output interface is connected with the data output module.

2. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the main control module adopts a processor with a PowerPC model number P1014, and the external Nand Flash and DDR are used for supporting the operation of the system per se; the UART interface is connected with an RJ 45-shaped RS232 serial port outside a PHY chip of the RS232, the SGMII1 interface is connected with an RJ 45-shaped network port outside an Ethernet PHY chip, the SGMII2 interface is connected with an RJ 45-shaped network port outside the Ethernet PHY chip, and an IFC bus of the Ethernet is externally connected with a CPLD, a deframing module, a signaling processing module and a configuration interface of a data output module.

3. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the de-framing module adopts 8 Maxim DS26518 chips, the line interface of the de-framing module is connected with an input interface formed by 4 DB44, and the de-framing module is connected with the signaling processing module through 8 IBO buses.

4. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the signaling processing module and the data output module are realized in the same FPGA.

5. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the input interface comprises 4 DB44 interfaces, and each DB44 interface is accessed with 16 paths of E1 signals.

6. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the output interface is 4 SFP interfaces, and the optical port or electric port Ethernet can be supported by inserting an optical port module or an electric port module.

7. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the management interface comprises two Ethernet interfaces and an RS232 serial port, and the physical forms of the three interfaces are RJ 45.

8. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the indicator lamp comprises two parts, wherein 4 LEDs in the first part are connected with a GPIO of a CPU of the main control module to indicate the running state of the board card; the second portion 64 has only the LED connected to the CPLD IO indicating the relative status of the incoming 64-way E1 signal.

9. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the indicator light and the management interface are arranged on the same side of the board card, and the input interface and the output interface are arranged on the other side of the board card.

10. The high-density E1 interface signaling collection motherboard of claim 1, wherein: the length of the whole board card does not exceed 430mm, and the whole board card can be installed in a 19-inch shelf chassis.