CN209787139U - Switching circuit with overvoltage protection - Google Patents
Switching circuit with overvoltage protection Download PDFInfo
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- CN209787139U CN209787139U CN201920767854.0U CN201920767854U CN209787139U CN 209787139 U CN209787139 U CN 209787139U CN 201920767854 U CN201920767854 U CN 201920767854U CN 209787139 U CN209787139 U CN 209787139U
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Abstract
a switch circuit with overvoltage protection comprises a buffer switch circuit and an overvoltage protection control circuit; the overvoltage protection control circuit controls the buffer switch circuit to be switched off when the input voltage is in overvoltage; the buffer switch circuit comprises a PMOS tube switch circuit and a PMOS tube control circuit; the control output end of the PMOS tube control circuit is connected with the control input end of the PMOS tube switching circuit; the first control input end of the PMOS tube control circuit is used for receiving an external control signal, and the second control input end of the PMOS tube control circuit is used for receiving the external control signal and a control signal output by the overvoltage protection control circuit; the PMOS tube can be well protected against impact when being electrified, and the turn-off loss of the PMOS tube can be effectively reduced when the PMOS tube is turned off, so that the switching environment of the PMOS tube is improved, and the reliability of the whole switching circuit is improved; and overvoltage protection can be performed according to the change of the input voltage, so that the use safety and the stability of the whole switching circuit are ensured.
Description
Technical Field
The utility model relates to a switching circuit field especially relates to a switching circuit with overvoltage protection.
Background
In the dc load power supply, electronic switching elements, such as MOS transistors, PMOS transistors or triodes, are usually used as the switching elements, and the electronic switching elements are convenient to operate and fast to react, however, when the electronic switching elements are applied to the switching circuit, the following defects exist: when the electronic switch element is just electrified, the electronic switch element is easily impacted by the switching-on current, and has larger switching-off loss when the electronic switch element is switched off, so that the reliability of the electronic switch element is reduced; on the other hand, the existing switch circuit generally does not have an overvoltage protection function, and a protection circuit needs to be additionally arranged to protect the load and the switch circuit, which is not beneficial to use.
SUMMERY OF THE UTILITY MODEL
in view of the above-mentioned defects, the present invention aims to provide a switch circuit with overvoltage protection, which can perform good impact protection on the PMOS transistor when the switch circuit is powered on, and can effectively reduce the turn-off loss of the PMOS transistor when the PMOS transistor is turned off, thereby improving the switch environment of the PMOS transistor and improving the reliability of the whole switch circuit; and overvoltage protection can be performed according to the change of the input voltage, so that the use safety and the stability of the whole switching circuit are ensured.
the utility model provides a switch circuit with overvoltage protection, which comprises a buffer switch circuit and an overvoltage protection control circuit; the overvoltage protection control circuit controls the buffer switch circuit to be switched off when the input voltage is in overvoltage;
the buffer switch circuit comprises a PMOS tube switch circuit and a PMOS tube control circuit; the control output end of the PMOS tube control circuit is connected with the control input end of the PMOS tube switching circuit; the first control input end of the PMOS tube control circuit is used for receiving an external control signal, and the second control input end of the PMOS tube control circuit is used for receiving the external control signal and a control signal output by the overvoltage protection control circuit;
the overvoltage protection control circuit comprises a detection circuit, a power supply circuit, a reference voltage circuit and a comparison control circuit;
The input of detection circuitry is connected in buffer switch circuit's input, and detection circuitry's output is connected with comparison control circuit's detected signal input, power supply circuit's input is connected in buffer switch circuit's input, and power supply circuit's output VCC, reference voltage circuit's input is connected with power supply circuit's output, reference voltage circuit's output is connected with comparison control circuit's reference signal end, comparison control circuit's control output is connected with PMOS pipe control circuit's second control input.
preferably, the buffer switch circuit comprises a resistor R12, a PMOS tube QT1, a triode QT2, an inductor L1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a drive control circuit, a capacitor C1, a capacitor C3, a diode D1, a diode D2, a diode D3, a resistor R10 and a triode QT 3;
one end of the resistor R12 is used as an input end of the buffer switch circuit, the other end of the resistor R12 is connected with a source electrode of a PMOS tube QT1 through an inductor L1, a drain electrode of the PMOS tube QT1 is used as an output end of the buffer switch circuit, and a drain electrode of the PMOS tube QT1 is grounded through a capacitor C3;
the source electrode of the PMOS tube QT1 is connected with the gate electrode through a resistor R5, the gate electrode of the PMOS tube QT1 is connected with one end of a resistor R6, the other end of the resistor R6 is connected with the collector electrode of a triode QT3, the emitter electrode of the triode QT3 is grounded, the base electrode of the triode QT3 serves as the control input end of the PMOS tube switching circuit, and the base electrode of the triode QT3 is connected with the emitter electrode through a resistor R10;
One end of a capacitor C1 is connected to the drain electrode of the PMOS transistor QT1, the other end of a capacitor C1 is connected with one end of a resistor R1, and the other end of the resistor R1 is connected to a common connection point between an inductor L1 and a direct-current power supply; the anode of the diode D2 is connected to the source of the PMOS transistor QT1, the cathode of the diode D2 is connected to the common connection point between the resistor R1 and the capacitor C1, the anode of the diode D3 is connected to the source of the PMOS transistor QT1, the cathode of the diode D3 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the anode of the diode D1 through the resistor R2, and the cathode of the diode D1 is connected to the common connection point between the inductor L1 and the DC power supply;
The collector of triode QT2 is connected in the common junction between resistance R2 and resistance R3, and the emitter ground of triode QT2, the base of triode QT2 passes through resistance R4 and connects in the negative pole of diode D3.
Preferably, the PMOS transistor control circuit includes a diode D4, a transistor QT6, a capacitor C2, a resistor R11, and a resistor R9;
the positive pole of diode D4 receives external control command as the first control input end of PMOS pipe control circuit, the negative pole of diode D4 is connected with triode QT 6's base, triode QT 6's collecting electrode passes through resistance R11 and connects the power VCC, triode QT 6's projecting pole passes through electric capacity C2 ground connection, triode QT 6's projecting pole and electric capacity C2's common connection point are connected with resistance R9's one end, resistance R9's the other end is connected with triode QT 3's base as the control output end of PMOS pipe control circuit.
Preferably, the PMOS transistor control circuit further includes a discharge control circuit including a resistor R7, a resistor R8, a transistor QT4, and a transistor QT 5;
triode QT 4's base is as PMOS pipe control circuit's second control input end, and triode QT 4's base is connected respectively in diode D4's positive pole and comparison control circuit's control output, triode QT 4's projecting pole passes through resistance R7 and connects the power VCC, triode QT 4's collecting electrode passes through resistance R8 ground connection, triode QT 5's base is connected in triode QT 4's projecting pole, triode QT 5's collecting electrode is connected in the tie point between electric capacity C2 and triode QT 6's projecting pole, triode QT 5's projecting pole ground connection, wherein, triode QT4 is the P type triode.
preferably, the buffer switch circuit further includes an output discharge circuit, an input end of the output discharge circuit is connected to a drain of the PMOS transistor QT1, an output end of the output discharge circuit is grounded, and a control end of the output discharge circuit is connected to a collector of the transistor QT 4.
Preferably, the output discharge circuit is a thyristor Q1, the anode of the thyristor Q1 is connected to the drain of the PMOS transistor QT1, the cathode of the thyristor Q1 is grounded, and the control electrode of the thyristor Q1 is connected to the collector of the transistor QT 4.
preferably, the comparison control circuit comprises a comparator U2, a resistor R20 and a triode QT 7;
the inverting terminal of comparator U2 is connected with detection circuit's output as comparison control circuit's detected signal input, the homophase end of comparator U2 is connected with reference voltage circuit's output as reference signal input, comparator U2's output is connected with triode QT 7's base through resistance R20, triode QT 7's emitter ground, triode QT 7's collecting electrode is connected with PMOS pipe control circuit's second control input as comparison control circuit's control output.
preferably, the reference voltage circuit comprises an adjustable resistor R16, a resistor R17, a resistor R15, a controllable precision voltage regulator U1 and a capacitor C2;
one end of an adjustable resistor R16 is connected with the output end of the power circuit, the other end of the adjustable resistor R16 is grounded through a resistor R17, a common connection point between the adjustable resistor R16 and the resistor R17 is connected with a reference pole of a controllable precise voltage-stabilizing source U1, the anode of the controllable precise voltage-stabilizing source U1 is grounded, the cathode of the controllable precise voltage-stabilizing source U1 is connected with the output end of the power circuit through a resistor R15, the cathode of the controllable precise voltage-stabilizing source U1 is grounded through a capacitor C2, a common connection point between the capacitor C2 and the cathode of the controllable precise voltage-stabilizing source U1 serves as the output end of the reference voltage circuit, and the controllable precise voltage-stabilizing source U1 is a TL431 chip.
Preferably, the power supply circuit comprises a resistor R18, a resistor R19, a voltage regulator tube DW1, a voltage regulator tube DW2, a triode QT8 and a capacitor C3;
One end of a resistor R8 is used as the input end of the power circuit and connected with the input end of the buffer switch circuit, the other end of the resistor R18 is connected with the collector of a triode QT8, the emitter of the triode QT8 is connected with the negative electrode of a voltage regulator tube DW1, the positive electrode of the voltage regulator tube DW1 is grounded, one end of a resistor R19 is connected with the collector of a triode QT8, the other end of the resistor R19 is connected with the base of a triode QT8, the base of the triode QT8 is grounded through a capacitor C3, the base of the triode QT8 is connected with the negative electrode of the voltage regulator tube DW2, the positive electrode of the voltage regulator tube DW2 is grounded, and a common connection point between the.
Preferably, the detection circuit comprises a resistor R13 and a resistor R14; one end of the resistor R13 is connected to the input end of the buffer switch circuit, the other end of the resistor R13 is grounded through a resistor R14, and a common connection point between the resistor R13 and the resistor R14 is connected with the inverting end of the comparator U2 as the output end of the detection circuit.
The utility model has the advantages that: the PMOS tube can be well protected against impact when being electrified, and the turn-off loss of the PMOS tube can be effectively reduced when the PMOS tube is turned off, so that the switching environment of the PMOS tube is improved, and the reliability of the whole switching circuit is improved; and overvoltage protection can be performed according to the change of the input voltage, so that the use safety and the stability of the whole switching circuit are ensured.
Drawings
fig. 1 is a schematic structural diagram of the present invention.
Fig. 2 is a schematic diagram of the circuit principle of the present invention.
Detailed Description
The present invention is explained in further detail below with reference to the drawings attached to the specification, and it should be noted that the detailed description of the present invention is only for the preferred embodiments, and any modifications and equivalents of the technical solutions of the present invention by those skilled in the art are included in the scope of the technical solutions of the present application.
the utility model provides a switch circuit with overvoltage protection, which comprises a buffer switch circuit and an overvoltage protection control circuit; the overvoltage protection control circuit controls the buffer switch circuit to be switched off when the input voltage is in overvoltage;
The buffer switch circuit comprises a PMOS tube switch circuit and a PMOS tube control circuit; the control output end of the PMOS tube control circuit is connected with the control input end of the PMOS tube switching circuit; the first control input end of the PMOS tube control circuit is used for receiving an external control signal, and the second control input end of the PMOS tube control circuit is used for receiving the external control signal and a control signal output by the overvoltage protection control circuit;
The overvoltage protection control circuit comprises a detection circuit, a power supply circuit, a reference voltage circuit and a comparison control circuit;
The input end of the detection circuit is connected with the input end of the buffer switch circuit, the output end of the detection circuit is connected with the detection signal input end of the comparison control circuit, the input end of the power supply circuit is connected with the input end of the buffer switch circuit, the output end of the power supply circuit outputs a power supply VCC, the input end of the reference voltage circuit is connected with the output end of the power supply circuit, the output end of the reference voltage circuit is connected with the reference signal end of the comparison control circuit, and the control output end of the comparison control circuit is connected with the second control input end of the PMOS pipe control circuit; through the structure, good anti-impact protection can be performed on the PMOS tube when the PMOS tube is electrified, and the turn-off loss of the PMOS tube can be effectively reduced when the PMOS tube is turned off, so that the switching environment of the PMOS tube is improved, and the reliability of the whole switching circuit is improved; and overvoltage protection can be performed according to the change of the input voltage, so that the use safety and the stability of the whole switching circuit are ensured.
in a preferred embodiment, the snubber switch circuit includes a resistor R12, a PMOS transistor QT1, a transistor QT2, an inductor L1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a driving control circuit, a capacitor C1, a capacitor C3, a diode D1, a diode D2, a diode D3, a resistor R10, and a transistor QT 3;
One end of the resistor R12 is used as an input end of the buffer switch circuit, the other end of the resistor R12 is connected with a source electrode of a PMOS tube QT1 through an inductor L1, a drain electrode of the PMOS tube QT1 is used as an output end of the buffer switch circuit, and a drain electrode of the PMOS tube QT1 is grounded through a capacitor C3;
the source electrode of the PMOS tube QT1 is connected with the gate electrode through a resistor R5, the gate electrode of the PMOS tube QT1 is connected with one end of a resistor R6, the other end of the resistor R6 is connected with the collector electrode of a triode QT3, the emitter electrode of the triode QT3 is grounded, the base electrode of the triode QT3 serves as the control input end of the PMOS tube switching circuit, and the base electrode of the triode QT3 is connected with the emitter electrode through a resistor R10;
One end of a capacitor C1 is connected to the drain electrode of the PMOS transistor QT1, the other end of a capacitor C1 is connected with one end of a resistor R1, and the other end of the resistor R1 is connected to a common connection point between an inductor L1 and a direct-current power supply; the anode of the diode D2 is connected to the source of the PMOS transistor QT1, the cathode of the diode D2 is connected to the common connection point between the resistor R1 and the capacitor C1, the anode of the diode D3 is connected to the source of the PMOS transistor QT1, the cathode of the diode D3 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the anode of the diode D1 through the resistor R2, and the cathode of the diode D1 is connected to the common connection point between the inductor L1 and the DC power supply;
the collector of the triode QT2 is connected to a common connection point between the resistor R2 and the resistor R3, the emitter of the triode QT2 is grounded, and the base of the triode QT2 is connected to the cathode of the diode D3 through a resistor R4; when the PMOS transistor is initially powered on or is switched on, because the current of the inductor L1 cannot be transient, the current flowing through the inductor L1 can be gradually increased until the maximum current reaches the magnetic saturation, when the PMOS transistor is switched off, the current flows through the inductor L1 and the diode D1 to charge the capacitor C1, at the moment, the characteristic that the voltage of the capacitor C1 cannot be transient is utilized, the switching-off loss of the PMOS transistor is transferred to the capacitor C1, so that the switching-off loss of the PMOS transistor is effectively reduced, and when the PMOS transistor is switched on next time, the electric energy on the capacitor C1 realizes the discharge through the resistor R1, the inductor L1 and the source electrode and the drain electrode of the PMOS transistor; when the input end of the switch circuit is instantaneously powered off, a high voltage is induced at one end of the inductor L1 connected with the source of the PMOS transistor, in order to prevent the impact of the high voltage on the PN junction of the capacitor C1 and the PMOS transistor, at this time, the high-voltage induced electromotive force makes the transistor QT2 be conducted through the diode D3 and the resistor R4, so that the high voltage is released by a loop formed by the diode D3, the resistor R3 and the transistor QT2, in order to enable the normal operation of the whole circuit, the resistance of the resistor R4 needs to be selected according to the magnitude of the inductor L1 and the magnitude of the supply current, because the magnitude of the induced electromotive force of the inductor L1 is related to the supply current and the structure of the resistor R1, as long as a proper resistance is selected, the transistor QT2 cannot be conducted during normal power supply, and the selection of the resistance.
In a preferred embodiment, the PMOS transistor control circuit includes a diode D4, a transistor QT6, a capacitor C2, a resistor R11, and a resistor R9;
the positive electrode of the diode D4 is used as a first control input end of the PMOS tube control circuit to receive an external control command, the negative electrode of the diode D4 is connected with the base electrode of a triode QT6, the collector electrode of the triode QT6 is connected with a power supply VCC through a resistor R11, the emitter electrode of the triode QT6 is grounded through a capacitor C2, the common connection point of the emitter electrode of the triode QT6 and a capacitor C2 is connected with one end of a resistor R9, and the other end of the resistor R9 is used as a control output end of the PMOS tube control circuit and is connected with the base electrode of a triode QT; when triode QT3 switches on, PMOS pipe QT 1's gate voltage is pulled low, PMOS pipe QT1 switches on, when triode QT3 blocks, PMOS pipe QT 1's gate voltage equals with the source voltage, thereby make PMOS pipe QT1 block, and, utilize the characteristic that capacitor voltage can not the transition, when triode QT6 switches on, charge to electric capacity C2, make triode QT 3's base voltage slowly rise and reach turn-on voltage, thereby realize carrying out good protection to triode QT3, wherein, external control command can be the high level of current singlechip output, also can be the trigger voltage who forms through manual switch.
In a preferred embodiment, the PMOS transistor control circuit further includes a discharge control circuit, which includes a resistor R7, a resistor R8, a transistor QT4, and a transistor QT 5;
the base of the triode QT4 is used as a second control input end of the PMOS tube control circuit, the base of the triode QT4 is respectively connected with the anode of the diode D4 and the control output end of the comparison control circuit, the emitter of the triode QT4 is connected with the power VCC through a resistor R7, the collector of the triode QT4 is grounded through a resistor R8, the base of the triode QT5 is connected with the emitter of the triode QT4, the collector of the triode QT5 is connected with a common connection point between the emitter of the capacitor C2 and the emitter of the triode QT6, the emitter of the triode QT5 is grounded, and the triode QT4 is a P; in the above, because the voltage of the capacitor C2 cannot be transient, when the base of the transistor QT6 is powered off or at a low level, although the transistor QT6 is turned off, the capacitor C2 still has a certain voltage, and the voltage is discharged through the base and the emitter of the transistor QT3, so that the transistor is in a time-delay conducting state, which will cause the PMOS transistor QT1 not to be turned off in time, therefore, when the anode of the diode D4 is powered off or a low level is input, the transistor QT4 is turned on, so that the transistor QT5 is turned on, and the capacitor C2 is rapidly discharged through a loop between the collector and the emitter of the transistor QT5, so that the transistor QT3 is rapidly turned off, thereby achieving the rapid turn-off of the PMOS transistor QT 1; when diode D4's positive pole input high level or input trigger voltage for the difference between triode QT 4's base voltage and the emitter voltage is less than turn-on voltage, thereby turn off triode QT4, and then turn off triode QT5, make triode QT3 can be in normal conducting state.
in a preferred embodiment, the buffer switch circuit further includes an output discharge circuit, an input terminal of the output discharge circuit is connected to the drain of the PMOS transistor QT1, an output terminal of the output discharge circuit is grounded, and a control terminal of the output discharge circuit is connected to the collector of the transistor QT4, specifically:
the output discharge circuit is a silicon controlled rectifier Q1, the anode of the silicon controlled rectifier Q1 is connected to the drain electrode of a PMOS tube QT1, the cathode of the silicon controlled rectifier Q1 is grounded, and the control electrode of the silicon controlled rectifier Q1 is connected to the collector electrode of a triode QT 4; since the drain of the PMOS transistor QT1 is generally grounded through a capacitor, i.e. the capacitor C3 in fig. 2, which has the functions of filtering and stabilizing voltage, but the capacitor C3 also stores energy, when the PMOS transistor QT1 is turned off, the capacitor C3 still has residual voltage, and in order to realize that the output end of the whole switching circuit is quickly 0 output, therefore, an additional discharging loop is provided for the C3 by turning on the thyristor Q1, so that the output of the whole switching circuit can be reduced to 0 or close to 0 in a short time, because the thyristor has a forward conducting characteristic, as long as the forward has voltage after triggering, the thyristor is in a conducting state, and when the forward voltage is less than the conducting voltage of the PN junction, the thyristor Q1 is turned off.
In a preferred embodiment, the comparison control circuit comprises a comparator U2, a resistor R20 and a transistor QT 7;
The inverting terminal of comparator U2 is connected with detection circuit's output as comparison control circuit's detected signal input, the homophase end of comparator U2 is connected with reference voltage circuit's output as reference signal input, comparator U2's output is connected with triode QT 7's base through resistance R20, triode QT 7's emitter ground, triode QT 7's collecting electrode is connected with PMOS pipe control circuit's second control input as comparison control circuit's control output.
wherein the detection circuit comprises a resistor R13 and a resistor R14; one end of the resistor R13 is connected to the input end of the buffer switch circuit, the other end of the resistor R13 is grounded through a resistor R14, and a common connection point between the resistor R13 and the resistor R14 is connected with the inverting end of the comparator U2 as the output end of the detection circuit.
The reference voltage circuit comprises an adjustable resistor R16, a resistor R17, a resistor R15, a controllable precise voltage regulator U1 and a capacitor C2;
One end of an adjustable resistor R16 is connected to the output end of the power circuit, the other end of the adjustable resistor R16 is grounded through a resistor R17, a common connection point between the adjustable resistor R16 and the resistor R17 is connected with the reference pole of a controllable precise voltage-stabilizing source U1, the anode of the controllable precise voltage-stabilizing source U1 is grounded, the cathode of the controllable precise voltage-stabilizing source U1 is connected with the output end of the power circuit through a resistor R15, the cathode of the controllable precise voltage-stabilizing source U1 is grounded through a capacitor C2, the common connection point between the capacitor C2 and the cathode of the controllable precise voltage-stabilizing source U1 is used as the output end of the reference voltage circuit, wherein the controllable precise voltage-stabilizing source U1 is a TL431 chip, the reference voltage circuit is used for providing a reference comparison voltage signal to the comparator U2, the detection circuit is used for detecting the voltage signal input to the buffer switch circuit, and when the voltage signal is less than the reference comparison voltage signal, the comparator U, the triode QT7 is cut off; when the voltage signal that detection circuitry detected is greater than or equal to benchmark comparative voltage signal, comparator U2 output a high level, triode QT7 switches on this moment, and no matter at this moment, no matter outside trigger signal is high level or low level, triode QT 4's base voltage is pulled down, triode QT4 switches on to make triode QT5 switch on, triode QT3 ends, and then turn off PMOS pipe QT1, thereby realize overvoltage protection.
in a preferred embodiment, the power circuit comprises a resistor R18, a resistor R19, a voltage regulator tube DW1, a voltage regulator tube DW2, a triode QT8 and a capacitor C3;
one end of a resistor R8 serves as the input end of the power circuit and is connected with the input end of the buffer switch circuit, the other end of the resistor R18 is connected with the collector of a triode QT8, the emitter of the triode QT8 is connected with the negative electrode of a voltage regulator tube DW1, the positive electrode of the voltage regulator tube DW1 is grounded, one end of a resistor R19 is connected with the collector of a triode QT8, the other end of the resistor R19 is connected with the base of a triode QT8, the base of the triode QT8 is grounded through a capacitor C3, the base of the triode QT8 is connected with the negative electrode of the voltage regulator tube DW2, the positive electrode of the voltage regulator tube DW2 is grounded, and a common connection point between the; the power supply circuit is used for stabilizing voltage, stabilizing output voltage VCC at a set value, and supplying power to the PMOS tube control circuit.
Claims (10)
1. A switching circuit with overvoltage protection, characterized by: the buffer switch circuit and the overvoltage protection control circuit; the overvoltage protection control circuit controls the buffer switch circuit to be switched off when the input voltage is in overvoltage;
The buffer switch circuit comprises a PMOS tube switch circuit and a PMOS tube control circuit; the control output end of the PMOS tube control circuit is connected with the control input end of the PMOS tube switching circuit; the first control input end of the PMOS tube control circuit is used for receiving an external control signal, and the second control input end of the PMOS tube control circuit is used for receiving the external control signal and a control signal output by the overvoltage protection control circuit;
the overvoltage protection control circuit comprises a detection circuit, a power supply circuit, a reference voltage circuit and a comparison control circuit;
The input of detection circuitry is connected in buffer switch circuit's input, and detection circuitry's output is connected with comparison control circuit's detected signal input, power supply circuit's input is connected in buffer switch circuit's input, and power supply circuit's output VCC, reference voltage circuit's input is connected with power supply circuit's output, reference voltage circuit's output is connected with comparison control circuit's reference signal end, comparison control circuit's control output is connected with PMOS pipe control circuit's second control input.
2. The switching circuit with overvoltage protection as claimed in claim 1, wherein: the buffer switch circuit comprises a resistor R12, a PMOS tube QT1, a triode QT2, an inductor L1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a drive control circuit, a capacitor C1, a capacitor C3, a diode D1, a diode D2, a diode D3, a resistor R10 and a triode QT 3;
one end of the resistor R12 is used as an input end of the buffer switch circuit, the other end of the resistor R12 is connected with a source electrode of a PMOS tube QT1 through an inductor L1, a drain electrode of the PMOS tube QT1 is used as an output end of the buffer switch circuit, and a drain electrode of the PMOS tube QT1 is grounded through a capacitor C3;
The source electrode of the PMOS tube QT1 is connected with the gate electrode through a resistor R5, the gate electrode of the PMOS tube QT1 is connected with one end of a resistor R6, the other end of the resistor R6 is connected with the collector electrode of a triode QT3, the emitter electrode of the triode QT3 is grounded, the base electrode of the triode QT3 serves as the control input end of the PMOS tube switching circuit, and the base electrode of the triode QT3 is connected with the emitter electrode through a resistor R10;
One end of a capacitor C1 is connected to the drain electrode of the PMOS transistor QT1, the other end of a capacitor C1 is connected with one end of a resistor R1, and the other end of the resistor R1 is connected to a common connection point between an inductor L1 and a direct-current power supply; the anode of the diode D2 is connected to the source of the PMOS transistor QT1, the cathode of the diode D2 is connected to the common connection point between the resistor R1 and the capacitor C1, the anode of the diode D3 is connected to the source of the PMOS transistor QT1, the cathode of the diode D3 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the anode of the diode D1 through the resistor R2, and the cathode of the diode D1 is connected to the common connection point between the inductor L1 and the DC power supply;
the collector of triode QT2 is connected in the common junction between resistance R2 and resistance R3, and the emitter ground of triode QT2, the base of triode QT2 passes through resistance R4 and connects in the negative pole of diode D3.
3. the switching circuit with overvoltage protection as claimed in claim 2, wherein: the PMOS tube control circuit comprises a diode D4, a triode QT6, a capacitor C2, a resistor R11 and a resistor R9;
the positive pole of diode D4 receives external control command as the first control input end of PMOS pipe control circuit, the negative pole of diode D4 is connected with triode QT 6's base, triode QT 6's collecting electrode passes through resistance R11 and connects the power VCC, triode QT 6's projecting pole passes through electric capacity C2 ground connection, triode QT 6's projecting pole and electric capacity C2's common connection point are connected with resistance R9's one end, resistance R9's the other end is connected with triode QT 3's base as the control output end of PMOS pipe control circuit.
4. The switching circuit with overvoltage protection as claimed in claim 3, wherein: the PMOS tube control circuit further comprises a discharge control circuit, wherein the discharge control circuit comprises a resistor R7, a resistor R8, a triode QT4 and a triode QT 5;
triode QT 4's base is as PMOS pipe control circuit's second control input end, and triode QT 4's base is connected respectively in diode D4's positive pole and comparison control circuit's control output, triode QT 4's projecting pole passes through resistance R7 and connects the power VCC, triode QT 4's collecting electrode passes through resistance R8 ground connection, triode QT 5's base is connected in triode QT 4's projecting pole, triode QT 5's collecting electrode is connected in the tie point between electric capacity C2 and triode QT 6's projecting pole, triode QT 5's projecting pole ground connection, wherein, triode QT4 is the P type triode.
5. The switching circuit with overvoltage protection as claimed in claim 4, wherein: the buffer switch circuit further comprises an output discharge circuit, the input end of the output discharge circuit is connected to the drain electrode of the PMOS tube QT1, the output end of the output discharge circuit is grounded, and the control end of the output discharge circuit is connected to the collector electrode of the triode QT 4.
6. The switching circuit with overvoltage protection as claimed in claim 5, wherein: the output discharge circuit is controlled silicon Q1, and controlled silicon Q1's positive pole is connected in the drain electrode of PMOS pipe QT1, and controlled silicon Q1's negative pole ground connection, controlled silicon Q1's control electrode are connected in triode QT 4's collecting electrode.
7. The switching circuit with overvoltage protection as claimed in claim 4, wherein: the comparison control circuit comprises a comparator U2, a resistor R20 and a triode QT 7;
the inverting terminal of comparator U2 is connected with detection circuit's output as comparison control circuit's detected signal input, the homophase end of comparator U2 is connected with reference voltage circuit's output as reference signal input, comparator U2's output is connected with triode QT 7's base through resistance R20, triode QT 7's emitter ground, triode QT 7's collecting electrode is connected with PMOS pipe control circuit's second control input as comparison control circuit's control output.
8. The switching circuit with overvoltage protection as claimed in claim 1, wherein: the reference voltage circuit comprises an adjustable resistor R16, a resistor R17, a resistor R15, a controllable precise voltage regulator U1 and a capacitor C2;
one end of an adjustable resistor R16 is connected with the output end of the power circuit, the other end of the adjustable resistor R16 is grounded through a resistor R17, a common connection point between the adjustable resistor R16 and the resistor R17 is connected with a reference pole of a controllable precise voltage-stabilizing source U1, the anode of the controllable precise voltage-stabilizing source U1 is grounded, the cathode of the controllable precise voltage-stabilizing source U1 is connected with the output end of the power circuit through a resistor R15, the cathode of the controllable precise voltage-stabilizing source U1 is grounded through a capacitor C2, a common connection point between the capacitor C2 and the cathode of the controllable precise voltage-stabilizing source U1 serves as the output end of the reference voltage circuit, and the controllable precise voltage-stabilizing source U1 is a TL431 chip.
9. the switching circuit with overvoltage protection as claimed in claim 1, wherein: the power supply circuit comprises a resistor R18, a resistor R19, a voltage-regulator tube DW1, a voltage-regulator tube DW2, a triode QT8 and a capacitor C3;
One end of a resistor R8 is used as the input end of the power circuit and connected with the input end of the buffer switch circuit, the other end of the resistor R18 is connected with the collector of a triode QT8, the emitter of the triode QT8 is connected with the negative electrode of a voltage regulator tube DW1, the positive electrode of the voltage regulator tube DW1 is grounded, one end of a resistor R19 is connected with the collector of a triode QT8, the other end of the resistor R19 is connected with the base of a triode QT8, the base of the triode QT8 is grounded through a capacitor C3, the base of the triode QT8 is connected with the negative electrode of the voltage regulator tube DW2, the positive electrode of the voltage regulator tube DW2 is grounded, and a common connection point between the.
10. The switching circuit with overvoltage protection as claimed in claim 7, wherein: the detection circuit comprises a resistor R13 and a resistor R14; one end of the resistor R13 is connected to the input end of the buffer switch circuit, the other end of the resistor R13 is grounded through a resistor R14, and a common connection point between the resistor R13 and the resistor R14 is connected with the inverting end of the comparator U2 as the output end of the detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920767854.0U CN209787139U (en) | 2019-05-27 | 2019-05-27 | Switching circuit with overvoltage protection |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920767854.0U CN209787139U (en) | 2019-05-27 | 2019-05-27 | Switching circuit with overvoltage protection |
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| CN209787139U true CN209787139U (en) | 2019-12-13 |
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| CN201920767854.0U Expired - Fee Related CN209787139U (en) | 2019-05-27 | 2019-05-27 | Switching circuit with overvoltage protection |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110943730A (en) * | 2019-12-27 | 2020-03-31 | 海南星宇智控科技有限公司 | Anti-impact high-power electronic switch circuit and driving method thereof |
| CN113422595A (en) * | 2021-08-24 | 2021-09-21 | 成都市易冲半导体有限公司 | Novel electronic switch for processing negative-pressure AC signal and control method thereof |
-
2019
- 2019-05-27 CN CN201920767854.0U patent/CN209787139U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110943730A (en) * | 2019-12-27 | 2020-03-31 | 海南星宇智控科技有限公司 | Anti-impact high-power electronic switch circuit and driving method thereof |
| CN113422595A (en) * | 2021-08-24 | 2021-09-21 | 成都市易冲半导体有限公司 | Novel electronic switch for processing negative-pressure AC signal and control method thereof |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
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Granted publication date: 20191213 Termination date: 20200527 |